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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 42; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec \3; RUN: -mtriple powerpc-ibm-aix-xcoff < %s | \4; RUN: FileCheck --check-prefixes=CHECKASM,ASM32PWR4 %s5 6; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec \7; RUN: -mtriple powerpc64-ibm-aix-xcoff < %s | \8; RUN: FileCheck --check-prefixes=CHECKASM,ASM64PWR4 %s9 10define void @call_test_chars() {11; ASM32PWR4-LABEL: call_test_chars:12; ASM32PWR4: # %bb.0: # %entry13; ASM32PWR4-NEXT: mflr 014; ASM32PWR4-NEXT: stwu 1, -64(1)15; ASM32PWR4-NEXT: li 3, 9716; ASM32PWR4-NEXT: li 4, 9717; ASM32PWR4-NEXT: stw 0, 72(1)18; ASM32PWR4-NEXT: li 5, 9719; ASM32PWR4-NEXT: li 6, 9720; ASM32PWR4-NEXT: bl .test_chars21; ASM32PWR4-NEXT: nop22; ASM32PWR4-NEXT: addi 1, 1, 6423; ASM32PWR4-NEXT: lwz 0, 8(1)24; ASM32PWR4-NEXT: mtlr 025; ASM32PWR4-NEXT: blr26;27; ASM64PWR4-LABEL: call_test_chars:28; ASM64PWR4: # %bb.0: # %entry29; ASM64PWR4-NEXT: mflr 030; ASM64PWR4-NEXT: stdu 1, -112(1)31; ASM64PWR4-NEXT: li 3, 9732; ASM64PWR4-NEXT: li 4, 9733; ASM64PWR4-NEXT: std 0, 128(1)34; ASM64PWR4-NEXT: li 5, 9735; ASM64PWR4-NEXT: li 6, 9736; ASM64PWR4-NEXT: bl .test_chars37; ASM64PWR4-NEXT: nop38; ASM64PWR4-NEXT: addi 1, 1, 11239; ASM64PWR4-NEXT: ld 0, 16(1)40; ASM64PWR4-NEXT: mtlr 041; ASM64PWR4-NEXT: blr42entry:43 call i8 @test_chars(i8 signext 97, i8 signext 97, i8 signext 97, i8 signext 97)44 ret void45}46 47define signext i8 @test_chars(i8 signext %c1, i8 signext %c2, i8 signext %c3, i8 signext %c4) {48; CHECKASM-LABEL: test_chars:49; CHECKASM: # %bb.0: # %entry50; CHECKASM-NEXT: add 3, 3, 451; CHECKASM-NEXT: add 3, 3, 552; CHECKASM-NEXT: add 3, 3, 653; CHECKASM-NEXT: extsb 3, 354; CHECKASM-NEXT: blr55entry:56 %conv = sext i8 %c1 to i3257 %conv1 = sext i8 %c2 to i3258 %add = add nsw i32 %conv, %conv159 %conv2 = sext i8 %c3 to i3260 %add3 = add nsw i32 %add, %conv261 %conv4 = sext i8 %c4 to i3262 %add5 = add nsw i32 %add3, %conv463 %conv6 = trunc i32 %add5 to i864 ret i8 %conv665}66 67define void @call_test_chars_mix() {68; ASM32PWR4-LABEL: call_test_chars_mix:69; ASM32PWR4: # %bb.0: # %entry70; ASM32PWR4-NEXT: mflr 071; ASM32PWR4-NEXT: stwu 1, -64(1)72; ASM32PWR4-NEXT: li 3, 9773; ASM32PWR4-NEXT: li 4, 22574; ASM32PWR4-NEXT: stw 0, 72(1)75; ASM32PWR4-NEXT: li 5, 9776; ASM32PWR4-NEXT: li 6, -3177; ASM32PWR4-NEXT: bl .test_chars_mix78; ASM32PWR4-NEXT: nop79; ASM32PWR4-NEXT: addi 1, 1, 6480; ASM32PWR4-NEXT: lwz 0, 8(1)81; ASM32PWR4-NEXT: mtlr 082; ASM32PWR4-NEXT: blr83;84; ASM64PWR4-LABEL: call_test_chars_mix:85; ASM64PWR4: # %bb.0: # %entry86; ASM64PWR4-NEXT: mflr 087; ASM64PWR4-NEXT: stdu 1, -112(1)88; ASM64PWR4-NEXT: li 3, 9789; ASM64PWR4-NEXT: li 4, 22590; ASM64PWR4-NEXT: std 0, 128(1)91; ASM64PWR4-NEXT: li 5, 9792; ASM64PWR4-NEXT: li 6, -3193; ASM64PWR4-NEXT: bl .test_chars_mix94; ASM64PWR4-NEXT: nop95; ASM64PWR4-NEXT: addi 1, 1, 11296; ASM64PWR4-NEXT: ld 0, 16(1)97; ASM64PWR4-NEXT: mtlr 098; ASM64PWR4-NEXT: blr99entry:100 call i8 @test_chars_mix(i8 signext 97, i8 zeroext -31, i8 zeroext 97, i8 signext -31)101 ret void102}103 104define signext i8 @test_chars_mix(i8 signext %c1, i8 zeroext %c2, i8 zeroext %c3, i8 signext %c4) {105; CHECKASM-LABEL: test_chars_mix:106; CHECKASM: # %bb.0: # %entry107; CHECKASM-NEXT: add 3, 3, 4108; CHECKASM-NEXT: add 3, 3, 5109; CHECKASM-NEXT: add 3, 3, 6110; CHECKASM-NEXT: extsb 3, 3111; CHECKASM-NEXT: blr112entry:113 %conv = sext i8 %c1 to i32114 %conv1 = zext i8 %c2 to i32115 %add = add nsw i32 %conv, %conv1116 %conv2 = zext i8 %c3 to i32117 %add3 = add nsw i32 %add, %conv2118 %conv4 = sext i8 %c4 to i32119 %add5 = add nsw i32 %add3, %conv4120 %conv6 = trunc i32 %add5 to i8121 ret i8 %conv6122}123 124@global_i1 = global i8 0, align 1125 126define void @test_i1(i1 %b) {127; ASM32PWR4-LABEL: test_i1:128; ASM32PWR4: # %bb.0: # %entry129; ASM32PWR4-NEXT: lwz 4, L..C0(2) # @global_i1130; ASM32PWR4-NEXT: clrlwi 3, 3, 31131; ASM32PWR4-NEXT: stb 3, 0(4)132; ASM32PWR4-NEXT: blr133;134; ASM64PWR4-LABEL: test_i1:135; ASM64PWR4: # %bb.0: # %entry136; ASM64PWR4-NEXT: ld 4, L..C0(2) # @global_i1137; ASM64PWR4-NEXT: clrlwi 3, 3, 31138; ASM64PWR4-NEXT: stb 3, 0(4)139; ASM64PWR4-NEXT: blr140 entry:141 %frombool = zext i1 %b to i8142 store i8 %frombool, ptr @global_i1, align 1143 ret void144}145 146define void @call_test_i1() {147; ASM32PWR4-LABEL: call_test_i1:148; ASM32PWR4: # %bb.0: # %entry149; ASM32PWR4-NEXT: mflr 0150; ASM32PWR4-NEXT: stwu 1, -64(1)151; ASM32PWR4-NEXT: li 3, 1152; ASM32PWR4-NEXT: stw 0, 72(1)153; ASM32PWR4-NEXT: bl .test_i1154; ASM32PWR4-NEXT: nop155; ASM32PWR4-NEXT: addi 1, 1, 64156; ASM32PWR4-NEXT: lwz 0, 8(1)157; ASM32PWR4-NEXT: mtlr 0158; ASM32PWR4-NEXT: blr159;160; ASM64PWR4-LABEL: call_test_i1:161; ASM64PWR4: # %bb.0: # %entry162; ASM64PWR4-NEXT: mflr 0163; ASM64PWR4-NEXT: stdu 1, -112(1)164; ASM64PWR4-NEXT: li 3, 1165; ASM64PWR4-NEXT: std 0, 128(1)166; ASM64PWR4-NEXT: bl .test_i1167; ASM64PWR4-NEXT: nop168; ASM64PWR4-NEXT: addi 1, 1, 112169; ASM64PWR4-NEXT: ld 0, 16(1)170; ASM64PWR4-NEXT: mtlr 0171; ASM64PWR4-NEXT: blr172entry:173 call void @test_i1(i1 1)174 ret void175}176 177define void @test_i1zext(i1 zeroext %b) {178; ASM32PWR4-LABEL: test_i1zext:179; ASM32PWR4: # %bb.0: # %entry180; ASM32PWR4-NEXT: lwz 4, L..C0(2) # @global_i1181; ASM32PWR4-NEXT: stb 3, 0(4)182; ASM32PWR4-NEXT: blr183;184; ASM64PWR4-LABEL: test_i1zext:185; ASM64PWR4: # %bb.0: # %entry186; ASM64PWR4-NEXT: ld 4, L..C0(2) # @global_i1187; ASM64PWR4-NEXT: stb 3, 0(4)188; ASM64PWR4-NEXT: blr189 entry:190 %frombool = zext i1 %b to i8191 store i8 %frombool, ptr @global_i1, align 1192 ret void193 }194 195define i32 @test_ints(i32 signext %a, i32 zeroext %b, i32 zeroext %c, i32 signext %d, i32 signext %e, i32 signext %f, i32 signext %g, i32 signext %h) {196; CHECKASM-LABEL: test_ints:197; CHECKASM: # %bb.0: # %entry198; CHECKASM-NEXT: add 3, 3, 4199; CHECKASM-NEXT: add 3, 3, 5200; CHECKASM-NEXT: add 3, 3, 6201; CHECKASM-NEXT: add 3, 3, 7202; CHECKASM-NEXT: add 3, 3, 8203; CHECKASM-NEXT: add 3, 3, 9204; CHECKASM-NEXT: add 3, 3, 10205; CHECKASM-NEXT: blr206entry:207 %add = add i32 %a, %b208 %add1 = add i32 %add, %c209 %add2 = add i32 %add1, %d210 %add3 = add i32 %add2, %e211 %add4 = add i32 %add3, %f212 %add5 = add i32 %add4, %g213 %add6 = add i32 %add5, %h214 ret i32 %add6215}216 217define void @call_test_ints() {218; ASM32PWR4-LABEL: call_test_ints:219; ASM32PWR4: # %bb.0: # %entry220; ASM32PWR4-NEXT: mflr 0221; ASM32PWR4-NEXT: stwu 1, -64(1)222; ASM32PWR4-NEXT: li 3, 1223; ASM32PWR4-NEXT: li 4, 1224; ASM32PWR4-NEXT: stw 0, 72(1)225; ASM32PWR4-NEXT: lis 5, -32768226; ASM32PWR4-NEXT: lis 6, -32768227; ASM32PWR4-NEXT: li 7, 1228; ASM32PWR4-NEXT: li 8, 1229; ASM32PWR4-NEXT: li 9, 1230; ASM32PWR4-NEXT: li 10, 1231; ASM32PWR4-NEXT: bl .test_ints232; ASM32PWR4-NEXT: nop233; ASM32PWR4-NEXT: addi 1, 1, 64234; ASM32PWR4-NEXT: lwz 0, 8(1)235; ASM32PWR4-NEXT: mtlr 0236; ASM32PWR4-NEXT: blr237;238; ASM64PWR4-LABEL: call_test_ints:239; ASM64PWR4: # %bb.0: # %entry240; ASM64PWR4-NEXT: mflr 0241; ASM64PWR4-NEXT: stdu 1, -112(1)242; ASM64PWR4-NEXT: li 3, 1243; ASM64PWR4-NEXT: li 4, 1244; ASM64PWR4-NEXT: std 0, 128(1)245; ASM64PWR4-NEXT: rldic 5, 3, 31, 32246; ASM64PWR4-NEXT: lis 6, -32768247; ASM64PWR4-NEXT: li 7, 1248; ASM64PWR4-NEXT: li 8, 1249; ASM64PWR4-NEXT: li 9, 1250; ASM64PWR4-NEXT: li 10, 1251; ASM64PWR4-NEXT: bl .test_ints252; ASM64PWR4-NEXT: nop253; ASM64PWR4-NEXT: addi 1, 1, 112254; ASM64PWR4-NEXT: ld 0, 16(1)255; ASM64PWR4-NEXT: mtlr 0256; ASM64PWR4-NEXT: blr257entry:258 call i32 @test_ints(i32 signext 1, i32 zeroext 1, i32 zeroext 2147483648, i32 signext -2147483648, i32 signext 1, i32 signext 1, i32 signext 1, i32 signext 1)259 ret void260}261 262define void @call_test_i64() {263; ASM32PWR4-LABEL: call_test_i64:264; ASM32PWR4: # %bb.0: # %entry265; ASM32PWR4-NEXT: mflr 0266; ASM32PWR4-NEXT: stwu 1, -64(1)267; ASM32PWR4-NEXT: li 3, 0268; ASM32PWR4-NEXT: li 4, 1269; ASM32PWR4-NEXT: stw 0, 72(1)270; ASM32PWR4-NEXT: li 5, 0271; ASM32PWR4-NEXT: li 6, 2272; ASM32PWR4-NEXT: li 7, 0273; ASM32PWR4-NEXT: li 8, 3274; ASM32PWR4-NEXT: li 9, 0275; ASM32PWR4-NEXT: li 10, 4276; ASM32PWR4-NEXT: bl .test_i64277; ASM32PWR4-NEXT: nop278; ASM32PWR4-NEXT: addi 1, 1, 64279; ASM32PWR4-NEXT: lwz 0, 8(1)280; ASM32PWR4-NEXT: mtlr 0281; ASM32PWR4-NEXT: blr282;283; ASM64PWR4-LABEL: call_test_i64:284; ASM64PWR4: # %bb.0: # %entry285; ASM64PWR4-NEXT: mflr 0286; ASM64PWR4-NEXT: stdu 1, -112(1)287; ASM64PWR4-NEXT: li 3, 1288; ASM64PWR4-NEXT: li 4, 2289; ASM64PWR4-NEXT: std 0, 128(1)290; ASM64PWR4-NEXT: li 5, 3291; ASM64PWR4-NEXT: li 6, 4292; ASM64PWR4-NEXT: bl .test_i64293; ASM64PWR4-NEXT: nop294; ASM64PWR4-NEXT: addi 1, 1, 112295; ASM64PWR4-NEXT: ld 0, 16(1)296; ASM64PWR4-NEXT: mtlr 0297; ASM64PWR4-NEXT: blr298entry:299 call i64 @test_i64(i64 1, i64 2, i64 3, i64 4)300 ret void301}302 303define i64 @test_i64(i64 %a, i64 %b, i64 %c, i64 %d) {304; ASM32PWR4-LABEL: test_i64:305; ASM32PWR4: # %bb.0: # %entry306; ASM32PWR4-NEXT: addc 4, 4, 6307; ASM32PWR4-NEXT: adde 3, 3, 5308; ASM32PWR4-NEXT: addc 4, 4, 8309; ASM32PWR4-NEXT: adde 3, 3, 7310; ASM32PWR4-NEXT: addc 4, 4, 10311; ASM32PWR4-NEXT: adde 3, 3, 9312; ASM32PWR4-NEXT: blr313;314; ASM64PWR4-LABEL: test_i64:315; ASM64PWR4: # %bb.0: # %entry316; ASM64PWR4-NEXT: add 3, 3, 4317; ASM64PWR4-NEXT: add 3, 3, 5318; ASM64PWR4-NEXT: add 3, 3, 6319; ASM64PWR4-NEXT: blr320entry:321 %add = add nsw i64 %a, %b322 %add1 = add nsw i64 %add, %c323 %add2 = add nsw i64 %add1, %d324 ret i64 %add2325}326 327define void @call_test_int_ptr() {328; ASM32PWR4-LABEL: call_test_int_ptr:329; ASM32PWR4: # %bb.0: # %entry330; ASM32PWR4-NEXT: mflr 0331; ASM32PWR4-NEXT: stwu 1, -64(1)332; ASM32PWR4-NEXT: li 3, 0333; ASM32PWR4-NEXT: stw 0, 72(1)334; ASM32PWR4-NEXT: stw 3, 60(1)335; ASM32PWR4-NEXT: addi 3, 1, 60336; ASM32PWR4-NEXT: bl .test_int_ptr337; ASM32PWR4-NEXT: nop338; ASM32PWR4-NEXT: addi 1, 1, 64339; ASM32PWR4-NEXT: lwz 0, 8(1)340; ASM32PWR4-NEXT: mtlr 0341; ASM32PWR4-NEXT: blr342;343; ASM64PWR4-LABEL: call_test_int_ptr:344; ASM64PWR4: # %bb.0: # %entry345; ASM64PWR4-NEXT: mflr 0346; ASM64PWR4-NEXT: stdu 1, -128(1)347; ASM64PWR4-NEXT: li 3, 0348; ASM64PWR4-NEXT: std 0, 144(1)349; ASM64PWR4-NEXT: stw 3, 124(1)350; ASM64PWR4-NEXT: addi 3, 1, 124351; ASM64PWR4-NEXT: bl .test_int_ptr352; ASM64PWR4-NEXT: nop353; ASM64PWR4-NEXT: addi 1, 1, 128354; ASM64PWR4-NEXT: ld 0, 16(1)355; ASM64PWR4-NEXT: mtlr 0356; ASM64PWR4-NEXT: blr357entry:358 %b = alloca i32, align 4359 store i32 0, ptr %b, align 4360 call void @test_int_ptr(ptr %b)361 ret void362}363 364define void @test_int_ptr(ptr %a) {365; ASM32PWR4-LABEL: test_int_ptr:366; ASM32PWR4: # %bb.0: # %entry367; ASM32PWR4-NEXT: stw 3, -8(1)368; ASM32PWR4-NEXT: blr369;370; ASM64PWR4-LABEL: test_int_ptr:371; ASM64PWR4: # %bb.0: # %entry372; ASM64PWR4-NEXT: std 3, -8(1)373; ASM64PWR4-NEXT: blr374entry:375 %a.addr = alloca ptr, align 8376 store ptr %a, ptr %a.addr, align 8377 ret void378}379 380define i32 @caller(i32 %i) {381; ASM32PWR4-LABEL: caller:382; ASM32PWR4: # %bb.0: # %entry383; ASM32PWR4-NEXT: mflr 0384; ASM32PWR4-NEXT: stwu 1, -64(1)385; ASM32PWR4-NEXT: stw 0, 72(1)386; ASM32PWR4-NEXT: stw 3, 60(1)387; ASM32PWR4-NEXT: cntlzw 3, 3388; ASM32PWR4-NEXT: not 3, 3389; ASM32PWR4-NEXT: rlwinm 3, 3, 27, 31, 31390; ASM32PWR4-NEXT: stb 3, 59(1)391; ASM32PWR4-NEXT: bl .call_test_bool[PR]392; ASM32PWR4-NEXT: nop393; ASM32PWR4-NEXT: addi 1, 1, 64394; ASM32PWR4-NEXT: lwz 0, 8(1)395; ASM32PWR4-NEXT: mtlr 0396; ASM32PWR4-NEXT: blr397;398; ASM64PWR4-LABEL: caller:399; ASM64PWR4: # %bb.0: # %entry400; ASM64PWR4-NEXT: mflr 0401; ASM64PWR4-NEXT: stdu 1, -128(1)402; ASM64PWR4-NEXT: std 0, 144(1)403; ASM64PWR4-NEXT: stw 3, 124(1)404; ASM64PWR4-NEXT: cntlzw 3, 3405; ASM64PWR4-NEXT: srwi 3, 3, 5406; ASM64PWR4-NEXT: xori 3, 3, 1407; ASM64PWR4-NEXT: stb 3, 123(1)408; ASM64PWR4-NEXT: bl .call_test_bool[PR]409; ASM64PWR4-NEXT: nop410; ASM64PWR4-NEXT: addi 1, 1, 128411; ASM64PWR4-NEXT: ld 0, 16(1)412; ASM64PWR4-NEXT: mtlr 0413; ASM64PWR4-NEXT: blr414entry:415 %i.addr = alloca i32, align 4416 %b = alloca i8, align 1417 store i32 %i, ptr %i.addr, align 4418 %0 = load i32, ptr %i.addr, align 4419 %cmp = icmp ne i32 %0, 0420 %frombool = zext i1 %cmp to i8421 store i8 %frombool, ptr %b, align 1422 %1 = load i8, ptr %b, align 1423 %tobool = trunc i8 %1 to i1424 %call = call i32 @call_test_bool(i1 zeroext %tobool)425 ret i32 %call426}427 428declare i32 @call_test_bool(i1 zeroext)429 430@f1 = global float 0.000000e+00, align 4431@d1 = global double 0.000000e+00, align 8432 433define void @call_test_floats() {434; ASM32PWR4-LABEL: call_test_floats:435; ASM32PWR4: # %bb.0: # %entry436; ASM32PWR4-NEXT: mflr 0437; ASM32PWR4-NEXT: stwu 1, -64(1)438; ASM32PWR4-NEXT: lwz 3, L..C1(2) # @f1439; ASM32PWR4-NEXT: stw 0, 72(1)440; ASM32PWR4-NEXT: lfs 1, 0(3)441; ASM32PWR4-NEXT: fmr 2, 1442; ASM32PWR4-NEXT: fmr 3, 1443; ASM32PWR4-NEXT: bl .test_floats444; ASM32PWR4-NEXT: nop445; ASM32PWR4-NEXT: addi 1, 1, 64446; ASM32PWR4-NEXT: lwz 0, 8(1)447; ASM32PWR4-NEXT: mtlr 0448; ASM32PWR4-NEXT: blr449;450; ASM64PWR4-LABEL: call_test_floats:451; ASM64PWR4: # %bb.0: # %entry452; ASM64PWR4-NEXT: mflr 0453; ASM64PWR4-NEXT: stdu 1, -112(1)454; ASM64PWR4-NEXT: ld 3, L..C1(2) # @f1455; ASM64PWR4-NEXT: std 0, 128(1)456; ASM64PWR4-NEXT: lfs 1, 0(3)457; ASM64PWR4-NEXT: fmr 2, 1458; ASM64PWR4-NEXT: fmr 3, 1459; ASM64PWR4-NEXT: bl .test_floats460; ASM64PWR4-NEXT: nop461; ASM64PWR4-NEXT: addi 1, 1, 112462; ASM64PWR4-NEXT: ld 0, 16(1)463; ASM64PWR4-NEXT: mtlr 0464; ASM64PWR4-NEXT: blr465entry:466 %0 = load float, ptr @f1, align 4467 call float @test_floats(float %0, float %0, float %0)468 ret void469}470 471define float @test_floats(float %f1, float %f2, float %f3) {472; CHECKASM-LABEL: test_floats:473; CHECKASM: # %bb.0: # %entry474; CHECKASM-NEXT: fadds 0, 1, 2475; CHECKASM-NEXT: fadds 1, 0, 3476; CHECKASM-NEXT: blr477entry:478 %add = fadd float %f1, %f2479 %add1 = fadd float %add, %f3480 ret float %add1481}482 483define void @call_test_fpr_max() {484; ASM32PWR4-LABEL: call_test_fpr_max:485; ASM32PWR4: # %bb.0: # %entry486; ASM32PWR4-NEXT: mflr 0487; ASM32PWR4-NEXT: stwu 1, -128(1)488; ASM32PWR4-NEXT: lwz 3, L..C2(2) # @d1489; ASM32PWR4-NEXT: stw 0, 136(1)490; ASM32PWR4-NEXT: lfd 1, 0(3)491; ASM32PWR4-NEXT: fmr 2, 1492; ASM32PWR4-NEXT: fmr 3, 1493; ASM32PWR4-NEXT: stfd 1, 120(1)494; ASM32PWR4-NEXT: stfd 1, 112(1)495; ASM32PWR4-NEXT: fmr 4, 1496; ASM32PWR4-NEXT: fmr 5, 1497; ASM32PWR4-NEXT: stfd 1, 104(1)498; ASM32PWR4-NEXT: fmr 6, 1499; ASM32PWR4-NEXT: fmr 7, 1500; ASM32PWR4-NEXT: stfd 1, 96(1)501; ASM32PWR4-NEXT: stfd 1, 88(1)502; ASM32PWR4-NEXT: fmr 8, 1503; ASM32PWR4-NEXT: fmr 9, 1504; ASM32PWR4-NEXT: stfd 1, 80(1)505; ASM32PWR4-NEXT: fmr 10, 1506; ASM32PWR4-NEXT: fmr 11, 1507; ASM32PWR4-NEXT: stfd 1, 72(1)508; ASM32PWR4-NEXT: stfd 1, 64(1)509; ASM32PWR4-NEXT: fmr 12, 1510; ASM32PWR4-NEXT: fmr 13, 1511; ASM32PWR4-NEXT: stfd 1, 56(1)512; ASM32PWR4-NEXT: bl .test_fpr_max513; ASM32PWR4-NEXT: nop514; ASM32PWR4-NEXT: addi 1, 1, 128515; ASM32PWR4-NEXT: lwz 0, 8(1)516; ASM32PWR4-NEXT: mtlr 0517; ASM32PWR4-NEXT: blr518;519; ASM64PWR4-LABEL: call_test_fpr_max:520; ASM64PWR4: # %bb.0: # %entry521; ASM64PWR4-NEXT: mflr 0522; ASM64PWR4-NEXT: stdu 1, -160(1)523; ASM64PWR4-NEXT: ld 3, L..C2(2) # @d1524; ASM64PWR4-NEXT: std 0, 176(1)525; ASM64PWR4-NEXT: lfd 1, 0(3)526; ASM64PWR4-NEXT: fmr 2, 1527; ASM64PWR4-NEXT: fmr 3, 1528; ASM64PWR4-NEXT: stfd 1, 144(1)529; ASM64PWR4-NEXT: stfd 1, 136(1)530; ASM64PWR4-NEXT: fmr 4, 1531; ASM64PWR4-NEXT: fmr 5, 1532; ASM64PWR4-NEXT: stfd 1, 128(1)533; ASM64PWR4-NEXT: fmr 6, 1534; ASM64PWR4-NEXT: fmr 7, 1535; ASM64PWR4-NEXT: stfd 1, 120(1)536; ASM64PWR4-NEXT: stfd 1, 112(1)537; ASM64PWR4-NEXT: fmr 8, 1538; ASM64PWR4-NEXT: fmr 9, 1539; ASM64PWR4-NEXT: fmr 10, 1540; ASM64PWR4-NEXT: fmr 11, 1541; ASM64PWR4-NEXT: fmr 12, 1542; ASM64PWR4-NEXT: fmr 13, 1543; ASM64PWR4-NEXT: bl .test_fpr_max544; ASM64PWR4-NEXT: nop545; ASM64PWR4-NEXT: addi 1, 1, 160546; ASM64PWR4-NEXT: ld 0, 16(1)547; ASM64PWR4-NEXT: mtlr 0548; ASM64PWR4-NEXT: blr549entry:550 %0 = load double, ptr @d1, align 8551 call double @test_fpr_max(double %0, double %0, double %0, double %0, double %0, double %0, double %0, double %0, double %0, double %0, double %0, double %0, double %0)552 ret void553}554 555define double @test_fpr_max(double %d1, double %d2, double %d3, double %d4, double %d5, double %d6, double %d7, double %d8, double %d9, double %d10, double %d11, double %d12, double %d13) {556; CHECKASM-LABEL: test_fpr_max:557; CHECKASM: # %bb.0: # %entry558; CHECKASM-NEXT: fadd 0, 1, 2559; CHECKASM-NEXT: fadd 0, 0, 3560; CHECKASM-NEXT: fadd 0, 0, 4561; CHECKASM-NEXT: fadd 0, 0, 5562; CHECKASM-NEXT: fadd 0, 0, 6563; CHECKASM-NEXT: fadd 0, 0, 7564; CHECKASM-NEXT: fadd 0, 0, 8565; CHECKASM-NEXT: fadd 0, 0, 9566; CHECKASM-NEXT: fadd 0, 0, 10567; CHECKASM-NEXT: fadd 0, 0, 11568; CHECKASM-NEXT: fadd 0, 0, 12569; CHECKASM-NEXT: fadd 1, 0, 13570; CHECKASM-NEXT: blr571entry:572 %add = fadd double %d1, %d2573 %add1 = fadd double %add, %d3574 %add2 = fadd double %add1, %d4575 %add3 = fadd double %add2, %d5576 %add4 = fadd double %add3, %d6577 %add5 = fadd double %add4, %d7578 %add6 = fadd double %add5, %d8579 %add7 = fadd double %add6, %d9580 %add8 = fadd double %add7, %d10581 %add9 = fadd double %add8, %d11582 %add10 = fadd double %add9, %d12583 %add11 = fadd double %add10, %d13584 ret double %add11585}586 587define void @call_test_mix() {588; ASM32PWR4-LABEL: call_test_mix:589; ASM32PWR4: # %bb.0: # %entry590; ASM32PWR4-NEXT: mflr 0591; ASM32PWR4-NEXT: stwu 1, -64(1)592; ASM32PWR4-NEXT: lwz 3, L..C1(2) # @f1593; ASM32PWR4-NEXT: stw 0, 72(1)594; ASM32PWR4-NEXT: li 4, 1595; ASM32PWR4-NEXT: li 7, 97596; ASM32PWR4-NEXT: lfs 1, 0(3)597; ASM32PWR4-NEXT: lwz 3, L..C2(2) # @d1598; ASM32PWR4-NEXT: lfd 2, 0(3)599; ASM32PWR4-NEXT: bl .test_mix600; ASM32PWR4-NEXT: nop601; ASM32PWR4-NEXT: addi 1, 1, 64602; ASM32PWR4-NEXT: lwz 0, 8(1)603; ASM32PWR4-NEXT: mtlr 0604; ASM32PWR4-NEXT: blr605;606; ASM64PWR4-LABEL: call_test_mix:607; ASM64PWR4: # %bb.0: # %entry608; ASM64PWR4-NEXT: mflr 0609; ASM64PWR4-NEXT: stdu 1, -112(1)610; ASM64PWR4-NEXT: ld 3, L..C1(2) # @f1611; ASM64PWR4-NEXT: std 0, 128(1)612; ASM64PWR4-NEXT: li 4, 1613; ASM64PWR4-NEXT: li 6, 97614; ASM64PWR4-NEXT: lfs 1, 0(3)615; ASM64PWR4-NEXT: ld 3, L..C2(2) # @d1616; ASM64PWR4-NEXT: lfd 2, 0(3)617; ASM64PWR4-NEXT: bl .test_mix618; ASM64PWR4-NEXT: nop619; ASM64PWR4-NEXT: addi 1, 1, 112620; ASM64PWR4-NEXT: ld 0, 16(1)621; ASM64PWR4-NEXT: mtlr 0622; ASM64PWR4-NEXT: blr623entry:624 %0 = load float, ptr @f1, align 4625 %1 = load double, ptr @d1, align 8626 call i32 @test_mix(float %0, i32 1, double %1, i8 signext 97)627 ret void628}629 630define i32 @test_mix(float %f, i32 signext %i, double %d, i8 signext %c) {631; ASM32PWR4-LABEL: test_mix:632; ASM32PWR4: # %bb.0: # %entry633; ASM32PWR4-NEXT: lis 3, 17200634; ASM32PWR4-NEXT: fadd 1, 1, 2635; ASM32PWR4-NEXT: stw 3, -16(1)636; ASM32PWR4-NEXT: lwz 3, L..C3(2) # %const.0637; ASM32PWR4-NEXT: frsp 1, 1638; ASM32PWR4-NEXT: lfs 0, 0(3)639; ASM32PWR4-NEXT: clrlwi 3, 7, 24640; ASM32PWR4-NEXT: add 3, 4, 3641; ASM32PWR4-NEXT: xoris 3, 3, 32768642; ASM32PWR4-NEXT: stw 3, -12(1)643; ASM32PWR4-NEXT: addi 3, 1, -4644; ASM32PWR4-NEXT: lfd 2, -16(1)645; ASM32PWR4-NEXT: fsub 0, 2, 0646; ASM32PWR4-NEXT: frsp 0, 0647; ASM32PWR4-NEXT: fadds 0, 0, 1648; ASM32PWR4-NEXT: fctiwz 0, 0649; ASM32PWR4-NEXT: stfiwx 0, 0, 3650; ASM32PWR4-NEXT: lwz 3, -4(1)651; ASM32PWR4-NEXT: blr652;653; ASM64PWR4-LABEL: test_mix:654; ASM64PWR4: # %bb.0: # %entry655; ASM64PWR4-NEXT: clrlwi 5, 6, 24656; ASM64PWR4-NEXT: fadd 0, 1, 2657; ASM64PWR4-NEXT: addi 3, 1, -4658; ASM64PWR4-NEXT: frsp 0, 0659; ASM64PWR4-NEXT: add 4, 4, 5660; ASM64PWR4-NEXT: extsw 4, 4661; ASM64PWR4-NEXT: std 4, -16(1)662; ASM64PWR4-NEXT: lfd 1, -16(1)663; ASM64PWR4-NEXT: fcfid 1, 1664; ASM64PWR4-NEXT: frsp 1, 1665; ASM64PWR4-NEXT: fadds 0, 1, 0666; ASM64PWR4-NEXT: fctiwz 0, 0667; ASM64PWR4-NEXT: stfiwx 0, 0, 3668; ASM64PWR4-NEXT: lwz 3, -4(1)669; ASM64PWR4-NEXT: blr670entry:671 %conv = fpext float %f to double672 %add = fadd double %conv, %d673 %conv1 = fptrunc double %add to float674 %conv2 = zext i8 %c to i32675 %add3 = add nsw i32 %i, %conv2676 %conv4 = sitofp i32 %add3 to float677 %add5 = fadd float %conv4, %conv1678 %conv6 = fptosi float %add5 to i32679 ret i32 %conv6680}681 682define i64 @callee_mixed_ints(i32 %a, i8 signext %b, i32 %c, i16 signext %d, i64 %e) {683; ASM32PWR4-LABEL: callee_mixed_ints:684; ASM32PWR4: # %bb.0: # %entry685; ASM32PWR4-NEXT: clrlwi 4, 4, 24686; ASM32PWR4-NEXT: add 3, 3, 4687; ASM32PWR4-NEXT: add 3, 3, 5688; ASM32PWR4-NEXT: add 3, 3, 6689; ASM32PWR4-NEXT: srawi 5, 3, 31690; ASM32PWR4-NEXT: addc 4, 3, 8691; ASM32PWR4-NEXT: adde 3, 5, 7692; ASM32PWR4-NEXT: blr693;694; ASM64PWR4-LABEL: callee_mixed_ints:695; ASM64PWR4: # %bb.0: # %entry696; ASM64PWR4-NEXT: clrlwi 4, 4, 24697; ASM64PWR4-NEXT: add 3, 3, 4698; ASM64PWR4-NEXT: add 3, 3, 5699; ASM64PWR4-NEXT: add 3, 3, 6700; ASM64PWR4-NEXT: extsw 3, 3701; ASM64PWR4-NEXT: add 3, 3, 7702; ASM64PWR4-NEXT: blr703entry:704 %conv = zext i8 %b to i32705 %add = add nsw i32 %a, %conv706 %add1 = add nsw i32 %add, %c707 %conv2 = sext i16 %d to i32708 %add3 = add nsw i32 %add1, %conv2709 %conv4 = sext i32 %add3 to i64710 %add5 = add nsw i64 %conv4, %e711 ret i64 %add5712 }713 714define void @call_test_vararg() {715; ASM32PWR4-LABEL: call_test_vararg:716; ASM32PWR4: # %bb.0: # %entry717; ASM32PWR4-NEXT: mflr 0718; ASM32PWR4-NEXT: stwu 1, -80(1)719; ASM32PWR4-NEXT: lwz 3, L..C1(2) # @f1720; ASM32PWR4-NEXT: stw 0, 88(1)721; ASM32PWR4-NEXT: lfs 1, 0(3)722; ASM32PWR4-NEXT: lwz 3, L..C2(2) # @d1723; ASM32PWR4-NEXT: stfd 1, 64(1)724; ASM32PWR4-NEXT: lfd 2, 0(3)725; ASM32PWR4-NEXT: li 3, 42726; ASM32PWR4-NEXT: stfd 2, 72(1)727; ASM32PWR4-NEXT: lwz 4, 64(1)728; ASM32PWR4-NEXT: lwz 5, 68(1)729; ASM32PWR4-NEXT: lwz 6, 72(1)730; ASM32PWR4-NEXT: lwz 7, 76(1)731; ASM32PWR4-NEXT: bl .test_vararg[PR]732; ASM32PWR4-NEXT: nop733; ASM32PWR4-NEXT: addi 1, 1, 80734; ASM32PWR4-NEXT: lwz 0, 8(1)735; ASM32PWR4-NEXT: mtlr 0736; ASM32PWR4-NEXT: blr737;738; ASM64PWR4-LABEL: call_test_vararg:739; ASM64PWR4: # %bb.0: # %entry740; ASM64PWR4-NEXT: mflr 0741; ASM64PWR4-NEXT: stdu 1, -128(1)742; ASM64PWR4-NEXT: ld 3, L..C1(2) # @f1743; ASM64PWR4-NEXT: std 0, 144(1)744; ASM64PWR4-NEXT: lfs 1, 0(3)745; ASM64PWR4-NEXT: ld 3, L..C2(2) # @d1746; ASM64PWR4-NEXT: stfd 1, 112(1)747; ASM64PWR4-NEXT: lfd 2, 0(3)748; ASM64PWR4-NEXT: li 3, 42749; ASM64PWR4-NEXT: stfd 2, 120(1)750; ASM64PWR4-NEXT: ld 4, 112(1)751; ASM64PWR4-NEXT: ld 5, 120(1)752; ASM64PWR4-NEXT: bl .test_vararg[PR]753; ASM64PWR4-NEXT: nop754; ASM64PWR4-NEXT: addi 1, 1, 128755; ASM64PWR4-NEXT: ld 0, 16(1)756; ASM64PWR4-NEXT: mtlr 0757; ASM64PWR4-NEXT: blr758entry:759 %0 = load float, ptr @f1, align 4760 %conv = fpext float %0 to double761 %1 = load double, ptr @d1, align 8762 call void (i32, ...) @test_vararg(i32 42, double %conv, double %1)763 ret void764}765 766declare void @test_vararg(i32, ...)767 768define void @call_test_vararg2() {769; ASM32PWR4-LABEL: call_test_vararg2:770; ASM32PWR4: # %bb.0: # %entry771; ASM32PWR4-NEXT: mflr 0772; ASM32PWR4-NEXT: stwu 1, -80(1)773; ASM32PWR4-NEXT: lwz 3, L..C1(2) # @f1774; ASM32PWR4-NEXT: stw 0, 88(1)775; ASM32PWR4-NEXT: li 6, 42776; ASM32PWR4-NEXT: lfs 1, 0(3)777; ASM32PWR4-NEXT: lwz 3, L..C2(2) # @d1778; ASM32PWR4-NEXT: stfd 1, 64(1)779; ASM32PWR4-NEXT: lfd 2, 0(3)780; ASM32PWR4-NEXT: li 3, 42781; ASM32PWR4-NEXT: stfd 2, 72(1)782; ASM32PWR4-NEXT: lwz 4, 64(1)783; ASM32PWR4-NEXT: lwz 5, 68(1)784; ASM32PWR4-NEXT: lwz 7, 72(1)785; ASM32PWR4-NEXT: lwz 8, 76(1)786; ASM32PWR4-NEXT: bl .test_vararg[PR]787; ASM32PWR4-NEXT: nop788; ASM32PWR4-NEXT: addi 1, 1, 80789; ASM32PWR4-NEXT: lwz 0, 8(1)790; ASM32PWR4-NEXT: mtlr 0791; ASM32PWR4-NEXT: blr792;793; ASM64PWR4-LABEL: call_test_vararg2:794; ASM64PWR4: # %bb.0: # %entry795; ASM64PWR4-NEXT: mflr 0796; ASM64PWR4-NEXT: stdu 1, -128(1)797; ASM64PWR4-NEXT: ld 3, L..C1(2) # @f1798; ASM64PWR4-NEXT: std 0, 144(1)799; ASM64PWR4-NEXT: li 5, 42800; ASM64PWR4-NEXT: lfs 1, 0(3)801; ASM64PWR4-NEXT: ld 3, L..C2(2) # @d1802; ASM64PWR4-NEXT: stfd 1, 112(1)803; ASM64PWR4-NEXT: lfd 2, 0(3)804; ASM64PWR4-NEXT: li 3, 42805; ASM64PWR4-NEXT: stfd 2, 120(1)806; ASM64PWR4-NEXT: ld 4, 112(1)807; ASM64PWR4-NEXT: ld 6, 120(1)808; ASM64PWR4-NEXT: bl .test_vararg[PR]809; ASM64PWR4-NEXT: nop810; ASM64PWR4-NEXT: addi 1, 1, 128811; ASM64PWR4-NEXT: ld 0, 16(1)812; ASM64PWR4-NEXT: mtlr 0813; ASM64PWR4-NEXT: blr814entry:815 %0 = load float, ptr @f1, align 4816 %conv = fpext float %0 to double817 %1 = load double, ptr @d1, align 8818 call void (i32, ...) @test_vararg(i32 42, double %conv, i32 42, double %1)819 ret void820}821 822define void @call_test_vararg3() {823; ASM32PWR4-LABEL: call_test_vararg3:824; ASM32PWR4: # %bb.0: # %entry825; ASM32PWR4-NEXT: mflr 0826; ASM32PWR4-NEXT: stwu 1, -80(1)827; ASM32PWR4-NEXT: lwz 3, L..C1(2) # @f1828; ASM32PWR4-NEXT: stw 0, 88(1)829; ASM32PWR4-NEXT: li 6, 0830; ASM32PWR4-NEXT: li 7, 42831; ASM32PWR4-NEXT: lfs 1, 0(3)832; ASM32PWR4-NEXT: lwz 3, L..C2(2) # @d1833; ASM32PWR4-NEXT: stfd 1, 64(1)834; ASM32PWR4-NEXT: lfd 2, 0(3)835; ASM32PWR4-NEXT: li 3, 42836; ASM32PWR4-NEXT: stfd 2, 72(1)837; ASM32PWR4-NEXT: lwz 4, 64(1)838; ASM32PWR4-NEXT: lwz 5, 68(1)839; ASM32PWR4-NEXT: lwz 8, 72(1)840; ASM32PWR4-NEXT: lwz 9, 76(1)841; ASM32PWR4-NEXT: bl .test_vararg[PR]842; ASM32PWR4-NEXT: nop843; ASM32PWR4-NEXT: addi 1, 1, 80844; ASM32PWR4-NEXT: lwz 0, 8(1)845; ASM32PWR4-NEXT: mtlr 0846; ASM32PWR4-NEXT: blr847;848; ASM64PWR4-LABEL: call_test_vararg3:849; ASM64PWR4: # %bb.0: # %entry850; ASM64PWR4-NEXT: mflr 0851; ASM64PWR4-NEXT: stdu 1, -128(1)852; ASM64PWR4-NEXT: ld 3, L..C1(2) # @f1853; ASM64PWR4-NEXT: std 0, 144(1)854; ASM64PWR4-NEXT: li 5, 42855; ASM64PWR4-NEXT: lfs 1, 0(3)856; ASM64PWR4-NEXT: ld 3, L..C2(2) # @d1857; ASM64PWR4-NEXT: stfd 1, 112(1)858; ASM64PWR4-NEXT: lfd 2, 0(3)859; ASM64PWR4-NEXT: li 3, 42860; ASM64PWR4-NEXT: stfd 2, 120(1)861; ASM64PWR4-NEXT: ld 4, 112(1)862; ASM64PWR4-NEXT: ld 6, 120(1)863; ASM64PWR4-NEXT: bl .test_vararg[PR]864; ASM64PWR4-NEXT: nop865; ASM64PWR4-NEXT: addi 1, 1, 128866; ASM64PWR4-NEXT: ld 0, 16(1)867; ASM64PWR4-NEXT: mtlr 0868; ASM64PWR4-NEXT: blr869entry:870 %0 = load float, ptr @f1, align 4871 %conv = fpext float %0 to double872 %1 = load double, ptr @d1, align 8873 call void (i32, ...) @test_vararg(i32 42, double %conv, i64 42, double %1)874 ret void875}876 877define void @call_test_vararg4() {878; ASM32PWR4-LABEL: call_test_vararg4:879; ASM32PWR4: # %bb.0: # %entry880; ASM32PWR4-NEXT: mflr 0881; ASM32PWR4-NEXT: stwu 1, -64(1)882; ASM32PWR4-NEXT: lwz 3, L..C1(2) # @f1883; ASM32PWR4-NEXT: stw 0, 72(1)884; ASM32PWR4-NEXT: lfs 1, 0(3)885; ASM32PWR4-NEXT: li 3, 42886; ASM32PWR4-NEXT: stfs 1, 60(1)887; ASM32PWR4-NEXT: lwz 4, 60(1)888; ASM32PWR4-NEXT: bl .test_vararg[PR]889; ASM32PWR4-NEXT: nop890; ASM32PWR4-NEXT: addi 1, 1, 64891; ASM32PWR4-NEXT: lwz 0, 8(1)892; ASM32PWR4-NEXT: mtlr 0893; ASM32PWR4-NEXT: blr894;895; ASM64PWR4-LABEL: call_test_vararg4:896; ASM64PWR4: # %bb.0: # %entry897; ASM64PWR4-NEXT: mflr 0898; ASM64PWR4-NEXT: stdu 1, -128(1)899; ASM64PWR4-NEXT: ld 3, L..C1(2) # @f1900; ASM64PWR4-NEXT: std 0, 144(1)901; ASM64PWR4-NEXT: lfs 1, 0(3)902; ASM64PWR4-NEXT: li 3, 42903; ASM64PWR4-NEXT: stfs 1, 124(1)904; ASM64PWR4-NEXT: lwz 4, 124(1)905; ASM64PWR4-NEXT: bl .test_vararg[PR]906; ASM64PWR4-NEXT: nop907; ASM64PWR4-NEXT: addi 1, 1, 128908; ASM64PWR4-NEXT: ld 0, 16(1)909; ASM64PWR4-NEXT: mtlr 0910; ASM64PWR4-NEXT: blr911entry:912 %0 = load float, ptr @f1, align 4913 call void (i32, ...) @test_vararg(i32 42, float %0)914 ret void915}916 917@c = common global i8 0, align 1918@si = common global i16 0, align 2919@i = common global i32 0, align 4920@lli = common global i64 0, align 8921@f = common global float 0.000000e+00, align 4922@d = common global double 0.000000e+00, align 8923 924; Basic saving of integral type arguments to the parameter save area.925define void @call_test_stackarg_int() {926; ASM32PWR4-LABEL: call_test_stackarg_int:927; ASM32PWR4: # %bb.0: # %entry928; ASM32PWR4-NEXT: mflr 0929; ASM32PWR4-NEXT: stwu 1, -80(1)930; ASM32PWR4-NEXT: lwz 3, L..C4(2) # @si931; ASM32PWR4-NEXT: stw 0, 88(1)932; ASM32PWR4-NEXT: lwz 4, L..C5(2) # @i933; ASM32PWR4-NEXT: li 6, 4934; ASM32PWR4-NEXT: li 8, 6935; ASM32PWR4-NEXT: li 9, 7936; ASM32PWR4-NEXT: li 10, 8937; ASM32PWR4-NEXT: lha 7, 0(3)938; ASM32PWR4-NEXT: lwz 3, L..C6(2) # @c939; ASM32PWR4-NEXT: lbz 11, 0(3)940; ASM32PWR4-NEXT: lwz 3, L..C7(2) # @lli941; ASM32PWR4-NEXT: lwz 5, 0(4)942; ASM32PWR4-NEXT: lwz 4, 0(3)943; ASM32PWR4-NEXT: lwz 3, 4(3)944; ASM32PWR4-NEXT: stw 5, 76(1)945; ASM32PWR4-NEXT: stw 3, 72(1)946; ASM32PWR4-NEXT: li 3, 1947; ASM32PWR4-NEXT: stw 4, 68(1)948; ASM32PWR4-NEXT: li 4, 2949; ASM32PWR4-NEXT: stw 5, 64(1)950; ASM32PWR4-NEXT: li 5, 3951; ASM32PWR4-NEXT: stw 7, 60(1)952; ASM32PWR4-NEXT: li 7, 5953; ASM32PWR4-NEXT: stw 11, 56(1)954; ASM32PWR4-NEXT: bl .test_stackarg_int[PR]955; ASM32PWR4-NEXT: nop956; ASM32PWR4-NEXT: addi 1, 1, 80957; ASM32PWR4-NEXT: lwz 0, 8(1)958; ASM32PWR4-NEXT: mtlr 0959; ASM32PWR4-NEXT: blr960;961; ASM64PWR4-LABEL: call_test_stackarg_int:962; ASM64PWR4: # %bb.0: # %entry963; ASM64PWR4-NEXT: mflr 0964; ASM64PWR4-NEXT: stdu 1, -160(1)965; ASM64PWR4-NEXT: ld 3, L..C3(2) # @si966; ASM64PWR4-NEXT: std 0, 176(1)967; ASM64PWR4-NEXT: ld 4, L..C4(2) # @i968; ASM64PWR4-NEXT: li 6, 4969; ASM64PWR4-NEXT: li 8, 6970; ASM64PWR4-NEXT: li 9, 7971; ASM64PWR4-NEXT: li 10, 8972; ASM64PWR4-NEXT: lha 7, 0(3)973; ASM64PWR4-NEXT: ld 3, L..C5(2) # @c974; ASM64PWR4-NEXT: lbz 11, 0(3)975; ASM64PWR4-NEXT: ld 3, L..C6(2) # @lli976; ASM64PWR4-NEXT: lwz 5, 0(4)977; ASM64PWR4-NEXT: li 4, 2978; ASM64PWR4-NEXT: ld 3, 0(3)979; ASM64PWR4-NEXT: std 5, 144(1)980; ASM64PWR4-NEXT: std 3, 136(1)981; ASM64PWR4-NEXT: li 3, 1982; ASM64PWR4-NEXT: std 5, 128(1)983; ASM64PWR4-NEXT: li 5, 3984; ASM64PWR4-NEXT: std 7, 120(1)985; ASM64PWR4-NEXT: li 7, 5986; ASM64PWR4-NEXT: std 11, 112(1)987; ASM64PWR4-NEXT: bl .test_stackarg_int[PR]988; ASM64PWR4-NEXT: nop989; ASM64PWR4-NEXT: addi 1, 1, 160990; ASM64PWR4-NEXT: ld 0, 16(1)991; ASM64PWR4-NEXT: mtlr 0992; ASM64PWR4-NEXT: blr993entry:994 %0 = load i8, ptr @c, align 1995 %1 = load i16, ptr @si, align 2996 %2 = load i32, ptr @i, align 4997 %3 = load i64, ptr @lli, align 8998 %4 = load i32, ptr @i, align 4999 call void @test_stackarg_int(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i8 zeroext %0, i16 signext %1, i32 %2, i64 %3, i32 %4)1000 ret void1001}1002 1003declare void @test_stackarg_int(i32, i32, i32, i32, i32, i32, i32, i32, i8 zeroext, i16 signext, i32, i64, i32)1004 1005; Basic saving of floating point type arguments to the parameter save area.1006; The float and double arguments will pass in both fpr as well as parameter save area.1007define void @call_test_stackarg_float() {1008; ASM32PWR4-LABEL: call_test_stackarg_float:1009; ASM32PWR4: # %bb.0: # %entry1010; ASM32PWR4-NEXT: mflr 01011; ASM32PWR4-NEXT: stwu 1, -80(1)1012; ASM32PWR4-NEXT: lwz 3, L..C8(2) # @f1013; ASM32PWR4-NEXT: stw 0, 88(1)1014; ASM32PWR4-NEXT: li 4, 21015; ASM32PWR4-NEXT: li 6, 41016; ASM32PWR4-NEXT: li 7, 51017; ASM32PWR4-NEXT: li 8, 61018; ASM32PWR4-NEXT: lfs 1, 0(3)1019; ASM32PWR4-NEXT: lwz 3, L..C9(2) # @d1020; ASM32PWR4-NEXT: li 9, 71021; ASM32PWR4-NEXT: li 10, 81022; ASM32PWR4-NEXT: lfd 2, 0(3)1023; ASM32PWR4-NEXT: li 3, 11024; ASM32PWR4-NEXT: stfd 2, 72(1)1025; ASM32PWR4-NEXT: lwz 5, 76(1)1026; ASM32PWR4-NEXT: lwz 11, 72(1)1027; ASM32PWR4-NEXT: stw 5, 64(1)1028; ASM32PWR4-NEXT: li 5, 31029; ASM32PWR4-NEXT: stfs 1, 56(1)1030; ASM32PWR4-NEXT: stw 11, 60(1)1031; ASM32PWR4-NEXT: bl .test_stackarg_float[PR]1032; ASM32PWR4-NEXT: nop1033; ASM32PWR4-NEXT: addi 1, 1, 801034; ASM32PWR4-NEXT: lwz 0, 8(1)1035; ASM32PWR4-NEXT: mtlr 01036; ASM32PWR4-NEXT: blr1037;1038; ASM64PWR4-LABEL: call_test_stackarg_float:1039; ASM64PWR4: # %bb.0: # %entry1040; ASM64PWR4-NEXT: mflr 01041; ASM64PWR4-NEXT: stdu 1, -128(1)1042; ASM64PWR4-NEXT: ld 3, L..C7(2) # @f1043; ASM64PWR4-NEXT: std 0, 144(1)1044; ASM64PWR4-NEXT: li 4, 21045; ASM64PWR4-NEXT: li 5, 31046; ASM64PWR4-NEXT: li 6, 41047; ASM64PWR4-NEXT: li 7, 51048; ASM64PWR4-NEXT: lfs 1, 0(3)1049; ASM64PWR4-NEXT: ld 3, L..C8(2) # @d1050; ASM64PWR4-NEXT: li 8, 61051; ASM64PWR4-NEXT: li 9, 71052; ASM64PWR4-NEXT: lfd 2, 0(3)1053; ASM64PWR4-NEXT: li 3, 11054; ASM64PWR4-NEXT: li 10, 81055; ASM64PWR4-NEXT: stfd 2, 120(1)1056; ASM64PWR4-NEXT: stfs 1, 112(1)1057; ASM64PWR4-NEXT: bl .test_stackarg_float[PR]1058; ASM64PWR4-NEXT: nop1059; ASM64PWR4-NEXT: addi 1, 1, 1281060; ASM64PWR4-NEXT: ld 0, 16(1)1061; ASM64PWR4-NEXT: mtlr 01062; ASM64PWR4-NEXT: blr1063entry:1064 %0 = load float, ptr @f, align 41065 %1 = load double, ptr @d, align 81066 call void @test_stackarg_float(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, float %0, double %1)1067 ret void1068}1069 1070declare void @test_stackarg_float(i32, i32, i32, i32, i32, i32, i32, i32, float, double)1071 1072define void @call_test_stackarg_float2() {1073; ASM32PWR4-LABEL: call_test_stackarg_float2:1074; ASM32PWR4: # %bb.0: # %entry1075; ASM32PWR4-NEXT: mflr 01076; ASM32PWR4-NEXT: stwu 1, -64(1)1077; ASM32PWR4-NEXT: lwz 3, L..C9(2) # @d1078; ASM32PWR4-NEXT: stw 0, 72(1)1079; ASM32PWR4-NEXT: li 4, 21080; ASM32PWR4-NEXT: li 5, 31081; ASM32PWR4-NEXT: li 6, 41082; ASM32PWR4-NEXT: li 7, 51083; ASM32PWR4-NEXT: lfd 1, 0(3)1084; ASM32PWR4-NEXT: li 3, 11085; ASM32PWR4-NEXT: li 8, 61086; ASM32PWR4-NEXT: stfd 1, 56(1)1087; ASM32PWR4-NEXT: lwz 9, 56(1)1088; ASM32PWR4-NEXT: lwz 10, 60(1)1089; ASM32PWR4-NEXT: bl .test_stackarg_float2[PR]1090; ASM32PWR4-NEXT: nop1091; ASM32PWR4-NEXT: addi 1, 1, 641092; ASM32PWR4-NEXT: lwz 0, 8(1)1093; ASM32PWR4-NEXT: mtlr 01094; ASM32PWR4-NEXT: blr1095;1096; ASM64PWR4-LABEL: call_test_stackarg_float2:1097; ASM64PWR4: # %bb.0: # %entry1098; ASM64PWR4-NEXT: mflr 01099; ASM64PWR4-NEXT: stdu 1, -128(1)1100; ASM64PWR4-NEXT: ld 3, L..C8(2) # @d1101; ASM64PWR4-NEXT: std 0, 144(1)1102; ASM64PWR4-NEXT: li 4, 21103; ASM64PWR4-NEXT: li 5, 31104; ASM64PWR4-NEXT: li 6, 41105; ASM64PWR4-NEXT: li 7, 51106; ASM64PWR4-NEXT: lfd 1, 0(3)1107; ASM64PWR4-NEXT: li 3, 11108; ASM64PWR4-NEXT: li 8, 61109; ASM64PWR4-NEXT: stfd 1, 120(1)1110; ASM64PWR4-NEXT: ld 9, 120(1)1111; ASM64PWR4-NEXT: bl .test_stackarg_float2[PR]1112; ASM64PWR4-NEXT: nop1113; ASM64PWR4-NEXT: addi 1, 1, 1281114; ASM64PWR4-NEXT: ld 0, 16(1)1115; ASM64PWR4-NEXT: mtlr 01116; ASM64PWR4-NEXT: blr1117entry:1118 %0 = load double, ptr @d, align 81119 call void (i32, i32, i32, i32, i32, i32, ...) @test_stackarg_float2(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, double %0)1120 ret void1121}1122 1123declare void @test_stackarg_float2(i32, i32, i32, i32, i32, i32, ...)1124 1125; A double arg will pass on the stack in PPC32 if there is only one available GPR.1126define void @call_test_stackarg_float3() {1127; ASM32PWR4-LABEL: call_test_stackarg_float3:1128; ASM32PWR4: # %bb.0: # %entry1129; ASM32PWR4-NEXT: mflr 01130; ASM32PWR4-NEXT: stwu 1, -80(1)1131; ASM32PWR4-NEXT: lwz 3, L..C9(2) # @d1132; ASM32PWR4-NEXT: stw 0, 88(1)1133; ASM32PWR4-NEXT: li 5, 31134; ASM32PWR4-NEXT: li 6, 41135; ASM32PWR4-NEXT: li 7, 51136; ASM32PWR4-NEXT: li 8, 61137; ASM32PWR4-NEXT: lfd 1, 0(3)1138; ASM32PWR4-NEXT: lwz 3, L..C8(2) # @f1139; ASM32PWR4-NEXT: li 9, 71140; ASM32PWR4-NEXT: stfd 1, 72(1)1141; ASM32PWR4-NEXT: lfs 2, 0(3)1142; ASM32PWR4-NEXT: li 3, 11143; ASM32PWR4-NEXT: stfd 1, 64(1)1144; ASM32PWR4-NEXT: lwz 4, 68(1)1145; ASM32PWR4-NEXT: lwz 10, 72(1)1146; ASM32PWR4-NEXT: lwz 11, 64(1)1147; ASM32PWR4-NEXT: stw 4, 56(1)1148; ASM32PWR4-NEXT: li 4, 21149; ASM32PWR4-NEXT: stfs 2, 60(1)1150; ASM32PWR4-NEXT: stw 11, 52(1)1151; ASM32PWR4-NEXT: bl .test_stackarg_float3[PR]1152; ASM32PWR4-NEXT: nop1153; ASM32PWR4-NEXT: addi 1, 1, 801154; ASM32PWR4-NEXT: lwz 0, 8(1)1155; ASM32PWR4-NEXT: mtlr 01156; ASM32PWR4-NEXT: blr1157;1158; ASM64PWR4-LABEL: call_test_stackarg_float3:1159; ASM64PWR4: # %bb.0: # %entry1160; ASM64PWR4-NEXT: mflr 01161; ASM64PWR4-NEXT: stdu 1, -128(1)1162; ASM64PWR4-NEXT: ld 3, L..C8(2) # @d1163; ASM64PWR4-NEXT: std 0, 144(1)1164; ASM64PWR4-NEXT: li 4, 21165; ASM64PWR4-NEXT: li 5, 31166; ASM64PWR4-NEXT: li 6, 41167; ASM64PWR4-NEXT: li 7, 51168; ASM64PWR4-NEXT: lfd 1, 0(3)1169; ASM64PWR4-NEXT: ld 3, L..C7(2) # @f1170; ASM64PWR4-NEXT: li 8, 61171; ASM64PWR4-NEXT: li 9, 71172; ASM64PWR4-NEXT: stfd 1, 120(1)1173; ASM64PWR4-NEXT: ld 10, 120(1)1174; ASM64PWR4-NEXT: lfs 2, 0(3)1175; ASM64PWR4-NEXT: li 3, 11176; ASM64PWR4-NEXT: stfs 2, 112(1)1177; ASM64PWR4-NEXT: bl .test_stackarg_float3[PR]1178; ASM64PWR4-NEXT: nop1179; ASM64PWR4-NEXT: addi 1, 1, 1281180; ASM64PWR4-NEXT: ld 0, 16(1)1181; ASM64PWR4-NEXT: mtlr 01182; ASM64PWR4-NEXT: blr1183entry:1184 %0 = load double, ptr @d, align 81185 %1 = load float, ptr @f, align 41186 call void (i32, i32, i32, i32, i32, i32, i32, ...) @test_stackarg_float3(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, double %0, float %1)1187 ret void1188}1189 1190declare void @test_stackarg_float3(i32, i32, i32, i32, i32, i32, i32, ...)1191 1192define i64 @test_ints_stack(i32 %i1, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, i32 %i8, i64 %ll9, i16 signext %s10, i8 zeroext %c11, i32 %ui12, i32 %si13, i64 %ll14, i8 zeroext %uc15, i32 %i16, i8 signext %si8, i1 zeroext %zi1) {1193; ASM32PWR4-LABEL: test_ints_stack:1194; ASM32PWR4: # %bb.0: # %entry1195; ASM32PWR4-NEXT: add 3, 3, 41196; ASM32PWR4-NEXT: stw 31, -4(1) # 4-byte Folded Spill1197; ASM32PWR4-NEXT: add 3, 3, 51198; ASM32PWR4-NEXT: add 3, 3, 61199; ASM32PWR4-NEXT: add 3, 3, 71200; ASM32PWR4-NEXT: lbz 12, 99(1)1201; ASM32PWR4-NEXT: add 3, 3, 81202; ASM32PWR4-NEXT: add 3, 3, 91203; ASM32PWR4-NEXT: lwz 0, 92(1)1204; ASM32PWR4-NEXT: add 3, 3, 101205; ASM32PWR4-NEXT: extsb 4, 121206; ASM32PWR4-NEXT: srawi 8, 3, 311207; ASM32PWR4-NEXT: lwz 31, 76(1)1208; ASM32PWR4-NEXT: srawi 12, 0, 311209; ASM32PWR4-NEXT: lwz 6, 60(1)1210; ASM32PWR4-NEXT: lha 11, 66(1)1211; ASM32PWR4-NEXT: lwz 7, 56(1)1212; ASM32PWR4-NEXT: stw 30, -8(1) # 4-byte Folded Spill1213; ASM32PWR4-NEXT: srawi 30, 31, 311214; ASM32PWR4-NEXT: addc 3, 3, 61215; ASM32PWR4-NEXT: adde 7, 8, 71216; ASM32PWR4-NEXT: lbz 6, 71(1)1217; ASM32PWR4-NEXT: srawi 8, 11, 311218; ASM32PWR4-NEXT: addc 3, 3, 111219; ASM32PWR4-NEXT: adde 7, 7, 81220; ASM32PWR4-NEXT: lwz 9, 72(1)1221; ASM32PWR4-NEXT: addc 3, 3, 61222; ASM32PWR4-NEXT: addze 6, 71223; ASM32PWR4-NEXT: addc 3, 3, 91224; ASM32PWR4-NEXT: lwz 7, 84(1)1225; ASM32PWR4-NEXT: addze 6, 61226; ASM32PWR4-NEXT: addc 3, 3, 311227; ASM32PWR4-NEXT: lwz 5, 80(1)1228; ASM32PWR4-NEXT: adde 6, 6, 301229; ASM32PWR4-NEXT: addc 3, 3, 71230; ASM32PWR4-NEXT: lbz 8, 91(1)1231; ASM32PWR4-NEXT: adde 5, 6, 51232; ASM32PWR4-NEXT: addc 3, 3, 81233; ASM32PWR4-NEXT: lbz 6, 103(1)1234; ASM32PWR4-NEXT: addze 5, 51235; ASM32PWR4-NEXT: addc 3, 3, 01236; ASM32PWR4-NEXT: adde 5, 5, 121237; ASM32PWR4-NEXT: lwz 31, -4(1) # 4-byte Folded Reload1238; ASM32PWR4-NEXT: srawi 7, 4, 311239; ASM32PWR4-NEXT: addc 3, 3, 41240; ASM32PWR4-NEXT: adde 5, 5, 71241; ASM32PWR4-NEXT: lwz 30, -8(1) # 4-byte Folded Reload1242; ASM32PWR4-NEXT: addc 4, 3, 61243; ASM32PWR4-NEXT: addze 3, 51244; ASM32PWR4-NEXT: blr1245;1246; ASM64PWR4-LABEL: test_ints_stack:1247; ASM64PWR4: # %bb.0: # %entry1248; ASM64PWR4-NEXT: add 3, 3, 41249; ASM64PWR4-NEXT: std 31, -8(1) # 8-byte Folded Spill1250; ASM64PWR4-NEXT: add 3, 3, 51251; ASM64PWR4-NEXT: add 3, 3, 61252; ASM64PWR4-NEXT: add 3, 3, 71253; ASM64PWR4-NEXT: std 2, -16(1) # 8-byte Folded Spill1254; ASM64PWR4-NEXT: add 3, 3, 81255; ASM64PWR4-NEXT: add 3, 3, 91256; ASM64PWR4-NEXT: ld 6, 112(1)1257; ASM64PWR4-NEXT: add 3, 3, 101258; ASM64PWR4-NEXT: extsw 3, 31259; ASM64PWR4-NEXT: lha 0, 126(1)1260; ASM64PWR4-NEXT: add 3, 3, 61261; ASM64PWR4-NEXT: add 3, 3, 01262; ASM64PWR4-NEXT: lbz 5, 135(1)1263; ASM64PWR4-NEXT: lwz 7, 140(1)1264; ASM64PWR4-NEXT: add 3, 3, 51265; ASM64PWR4-NEXT: lwa 12, 148(1)1266; ASM64PWR4-NEXT: add 3, 3, 71267; ASM64PWR4-NEXT: add 3, 3, 121268; ASM64PWR4-NEXT: ld 31, 152(1)1269; ASM64PWR4-NEXT: lbz 5, 167(1)1270; ASM64PWR4-NEXT: add 3, 3, 311271; ASM64PWR4-NEXT: lwa 11, 172(1)1272; ASM64PWR4-NEXT: add 3, 3, 51273; ASM64PWR4-NEXT: add 3, 3, 111274; ASM64PWR4-NEXT: lbz 2, 183(1)1275; ASM64PWR4-NEXT: lbz 6, 191(1)1276; ASM64PWR4-NEXT: extsb 4, 21277; ASM64PWR4-NEXT: add 3, 3, 41278; ASM64PWR4-NEXT: add 3, 3, 61279; ASM64PWR4-NEXT: ld 2, -16(1) # 8-byte Folded Reload1280; ASM64PWR4-NEXT: ld 31, -8(1) # 8-byte Folded Reload1281; ASM64PWR4-NEXT: blr1282entry:1283 %add = add nsw i32 %i1, %i21284 %add1 = add nsw i32 %add, %i31285 %add2 = add nsw i32 %add1, %i41286 %add3 = add nsw i32 %add2, %i51287 %add4 = add nsw i32 %add3, %i61288 %add5 = add nsw i32 %add4, %i71289 %add6 = add nsw i32 %add5, %i81290 %conv = sext i32 %add6 to i641291 %add7 = add nsw i64 %conv, %ll91292 %conv8 = sext i16 %s10 to i641293 %add9 = add nsw i64 %add7, %conv81294 %conv10 = zext i8 %c11 to i641295 %add11 = add nsw i64 %add9, %conv101296 %conv12 = zext i32 %ui12 to i641297 %add13 = add nsw i64 %add11, %conv121298 %conv14 = sext i32 %si13 to i641299 %add15 = add nsw i64 %add13, %conv141300 %add16 = add nsw i64 %add15, %ll141301 %conv17 = zext i8 %uc15 to i641302 %add18 = add nsw i64 %add16, %conv171303 %conv19 = sext i32 %i16 to i641304 %add20 = add nsw i64 %add18, %conv191305 %conv21 = sext i8 %si8 to i641306 %add22 = add nsw i64 %add20, %conv211307 %conv23 = zext i1 %zi1 to i641308 %add24 = add nsw i64 %add22, %conv231309 ret i64 %add241310}1311 1312@ll1 = common global i64 0, align 81313@si1 = common global i16 0, align 21314@ch = common global i8 0, align 11315@ui = common global i32 0, align 41316@sint = common global i32 0, align 41317@ll2 = common global i64 0, align 81318@uc1 = common global i8 0, align 11319@i1 = common global i32 0, align 41320 1321define void @caller_ints_stack() {1322; ASM32PWR4-LABEL: caller_ints_stack:1323; ASM32PWR4: # %bb.0: # %entry1324; ASM32PWR4-NEXT: mflr 01325; ASM32PWR4-NEXT: stwu 1, -96(1)1326; ASM32PWR4-NEXT: lwz 3, L..C10(2) # @si11327; ASM32PWR4-NEXT: stw 0, 104(1)1328; ASM32PWR4-NEXT: lwz 4, L..C11(2) # @ch1329; ASM32PWR4-NEXT: lwz 6, L..C12(2) # @sint1330; ASM32PWR4-NEXT: lwz 8, L..C13(2) # @ll21331; ASM32PWR4-NEXT: lwz 10, L..C14(2) # @uc11332; ASM32PWR4-NEXT: lwz 12, L..C15(2) # @i11333; ASM32PWR4-NEXT: lha 5, 0(3)1334; ASM32PWR4-NEXT: lwz 3, L..C16(2) # @ll11335; ASM32PWR4-NEXT: lwz 11, 0(3)1336; ASM32PWR4-NEXT: lwz 7, 4(3)1337; ASM32PWR4-NEXT: lwz 3, L..C17(2) # @ui1338; ASM32PWR4-NEXT: lbz 4, 0(4)1339; ASM32PWR4-NEXT: lwz 3, 0(3)1340; ASM32PWR4-NEXT: lwz 6, 0(6)1341; ASM32PWR4-NEXT: lwz 9, 0(8)1342; ASM32PWR4-NEXT: lwz 8, 4(8)1343; ASM32PWR4-NEXT: lbz 10, 0(10)1344; ASM32PWR4-NEXT: lwz 12, 0(12)1345; ASM32PWR4-NEXT: stw 10, 88(1)1346; ASM32PWR4-NEXT: li 10, 81347; ASM32PWR4-NEXT: stw 8, 84(1)1348; ASM32PWR4-NEXT: li 8, 61349; ASM32PWR4-NEXT: stw 9, 80(1)1350; ASM32PWR4-NEXT: li 9, 71351; ASM32PWR4-NEXT: stw 6, 76(1)1352; ASM32PWR4-NEXT: li 6, 41353; ASM32PWR4-NEXT: stw 3, 72(1)1354; ASM32PWR4-NEXT: li 3, 11355; ASM32PWR4-NEXT: stw 4, 68(1)1356; ASM32PWR4-NEXT: li 4, 21357; ASM32PWR4-NEXT: stw 5, 64(1)1358; ASM32PWR4-NEXT: li 5, 31359; ASM32PWR4-NEXT: stw 7, 60(1)1360; ASM32PWR4-NEXT: li 7, 51361; ASM32PWR4-NEXT: stw 12, 92(1)1362; ASM32PWR4-NEXT: stw 11, 56(1)1363; ASM32PWR4-NEXT: bl .test_ints_stack1364; ASM32PWR4-NEXT: nop1365; ASM32PWR4-NEXT: addi 1, 1, 961366; ASM32PWR4-NEXT: lwz 0, 8(1)1367; ASM32PWR4-NEXT: mtlr 01368; ASM32PWR4-NEXT: blr1369;1370; ASM64PWR4-LABEL: caller_ints_stack:1371; ASM64PWR4: # %bb.0: # %entry1372; ASM64PWR4-NEXT: mflr 01373; ASM64PWR4-NEXT: stdu 1, -176(1)1374; ASM64PWR4-NEXT: ld 3, L..C9(2) # @si11375; ASM64PWR4-NEXT: std 0, 192(1)1376; ASM64PWR4-NEXT: ld 4, L..C10(2) # @ch1377; ASM64PWR4-NEXT: ld 6, L..C11(2) # @ll21378; ASM64PWR4-NEXT: ld 8, L..C12(2) # @uc11379; ASM64PWR4-NEXT: ld 9, L..C13(2) # @i11380; ASM64PWR4-NEXT: li 10, 81381; ASM64PWR4-NEXT: lha 7, 0(3)1382; ASM64PWR4-NEXT: ld 3, L..C14(2) # @ll11383; ASM64PWR4-NEXT: ld 11, 0(3)1384; ASM64PWR4-NEXT: ld 3, L..C15(2) # @ui1385; ASM64PWR4-NEXT: lbz 5, 0(4)1386; ASM64PWR4-NEXT: ld 4, L..C16(2) # @sint1387; ASM64PWR4-NEXT: lwz 3, 0(3)1388; ASM64PWR4-NEXT: lwz 4, 0(4)1389; ASM64PWR4-NEXT: ld 6, 0(6)1390; ASM64PWR4-NEXT: lbz 8, 0(8)1391; ASM64PWR4-NEXT: lwz 9, 0(9)1392; ASM64PWR4-NEXT: std 9, 168(1)1393; ASM64PWR4-NEXT: li 9, 71394; ASM64PWR4-NEXT: std 8, 160(1)1395; ASM64PWR4-NEXT: li 8, 61396; ASM64PWR4-NEXT: std 6, 152(1)1397; ASM64PWR4-NEXT: li 6, 41398; ASM64PWR4-NEXT: std 4, 144(1)1399; ASM64PWR4-NEXT: li 4, 21400; ASM64PWR4-NEXT: std 3, 136(1)1401; ASM64PWR4-NEXT: li 3, 11402; ASM64PWR4-NEXT: std 5, 128(1)1403; ASM64PWR4-NEXT: li 5, 31404; ASM64PWR4-NEXT: std 7, 120(1)1405; ASM64PWR4-NEXT: li 7, 51406; ASM64PWR4-NEXT: std 11, 112(1)1407; ASM64PWR4-NEXT: bl .test_ints_stack1408; ASM64PWR4-NEXT: nop1409; ASM64PWR4-NEXT: addi 1, 1, 1761410; ASM64PWR4-NEXT: ld 0, 16(1)1411; ASM64PWR4-NEXT: mtlr 01412; ASM64PWR4-NEXT: blr1413entry:1414 %0 = load i64, ptr @ll1, align 81415 %1 = load i16, ptr @si1, align 21416 %2 = load i8, ptr @ch, align 11417 %3 = load i32, ptr @ui, align 41418 %4 = load i32, ptr @sint, align 41419 %5 = load i64, ptr @ll2, align 81420 %6 = load i8, ptr @uc1, align 11421 %7 = load i32, ptr @i1, align 41422 %call = call i64 @test_ints_stack(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i64 %0, i16 signext %1, i8 zeroext %2, i32 %3, i32 %4, i64 %5, i8 zeroext %6, i32 %7)1423 ret void1424}1425 1426@globali1 = global i8 0, align 11427 1428define void @test_i1_stack(i32 %a, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h, i32 %i, i1 zeroext %b) {1429; ASM32PWR4-LABEL: test_i1_stack:1430; ASM32PWR4: # %bb.0: # %entry1431; ASM32PWR4-NEXT: lbz 3, 59(1)1432; ASM32PWR4-NEXT: lwz 4, L..C18(2) # @globali11433; ASM32PWR4-NEXT: stb 3, 0(4)1434; ASM32PWR4-NEXT: blr1435;1436; ASM64PWR4-LABEL: test_i1_stack:1437; ASM64PWR4: # %bb.0: # %entry1438; ASM64PWR4-NEXT: lbz 3, 119(1)1439; ASM64PWR4-NEXT: ld 4, L..C17(2) # @globali11440; ASM64PWR4-NEXT: stb 3, 0(4)1441; ASM64PWR4-NEXT: blr1442 entry:1443 %frombool = zext i1 %b to i81444 store i8 %frombool, ptr @globali1, align 11445 ret void1446}1447 1448define void @call_test_i1_stack() {1449; ASM32PWR4-LABEL: call_test_i1_stack:1450; ASM32PWR4: # %bb.0: # %entry1451; ASM32PWR4-NEXT: mflr 01452; ASM32PWR4-NEXT: stwu 1, -64(1)1453; ASM32PWR4-NEXT: li 11, 11454; ASM32PWR4-NEXT: li 3, 11455; ASM32PWR4-NEXT: stw 0, 72(1)1456; ASM32PWR4-NEXT: li 4, 21457; ASM32PWR4-NEXT: li 5, 31458; ASM32PWR4-NEXT: stw 11, 56(1)1459; ASM32PWR4-NEXT: li 6, 41460; ASM32PWR4-NEXT: li 7, 51461; ASM32PWR4-NEXT: li 8, 61462; ASM32PWR4-NEXT: li 9, 71463; ASM32PWR4-NEXT: li 10, 81464; ASM32PWR4-NEXT: bl .test_i1_stack1465; ASM32PWR4-NEXT: nop1466; ASM32PWR4-NEXT: addi 1, 1, 641467; ASM32PWR4-NEXT: lwz 0, 8(1)1468; ASM32PWR4-NEXT: mtlr 01469; ASM32PWR4-NEXT: blr1470;1471; ASM64PWR4-LABEL: call_test_i1_stack:1472; ASM64PWR4: # %bb.0: # %entry1473; ASM64PWR4-NEXT: mflr 01474; ASM64PWR4-NEXT: stdu 1, -128(1)1475; ASM64PWR4-NEXT: li 11, 11476; ASM64PWR4-NEXT: li 3, 11477; ASM64PWR4-NEXT: std 0, 144(1)1478; ASM64PWR4-NEXT: li 4, 21479; ASM64PWR4-NEXT: li 5, 31480; ASM64PWR4-NEXT: std 11, 112(1)1481; ASM64PWR4-NEXT: li 6, 41482; ASM64PWR4-NEXT: li 7, 51483; ASM64PWR4-NEXT: li 8, 61484; ASM64PWR4-NEXT: li 9, 71485; ASM64PWR4-NEXT: li 10, 81486; ASM64PWR4-NEXT: bl .test_i1_stack1487; ASM64PWR4-NEXT: nop1488; ASM64PWR4-NEXT: addi 1, 1, 1281489; ASM64PWR4-NEXT: ld 0, 16(1)1490; ASM64PWR4-NEXT: mtlr 01491; ASM64PWR4-NEXT: blr1492 entry:1493 call void @test_i1_stack(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i1 true)1494 ret void1495}1496 1497define double @test_fpr_stack(double %d1, double %d2, double %d3, double %d4, double %d5, double %d6, double %d7, double %d8, double %d9, double %s10, double %l11, double %d12, double %d13, float %f14, double %d15, float %f16) {1498; ASM32PWR4-LABEL: test_fpr_stack:1499; ASM32PWR4: # %bb.0: # %entry1500; ASM32PWR4-NEXT: fadd 0, 1, 21501; ASM32PWR4-NEXT: lfs 1, 128(1)1502; ASM32PWR4-NEXT: fadd 0, 0, 31503; ASM32PWR4-NEXT: lfd 2, 132(1)1504; ASM32PWR4-NEXT: fadd 0, 0, 41505; ASM32PWR4-NEXT: fadd 0, 0, 51506; ASM32PWR4-NEXT: fadd 0, 0, 61507; ASM32PWR4-NEXT: fadd 0, 0, 71508; ASM32PWR4-NEXT: fadd 0, 0, 81509; ASM32PWR4-NEXT: fadd 0, 0, 91510; ASM32PWR4-NEXT: fadd 0, 0, 101511; ASM32PWR4-NEXT: fadd 0, 0, 111512; ASM32PWR4-NEXT: fadd 0, 0, 121513; ASM32PWR4-NEXT: fadd 0, 0, 131514; ASM32PWR4-NEXT: fadd 0, 0, 131515; ASM32PWR4-NEXT: fadd 0, 0, 11516; ASM32PWR4-NEXT: lfs 1, 140(1)1517; ASM32PWR4-NEXT: fadd 0, 0, 21518; ASM32PWR4-NEXT: fadd 1, 0, 11519; ASM32PWR4-NEXT: blr1520;1521; ASM64PWR4-LABEL: test_fpr_stack:1522; ASM64PWR4: # %bb.0: # %entry1523; ASM64PWR4-NEXT: fadd 0, 1, 21524; ASM64PWR4-NEXT: lfs 1, 152(1)1525; ASM64PWR4-NEXT: fadd 0, 0, 31526; ASM64PWR4-NEXT: lfd 2, 160(1)1527; ASM64PWR4-NEXT: fadd 0, 0, 41528; ASM64PWR4-NEXT: fadd 0, 0, 51529; ASM64PWR4-NEXT: fadd 0, 0, 61530; ASM64PWR4-NEXT: fadd 0, 0, 71531; ASM64PWR4-NEXT: fadd 0, 0, 81532; ASM64PWR4-NEXT: fadd 0, 0, 91533; ASM64PWR4-NEXT: fadd 0, 0, 101534; ASM64PWR4-NEXT: fadd 0, 0, 111535; ASM64PWR4-NEXT: fadd 0, 0, 121536; ASM64PWR4-NEXT: fadd 0, 0, 131537; ASM64PWR4-NEXT: fadd 0, 0, 131538; ASM64PWR4-NEXT: fadd 0, 0, 11539; ASM64PWR4-NEXT: lfs 1, 168(1)1540; ASM64PWR4-NEXT: fadd 0, 0, 21541; ASM64PWR4-NEXT: fadd 1, 0, 11542; ASM64PWR4-NEXT: blr1543 entry:1544 %add = fadd double %d1, %d21545 %add1 = fadd double %add, %d31546 %add2 = fadd double %add1, %d41547 %add3 = fadd double %add2, %d51548 %add4 = fadd double %add3, %d61549 %add5 = fadd double %add4, %d71550 %add6 = fadd double %add5, %d81551 %add7 = fadd double %add6, %d91552 %add8 = fadd double %add7, %s101553 %add9 = fadd double %add8, %l111554 %add10 = fadd double %add9, %d121555 %add11 = fadd double %add10, %d131556 %add12 = fadd double %add11, %d131557 %conv = fpext float %f14 to double1558 %add13 = fadd double %add12, %conv1559 %add14 = fadd double %add13, %d151560 %conv15 = fpext float %f16 to double1561 %add16 = fadd double %add14, %conv151562 ret double %add161563 }1564 1565@f14 = common global float 0.000000e+00, align 41566@d15 = common global double 0.000000e+00, align 81567@f16 = common global float 0.000000e+00, align 41568 1569define void @caller_fpr_stack() {1570; ASM32PWR4-LABEL: caller_fpr_stack:1571; ASM32PWR4: # %bb.0: # %entry1572; ASM32PWR4-NEXT: mflr 01573; ASM32PWR4-NEXT: stwu 1, -160(1)1574; ASM32PWR4-NEXT: lwz 3, L..C19(2) # @d151575; ASM32PWR4-NEXT: stw 0, 168(1)1576; ASM32PWR4-NEXT: lwz 5, L..C20(2) # %const.11577; ASM32PWR4-NEXT: lwz 4, L..C21(2) # @f141578; ASM32PWR4-NEXT: lfd 0, 0(3)1579; ASM32PWR4-NEXT: lwz 3, L..C22(2) # @f161580; ASM32PWR4-NEXT: lwz 3, 0(3)1581; ASM32PWR4-NEXT: stw 3, 140(1)1582; ASM32PWR4-NEXT: li 3, 01583; ASM32PWR4-NEXT: stw 3, 60(1)1584; ASM32PWR4-NEXT: lis 3, 163521585; ASM32PWR4-NEXT: stw 3, 56(1)1586; ASM32PWR4-NEXT: lis 3, 131071587; ASM32PWR4-NEXT: ori 3, 3, 131071588; ASM32PWR4-NEXT: stw 3, 68(1)1589; ASM32PWR4-NEXT: lis 3, 163551590; ASM32PWR4-NEXT: ori 3, 3, 131071591; ASM32PWR4-NEXT: stw 3, 64(1)1592; ASM32PWR4-NEXT: lis 3, 262141593; ASM32PWR4-NEXT: ori 3, 3, 262141594; ASM32PWR4-NEXT: stw 3, 76(1)1595; ASM32PWR4-NEXT: lis 3, 163581596; ASM32PWR4-NEXT: ori 3, 3, 262141597; ASM32PWR4-NEXT: stw 3, 72(1)1598; ASM32PWR4-NEXT: lis 3, -262151599; ASM32PWR4-NEXT: ori 3, 3, 393221600; ASM32PWR4-NEXT: stw 3, 84(1)1601; ASM32PWR4-NEXT: stw 3, 100(1)1602; ASM32PWR4-NEXT: lis 3, 163131603; ASM32PWR4-NEXT: ori 3, 3, 393211604; ASM32PWR4-NEXT: stw 3, 96(1)1605; ASM32PWR4-NEXT: lis 3, -157291606; ASM32PWR4-NEXT: ori 3, 3, 235931607; ASM32PWR4-NEXT: stw 3, 108(1)1608; ASM32PWR4-NEXT: lis 3, 163161609; ASM32PWR4-NEXT: ori 3, 3, 104851610; ASM32PWR4-NEXT: stw 3, 104(1)1611; ASM32PWR4-NEXT: lis 3, -52431612; ASM32PWR4-NEXT: ori 3, 3, 78641613; ASM32PWR4-NEXT: stw 3, 116(1)1614; ASM32PWR4-NEXT: lis 3, 163181615; ASM32PWR4-NEXT: ori 3, 3, 471851616; ASM32PWR4-NEXT: stw 3, 112(1)1617; ASM32PWR4-NEXT: lis 3, 26211618; ASM32PWR4-NEXT: ori 3, 3, 288361619; ASM32PWR4-NEXT: stw 3, 124(1)1620; ASM32PWR4-NEXT: lis 3, 163201621; ASM32PWR4-NEXT: ori 3, 3, 419431622; ASM32PWR4-NEXT: stw 3, 120(1)1623; ASM32PWR4-NEXT: lwz 3, L..C23(2) # %const.01624; ASM32PWR4-NEXT: lfd 2, 0(3)1625; ASM32PWR4-NEXT: lwz 3, L..C24(2) # %const.21626; ASM32PWR4-NEXT: lfd 3, 0(5)1627; ASM32PWR4-NEXT: lwz 5, L..C25(2) # %const.31628; ASM32PWR4-NEXT: lfd 4, 0(3)1629; ASM32PWR4-NEXT: lwz 3, L..C26(2) # %const.41630; ASM32PWR4-NEXT: lfd 6, 0(5)1631; ASM32PWR4-NEXT: lwz 5, L..C27(2) # %const.51632; ASM32PWR4-NEXT: lwz 4, 0(4)1633; ASM32PWR4-NEXT: lfd 7, 0(3)1634; ASM32PWR4-NEXT: lwz 3, L..C28(2) # %const.61635; ASM32PWR4-NEXT: lfd 8, 0(5)1636; ASM32PWR4-NEXT: lwz 5, L..C29(2) # %const.71637; ASM32PWR4-NEXT: stw 4, 128(1)1638; ASM32PWR4-NEXT: lis 4, 163611639; ASM32PWR4-NEXT: ori 4, 4, 393211640; ASM32PWR4-NEXT: lfd 9, 0(3)1641; ASM32PWR4-NEXT: lwz 3, L..C30(2) # %const.81642; ASM32PWR4-NEXT: lfd 1, 0(5)1643; ASM32PWR4-NEXT: lwz 5, L..C31(2) # %const.91644; ASM32PWR4-NEXT: stw 4, 80(1)1645; ASM32PWR4-NEXT: lis 4, -131081646; ASM32PWR4-NEXT: fmr 10, 11647; ASM32PWR4-NEXT: ori 4, 4, 524291648; ASM32PWR4-NEXT: lfd 11, 0(3)1649; ASM32PWR4-NEXT: lwz 3, L..C32(2) # %const.101650; ASM32PWR4-NEXT: lfd 12, 0(5)1651; ASM32PWR4-NEXT: lwz 5, L..C33(2) # %const.111652; ASM32PWR4-NEXT: stw 4, 92(1)1653; ASM32PWR4-NEXT: lis 4, 163641654; ASM32PWR4-NEXT: ori 4, 4, 524281655; ASM32PWR4-NEXT: stfd 0, 152(1)1656; ASM32PWR4-NEXT: stw 4, 88(1)1657; ASM32PWR4-NEXT: lwz 4, 156(1)1658; ASM32PWR4-NEXT: lfd 13, 0(3)1659; ASM32PWR4-NEXT: lfs 5, 0(5)1660; ASM32PWR4-NEXT: lwz 3, 152(1)1661; ASM32PWR4-NEXT: stw 4, 136(1)1662; ASM32PWR4-NEXT: stw 3, 132(1)1663; ASM32PWR4-NEXT: bl .test_fpr_stack1664; ASM32PWR4-NEXT: nop1665; ASM32PWR4-NEXT: addi 1, 1, 1601666; ASM32PWR4-NEXT: lwz 0, 8(1)1667; ASM32PWR4-NEXT: mtlr 01668; ASM32PWR4-NEXT: blr1669;1670; ASM64PWR4-LABEL: caller_fpr_stack:1671; ASM64PWR4: # %bb.0: # %entry1672; ASM64PWR4-NEXT: mflr 01673; ASM64PWR4-NEXT: stdu 1, -176(1)1674; ASM64PWR4-NEXT: ld 3, L..C18(2) # @f141675; ASM64PWR4-NEXT: std 0, 192(1)1676; ASM64PWR4-NEXT: ld 4, L..C19(2) # @d151677; ASM64PWR4-NEXT: ld 5, L..C20(2) # @f161678; ASM64PWR4-NEXT: ld 6, L..C21(2) # %const.91679; ASM64PWR4-NEXT: lis 7, 163131680; ASM64PWR4-NEXT: lwz 3, 0(3)1681; ASM64PWR4-NEXT: ld 4, 0(4)1682; ASM64PWR4-NEXT: stw 3, 152(1)1683; ASM64PWR4-NEXT: ld 3, L..C22(2) # %const.01684; ASM64PWR4-NEXT: std 4, 160(1)1685; ASM64PWR4-NEXT: ld 4, L..C23(2) # %const.11686; ASM64PWR4-NEXT: lfd 2, 0(3)1687; ASM64PWR4-NEXT: ld 3, L..C24(2) # %const.21688; ASM64PWR4-NEXT: lfd 3, 0(4)1689; ASM64PWR4-NEXT: ld 4, L..C25(2) # %const.31690; ASM64PWR4-NEXT: lfd 4, 0(3)1691; ASM64PWR4-NEXT: ld 3, L..C26(2) # %const.41692; ASM64PWR4-NEXT: lfd 6, 0(4)1693; ASM64PWR4-NEXT: ld 4, L..C27(2) # %const.51694; ASM64PWR4-NEXT: lfd 7, 0(3)1695; ASM64PWR4-NEXT: ld 3, L..C28(2) # %const.61696; ASM64PWR4-NEXT: lfd 8, 0(4)1697; ASM64PWR4-NEXT: ld 4, L..C29(2) # %const.71698; ASM64PWR4-NEXT: lfd 9, 0(3)1699; ASM64PWR4-NEXT: ld 3, L..C30(2) # %const.81700; ASM64PWR4-NEXT: lwz 5, 0(5)1701; ASM64PWR4-NEXT: lfd 1, 0(4)1702; ASM64PWR4-NEXT: lis 4, 163201703; ASM64PWR4-NEXT: ori 4, 4, 419431704; ASM64PWR4-NEXT: rldic 4, 4, 32, 21705; ASM64PWR4-NEXT: lfd 11, 0(3)1706; ASM64PWR4-NEXT: lis 3, 163161707; ASM64PWR4-NEXT: fmr 10, 11708; ASM64PWR4-NEXT: ori 3, 3, 104851709; ASM64PWR4-NEXT: oris 4, 4, 26211710; ASM64PWR4-NEXT: stw 5, 168(1)1711; ASM64PWR4-NEXT: lis 5, 163181712; ASM64PWR4-NEXT: rldic 3, 3, 32, 21713; ASM64PWR4-NEXT: ori 5, 5, 471851714; ASM64PWR4-NEXT: ori 4, 4, 288361715; ASM64PWR4-NEXT: lfd 12, 0(6)1716; ASM64PWR4-NEXT: ld 6, L..C31(2) # %const.101717; ASM64PWR4-NEXT: oris 3, 3, 498071718; ASM64PWR4-NEXT: ori 3, 3, 235931719; ASM64PWR4-NEXT: std 4, 144(1)1720; ASM64PWR4-NEXT: rldic 4, 5, 32, 21721; ASM64PWR4-NEXT: oris 4, 4, 602931722; ASM64PWR4-NEXT: ori 4, 4, 78641723; ASM64PWR4-NEXT: std 3, 128(1)1724; ASM64PWR4-NEXT: ld 3, L..C32(2) # %const.111725; ASM64PWR4-NEXT: ori 5, 7, 393211726; ASM64PWR4-NEXT: rldic 5, 5, 32, 21727; ASM64PWR4-NEXT: std 4, 136(1)1728; ASM64PWR4-NEXT: lis 4, 40911729; ASM64PWR4-NEXT: ori 4, 4, 131071730; ASM64PWR4-NEXT: rldic 4, 4, 34, 21731; ASM64PWR4-NEXT: lfs 5, 0(3)1732; ASM64PWR4-NEXT: oris 3, 5, 393211733; ASM64PWR4-NEXT: ori 3, 3, 393221734; ASM64PWR4-NEXT: lfd 13, 0(6)1735; ASM64PWR4-NEXT: std 3, 120(1)1736; ASM64PWR4-NEXT: oris 3, 4, 524281737; ASM64PWR4-NEXT: ori 3, 3, 524291738; ASM64PWR4-NEXT: std 3, 112(1)1739; ASM64PWR4-NEXT: bl .test_fpr_stack1740; ASM64PWR4-NEXT: nop1741; ASM64PWR4-NEXT: addi 1, 1, 1761742; ASM64PWR4-NEXT: ld 0, 16(1)1743; ASM64PWR4-NEXT: mtlr 01744; ASM64PWR4-NEXT: blr1745entry:1746 %0 = load float, ptr @f14, align 41747 %1 = load double, ptr @d15, align 81748 %2 = load float, ptr @f16, align 41749 %call = call double @test_fpr_stack(double 1.000000e-01, double 2.000000e-01, double 3.000000e-01, double 4.000000e-01, double 5.000000e-01, double 6.000000e-01, double 0x3FE6666666666666, double 8.000000e-01, double 9.000000e-01, double 1.000000e-01, double 1.100000e-01, double 1.200000e-01, double 1.300000e-01, float %0, double %1, float %2)1750 ret void1751}1752 1753define i32 @mix_callee(double %d1, double %d2, double %d3, double %d4, i8 zeroext %c1, i16 signext %s1, i64 %ll1, i32 %i1, i32 %i2, i32 %i3) {1754; ASM32PWR4-LABEL: mix_callee:1755; ASM32PWR4: # %bb.0: # %entry1756; ASM32PWR4-NEXT: lha 3, 62(1)1757; ASM32PWR4-NEXT: lis 8, 172001758; ASM32PWR4-NEXT: fadd 1, 1, 21759; ASM32PWR4-NEXT: fadd 1, 1, 31760; ASM32PWR4-NEXT: lbz 5, 59(1)1761; ASM32PWR4-NEXT: fadd 1, 1, 41762; ASM32PWR4-NEXT: lwz 4, 68(1)1763; ASM32PWR4-NEXT: add 3, 5, 31764; ASM32PWR4-NEXT: lwz 5, L..C34(2) # %const.01765; ASM32PWR4-NEXT: lwz 6, 72(1)1766; ASM32PWR4-NEXT: add 3, 3, 41767; ASM32PWR4-NEXT: lwz 7, 76(1)1768; ASM32PWR4-NEXT: add 3, 3, 61769; ASM32PWR4-NEXT: stw 8, -16(1)1770; ASM32PWR4-NEXT: add 3, 3, 71771; ASM32PWR4-NEXT: lwz 8, 80(1)1772; ASM32PWR4-NEXT: add 3, 3, 81773; ASM32PWR4-NEXT: lfs 0, 0(5)1774; ASM32PWR4-NEXT: xoris 3, 3, 327681775; ASM32PWR4-NEXT: stw 3, -12(1)1776; ASM32PWR4-NEXT: addi 3, 1, -41777; ASM32PWR4-NEXT: lfd 2, -16(1)1778; ASM32PWR4-NEXT: fsub 0, 2, 01779; ASM32PWR4-NEXT: fadd 0, 0, 11780; ASM32PWR4-NEXT: fctiwz 0, 01781; ASM32PWR4-NEXT: stfiwx 0, 0, 31782; ASM32PWR4-NEXT: lwz 3, -4(1)1783; ASM32PWR4-NEXT: blr1784;1785; ASM64PWR4-LABEL: mix_callee:1786; ASM64PWR4: # %bb.0: # %entry1787; ASM64PWR4-NEXT: lwz 3, 116(1)1788; ASM64PWR4-NEXT: add 4, 7, 81789; ASM64PWR4-NEXT: fadd 0, 1, 21790; ASM64PWR4-NEXT: add 4, 4, 91791; ASM64PWR4-NEXT: fadd 0, 0, 31792; ASM64PWR4-NEXT: add 4, 4, 101793; ASM64PWR4-NEXT: lwz 5, 124(1)1794; ASM64PWR4-NEXT: add 3, 4, 31795; ASM64PWR4-NEXT: add 3, 3, 51796; ASM64PWR4-NEXT: fadd 0, 0, 41797; ASM64PWR4-NEXT: extsw 3, 31798; ASM64PWR4-NEXT: std 3, -16(1)1799; ASM64PWR4-NEXT: addi 3, 1, -41800; ASM64PWR4-NEXT: lfd 1, -16(1)1801; ASM64PWR4-NEXT: fcfid 1, 11802; ASM64PWR4-NEXT: fadd 0, 1, 01803; ASM64PWR4-NEXT: fctiwz 0, 01804; ASM64PWR4-NEXT: stfiwx 0, 0, 31805; ASM64PWR4-NEXT: lwz 3, -4(1)1806; ASM64PWR4-NEXT: blr1807 entry:1808 %add = fadd double %d1, %d21809 %add1 = fadd double %add, %d31810 %add2 = fadd double %add1, %d41811 %conv = zext i8 %c1 to i321812 %conv3 = sext i16 %s1 to i321813 %add4 = add nsw i32 %conv, %conv31814 %conv5 = sext i32 %add4 to i641815 %add6 = add nsw i64 %conv5, %ll11816 %conv7 = sext i32 %i1 to i641817 %add8 = add nsw i64 %add6, %conv71818 %conv9 = sext i32 %i2 to i641819 %add10 = add nsw i64 %add8, %conv91820 %conv11 = sext i32 %i3 to i641821 %add12 = add nsw i64 %add10, %conv111822 %conv13 = trunc i64 %add12 to i321823 %conv14 = sitofp i32 %conv13 to double1824 %add15 = fadd double %conv14, %add21825 %conv16 = fptosi double %add15 to i321826 ret i32 %conv161827 }1828 1829define void @caller_mix() {1830; ASM32PWR4-LABEL: caller_mix:1831; ASM32PWR4: # %bb.0: # %entry1832; ASM32PWR4-NEXT: mflr 01833; ASM32PWR4-NEXT: stwu 1, -96(1)1834; ASM32PWR4-NEXT: li 3, 601835; ASM32PWR4-NEXT: stw 0, 104(1)1836; ASM32PWR4-NEXT: stw 3, 80(1)1837; ASM32PWR4-NEXT: li 3, 501838; ASM32PWR4-NEXT: stw 3, 76(1)1839; ASM32PWR4-NEXT: li 3, 401840; ASM32PWR4-NEXT: stw 3, 72(1)1841; ASM32PWR4-NEXT: li 3, 01842; ASM32PWR4-NEXT: stw 3, 64(1)1843; ASM32PWR4-NEXT: li 3, 21844; ASM32PWR4-NEXT: stw 3, 60(1)1845; ASM32PWR4-NEXT: lwz 3, L..C35(2) # %const.01846; ASM32PWR4-NEXT: lfd 1, 0(3)1847; ASM32PWR4-NEXT: lwz 3, L..C36(2) # %const.11848; ASM32PWR4-NEXT: lfd 2, 0(3)1849; ASM32PWR4-NEXT: lwz 3, L..C37(2) # %const.21850; ASM32PWR4-NEXT: lfd 3, 0(3)1851; ASM32PWR4-NEXT: lwz 3, L..C38(2) # %const.31852; ASM32PWR4-NEXT: lfd 4, 0(3)1853; ASM32PWR4-NEXT: li 3, 11854; ASM32PWR4-NEXT: stw 3, 56(1)1855; ASM32PWR4-NEXT: lis 3, 4571856; ASM32PWR4-NEXT: ori 3, 3, 500481857; ASM32PWR4-NEXT: stw 3, 68(1)1858; ASM32PWR4-NEXT: bl .mix_callee1859; ASM32PWR4-NEXT: nop1860; ASM32PWR4-NEXT: addi 1, 1, 961861; ASM32PWR4-NEXT: lwz 0, 8(1)1862; ASM32PWR4-NEXT: mtlr 01863; ASM32PWR4-NEXT: blr1864;1865; ASM64PWR4-LABEL: caller_mix:1866; ASM64PWR4: # %bb.0: # %entry1867; ASM64PWR4-NEXT: mflr 01868; ASM64PWR4-NEXT: stdu 1, -128(1)1869; ASM64PWR4-NEXT: ld 3, L..C33(2) # %const.01870; ASM64PWR4-NEXT: ld 4, L..C34(2) # %const.11871; ASM64PWR4-NEXT: lis 5, 4571872; ASM64PWR4-NEXT: li 7, 11873; ASM64PWR4-NEXT: std 0, 144(1)1874; ASM64PWR4-NEXT: ori 9, 5, 500481875; ASM64PWR4-NEXT: li 8, 21876; ASM64PWR4-NEXT: lfd 1, 0(3)1877; ASM64PWR4-NEXT: ld 3, L..C35(2) # %const.21878; ASM64PWR4-NEXT: li 10, 401879; ASM64PWR4-NEXT: lfd 2, 0(4)1880; ASM64PWR4-NEXT: ld 4, L..C36(2) # %const.31881; ASM64PWR4-NEXT: lfd 3, 0(3)1882; ASM64PWR4-NEXT: li 3, 601883; ASM64PWR4-NEXT: lfd 4, 0(4)1884; ASM64PWR4-NEXT: li 4, 501885; ASM64PWR4-NEXT: std 3, 120(1)1886; ASM64PWR4-NEXT: std 4, 112(1)1887; ASM64PWR4-NEXT: bl .mix_callee1888; ASM64PWR4-NEXT: nop1889; ASM64PWR4-NEXT: addi 1, 1, 1281890; ASM64PWR4-NEXT: ld 0, 16(1)1891; ASM64PWR4-NEXT: mtlr 01892; ASM64PWR4-NEXT: blr1893 entry:1894%call = call i32 @mix_callee(double 1.000000e-01, double 2.000000e-01, double 3.000000e-01, double 4.000000e-01, i8 zeroext 1, i16 signext 2, i64 30000000, i32 40, i32 50, i32 60)1895 ret void1896 }1897 1898 define i32 @mix_floats(i32 %i1, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, i32 %i8, double %d1, double %d2, double %d3, double %d4, double %d5, double %d6, double %d7, double %d8, double %d9, double %d10, double %d11, double %d12, double %d13, double %d14) {1899; ASM32PWR4-LABEL: mix_floats:1900; ASM32PWR4: # %bb.0: # %entry1901; ASM32PWR4-NEXT: add 3, 3, 41902; ASM32PWR4-NEXT: lwz 4, L..C39(2) # %const.01903; ASM32PWR4-NEXT: lis 11, 172001904; ASM32PWR4-NEXT: stfd 31, -8(1) # 8-byte Folded Spill1905; ASM32PWR4-NEXT: add 3, 3, 51906; ASM32PWR4-NEXT: add 3, 3, 61907; ASM32PWR4-NEXT: add 3, 3, 71908; ASM32PWR4-NEXT: stw 11, -24(1)1909; ASM32PWR4-NEXT: add 3, 3, 81910; ASM32PWR4-NEXT: add 3, 3, 91911; ASM32PWR4-NEXT: add 3, 3, 101912; ASM32PWR4-NEXT: lfs 0, 0(4)1913; ASM32PWR4-NEXT: xoris 3, 3, 327681914; ASM32PWR4-NEXT: stw 3, -20(1)1915; ASM32PWR4-NEXT: addi 3, 1, -121916; ASM32PWR4-NEXT: lfd 31, -24(1)1917; ASM32PWR4-NEXT: fsub 0, 31, 01918; ASM32PWR4-NEXT: fadd 0, 0, 11919; ASM32PWR4-NEXT: lfd 1, 160(1)1920; ASM32PWR4-NEXT: fadd 0, 0, 21921; ASM32PWR4-NEXT: fadd 0, 0, 31922; ASM32PWR4-NEXT: fadd 0, 0, 41923; ASM32PWR4-NEXT: fadd 0, 0, 51924; ASM32PWR4-NEXT: fadd 0, 0, 61925; ASM32PWR4-NEXT: fadd 0, 0, 71926; ASM32PWR4-NEXT: fadd 0, 0, 81927; ASM32PWR4-NEXT: fadd 0, 0, 91928; ASM32PWR4-NEXT: fadd 0, 0, 101929; ASM32PWR4-NEXT: fadd 0, 0, 111930; ASM32PWR4-NEXT: fadd 0, 0, 121931; ASM32PWR4-NEXT: fadd 0, 0, 131932; ASM32PWR4-NEXT: fadd 0, 0, 11933; ASM32PWR4-NEXT: fctiwz 0, 01934; ASM32PWR4-NEXT: stfiwx 0, 0, 31935; ASM32PWR4-NEXT: lwz 3, -12(1)1936; ASM32PWR4-NEXT: lfd 31, -8(1) # 8-byte Folded Reload1937; ASM32PWR4-NEXT: blr1938;1939; ASM64PWR4-LABEL: mix_floats:1940; ASM64PWR4: # %bb.0: # %entry1941; ASM64PWR4-NEXT: add 3, 3, 41942; ASM64PWR4-NEXT: add 3, 3, 51943; ASM64PWR4-NEXT: add 3, 3, 61944; ASM64PWR4-NEXT: add 3, 3, 71945; ASM64PWR4-NEXT: add 3, 3, 81946; ASM64PWR4-NEXT: add 3, 3, 91947; ASM64PWR4-NEXT: add 3, 3, 101948; ASM64PWR4-NEXT: extsw 3, 31949; ASM64PWR4-NEXT: std 3, -16(1)1950; ASM64PWR4-NEXT: addi 3, 1, -41951; ASM64PWR4-NEXT: lfd 0, -16(1)1952; ASM64PWR4-NEXT: fcfid 0, 01953; ASM64PWR4-NEXT: fadd 0, 0, 11954; ASM64PWR4-NEXT: lfd 1, 216(1)1955; ASM64PWR4-NEXT: fadd 0, 0, 21956; ASM64PWR4-NEXT: fadd 0, 0, 31957; ASM64PWR4-NEXT: fadd 0, 0, 41958; ASM64PWR4-NEXT: fadd 0, 0, 51959; ASM64PWR4-NEXT: fadd 0, 0, 61960; ASM64PWR4-NEXT: fadd 0, 0, 71961; ASM64PWR4-NEXT: fadd 0, 0, 81962; ASM64PWR4-NEXT: fadd 0, 0, 91963; ASM64PWR4-NEXT: fadd 0, 0, 101964; ASM64PWR4-NEXT: fadd 0, 0, 111965; ASM64PWR4-NEXT: fadd 0, 0, 121966; ASM64PWR4-NEXT: fadd 0, 0, 131967; ASM64PWR4-NEXT: fadd 0, 0, 11968; ASM64PWR4-NEXT: fctiwz 0, 01969; ASM64PWR4-NEXT: stfiwx 0, 0, 31970; ASM64PWR4-NEXT: lwz 3, -4(1)1971; ASM64PWR4-NEXT: blr1972 entry:1973 %add = add nsw i32 %i1, %i21974 %add1 = add nsw i32 %add, %i31975 %add2 = add nsw i32 %add1, %i41976 %add3 = add nsw i32 %add2, %i51977 %add4 = add nsw i32 %add3, %i61978 %add5 = add nsw i32 %add4, %i71979 %add6 = add nsw i32 %add5, %i81980 %conv = sitofp i32 %add6 to double1981 %add7 = fadd double %conv, %d11982 %add8 = fadd double %add7, %d21983 %add9 = fadd double %add8, %d31984 %add10 = fadd double %add9, %d41985 %add11 = fadd double %add10, %d51986 %add12 = fadd double %add11, %d61987 %add13 = fadd double %add12, %d71988 %add14 = fadd double %add13, %d81989 %add15 = fadd double %add14, %d91990 %add16 = fadd double %add15, %d101991 %add17 = fadd double %add16, %d111992 %add18 = fadd double %add17, %d121993 %add19 = fadd double %add18, %d131994 %add20 = fadd double %add19, %d141995 %conv21 = fptosi double %add20 to i321996 ret i32 %conv211997 }1998 1999 define void @mix_floats_caller() {2000; ASM32PWR4-LABEL: mix_floats_caller:2001; ASM32PWR4: # %bb.0: # %entry2002; ASM32PWR4-NEXT: mflr 02003; ASM32PWR4-NEXT: stwu 1, -176(1)2004; ASM32PWR4-NEXT: li 3, 02005; ASM32PWR4-NEXT: stw 0, 184(1)2006; ASM32PWR4-NEXT: lis 4, 163522007; ASM32PWR4-NEXT: lis 5, 163392008; ASM32PWR4-NEXT: lis 6, 163642009; ASM32PWR4-NEXT: stw 3, 92(1)2010; ASM32PWR4-NEXT: ori 5, 5, 131072011; ASM32PWR4-NEXT: ori 6, 6, 524282012; ASM32PWR4-NEXT: stw 3, 132(1)2013; ASM32PWR4-NEXT: lis 3, 163682014; ASM32PWR4-NEXT: li 8, 62015; ASM32PWR4-NEXT: li 9, 72016; ASM32PWR4-NEXT: li 10, 82017; ASM32PWR4-NEXT: stw 3, 128(1)2018; ASM32PWR4-NEXT: lis 3, -262152019; ASM32PWR4-NEXT: ori 3, 3, 393222020; ASM32PWR4-NEXT: stw 4, 88(1)2021; ASM32PWR4-NEXT: lis 4, 163132022; ASM32PWR4-NEXT: ori 4, 4, 393212023; ASM32PWR4-NEXT: stw 3, 60(1)2024; ASM32PWR4-NEXT: stw 3, 68(1)2025; ASM32PWR4-NEXT: stw 3, 84(1)2026; ASM32PWR4-NEXT: stw 3, 116(1)2027; ASM32PWR4-NEXT: stw 3, 140(1)2028; ASM32PWR4-NEXT: lis 3, 163692029; ASM32PWR4-NEXT: ori 3, 3, 393212030; ASM32PWR4-NEXT: stw 4, 56(1)2031; ASM32PWR4-NEXT: lis 4, 163292032; ASM32PWR4-NEXT: ori 4, 4, 393212033; ASM32PWR4-NEXT: stw 3, 136(1)2034; ASM32PWR4-NEXT: lis 3, 163712035; ASM32PWR4-NEXT: ori 3, 3, 131072036; ASM32PWR4-NEXT: stw 4, 64(1)2037; ASM32PWR4-NEXT: lis 4, 131072038; ASM32PWR4-NEXT: ori 4, 4, 131072039; ASM32PWR4-NEXT: stw 3, 144(1)2040; ASM32PWR4-NEXT: lis 3, 163722041; ASM32PWR4-NEXT: ori 3, 3, 524282042; ASM32PWR4-NEXT: stw 4, 76(1)2043; ASM32PWR4-NEXT: stw 4, 100(1)2044; ASM32PWR4-NEXT: stw 4, 148(1)2045; ASM32PWR4-NEXT: lwz 4, L..C40(2) # %const.02046; ASM32PWR4-NEXT: stw 3, 152(1)2047; ASM32PWR4-NEXT: lwz 3, L..C41(2) # %const.12048; ASM32PWR4-NEXT: lfd 1, 0(4)2049; ASM32PWR4-NEXT: lwz 4, L..C42(2) # %const.22050; ASM32PWR4-NEXT: lfd 2, 0(3)2051; ASM32PWR4-NEXT: lwz 3, L..C43(2) # %const.32052; ASM32PWR4-NEXT: stw 5, 72(1)2053; ASM32PWR4-NEXT: lis 5, 163452054; ASM32PWR4-NEXT: ori 5, 5, 393212055; ASM32PWR4-NEXT: stw 5, 80(1)2056; ASM32PWR4-NEXT: lis 5, 163552057; ASM32PWR4-NEXT: ori 5, 5, 131072058; ASM32PWR4-NEXT: lfd 3, 0(4)2059; ASM32PWR4-NEXT: lwz 4, L..C44(2) # %const.42060; ASM32PWR4-NEXT: lfd 4, 0(3)2061; ASM32PWR4-NEXT: lwz 3, L..C45(2) # %const.52062; ASM32PWR4-NEXT: stw 5, 96(1)2063; ASM32PWR4-NEXT: lis 5, 262142064; ASM32PWR4-NEXT: ori 7, 5, 262142065; ASM32PWR4-NEXT: lis 5, 163582066; ASM32PWR4-NEXT: lfd 6, 0(4)2067; ASM32PWR4-NEXT: lwz 4, L..C46(2) # %const.62068; ASM32PWR4-NEXT: ori 5, 5, 262142069; ASM32PWR4-NEXT: lfd 7, 0(3)2070; ASM32PWR4-NEXT: lwz 3, L..C47(2) # %const.72071; ASM32PWR4-NEXT: stw 5, 104(1)2072; ASM32PWR4-NEXT: lis 5, 163612073; ASM32PWR4-NEXT: ori 5, 5, 393212074; ASM32PWR4-NEXT: lfd 8, 0(4)2075; ASM32PWR4-NEXT: lwz 4, L..C48(2) # %const.82076; ASM32PWR4-NEXT: lfd 9, 0(3)2077; ASM32PWR4-NEXT: lwz 3, L..C49(2) # %const.92078; ASM32PWR4-NEXT: stw 5, 112(1)2079; ASM32PWR4-NEXT: lis 5, -131082080; ASM32PWR4-NEXT: ori 5, 5, 524292081; ASM32PWR4-NEXT: stw 5, 124(1)2082; ASM32PWR4-NEXT: stw 5, 156(1)2083; ASM32PWR4-NEXT: lwz 5, L..C50(2) # %const.122084; ASM32PWR4-NEXT: lfd 11, 0(4)2085; ASM32PWR4-NEXT: lwz 4, L..C51(2) # %const.102086; ASM32PWR4-NEXT: lfd 12, 0(3)2087; ASM32PWR4-NEXT: lwz 3, L..C52(2) # %const.112088; ASM32PWR4-NEXT: lfd 13, 0(4)2089; ASM32PWR4-NEXT: lis 4, 163742090; ASM32PWR4-NEXT: ori 11, 4, 262142091; ASM32PWR4-NEXT: li 4, 22092; ASM32PWR4-NEXT: lfs 5, 0(3)2093; ASM32PWR4-NEXT: li 3, 12094; ASM32PWR4-NEXT: lfs 10, 0(5)2095; ASM32PWR4-NEXT: li 5, 32096; ASM32PWR4-NEXT: stw 7, 108(1)2097; ASM32PWR4-NEXT: stw 6, 120(1)2098; ASM32PWR4-NEXT: li 6, 42099; ASM32PWR4-NEXT: stw 7, 164(1)2100; ASM32PWR4-NEXT: li 7, 52101; ASM32PWR4-NEXT: stw 11, 160(1)2102; ASM32PWR4-NEXT: bl .mix_floats2103; ASM32PWR4-NEXT: nop2104; ASM32PWR4-NEXT: addi 1, 1, 1762105; ASM32PWR4-NEXT: lwz 0, 8(1)2106; ASM32PWR4-NEXT: mtlr 02107; ASM32PWR4-NEXT: blr2108;2109; ASM64PWR4-LABEL: mix_floats_caller:2110; ASM64PWR4: # %bb.0: # %entry2111; ASM64PWR4-NEXT: mflr 02112; ASM64PWR4-NEXT: stdu 1, -240(1)2113; ASM64PWR4-NEXT: li 3, 10232114; ASM64PWR4-NEXT: std 0, 256(1)2115; ASM64PWR4-NEXT: ld 4, L..C37(2) # %const.02116; ASM64PWR4-NEXT: ld 8, L..C38(2) # %const.62117; ASM64PWR4-NEXT: lis 5, 163712118; ASM64PWR4-NEXT: ld 6, L..C39(2) # %const.32119; ASM64PWR4-NEXT: ld 9, L..C40(2) # %const.92120; ASM64PWR4-NEXT: ld 10, L..C41(2) # %const.112121; ASM64PWR4-NEXT: rldic 3, 3, 52, 22122; ASM64PWR4-NEXT: lis 11, 40912123; ASM64PWR4-NEXT: std 3, 184(1)2124; ASM64PWR4-NEXT: li 3, 5112125; ASM64PWR4-NEXT: lis 12, 163612126; ASM64PWR4-NEXT: rldic 3, 3, 53, 22127; ASM64PWR4-NEXT: lfd 1, 0(4)2128; ASM64PWR4-NEXT: ld 4, L..C42(2) # %const.22129; ASM64PWR4-NEXT: lis 0, 163452130; ASM64PWR4-NEXT: std 3, 144(1)2131; ASM64PWR4-NEXT: ld 3, L..C43(2) # %const.12132; ASM64PWR4-NEXT: lfd 2, 0(3)2133; ASM64PWR4-NEXT: lis 3, 163742134; ASM64PWR4-NEXT: ori 7, 3, 262142135; ASM64PWR4-NEXT: ori 3, 5, 131072136; ASM64PWR4-NEXT: ld 5, L..C44(2) # %const.52137; ASM64PWR4-NEXT: lfd 8, 0(8)2138; ASM64PWR4-NEXT: ld 8, L..C45(2) # %const.82139; ASM64PWR4-NEXT: rldimi 7, 7, 32, 02140; ASM64PWR4-NEXT: rlwimi 7, 7, 16, 0, 152141; ASM64PWR4-NEXT: rldimi 3, 3, 32, 02142; ASM64PWR4-NEXT: lfd 3, 0(4)2143; ASM64PWR4-NEXT: ld 4, L..C46(2) # %const.42144; ASM64PWR4-NEXT: rlwimi 3, 3, 16, 0, 152145; ASM64PWR4-NEXT: lfd 4, 0(6)2146; ASM64PWR4-NEXT: lis 6, 163552147; ASM64PWR4-NEXT: lfd 7, 0(5)2148; ASM64PWR4-NEXT: ori 5, 6, 131072149; ASM64PWR4-NEXT: ld 6, L..C47(2) # %const.72150; ASM64PWR4-NEXT: rldimi 5, 5, 32, 02151; ASM64PWR4-NEXT: rlwimi 5, 5, 16, 0, 152152; ASM64PWR4-NEXT: lfd 11, 0(8)2153; ASM64PWR4-NEXT: ld 8, L..C48(2) # %const.102154; ASM64PWR4-NEXT: lfd 6, 0(4)2155; ASM64PWR4-NEXT: lis 4, 163582156; ASM64PWR4-NEXT: ori 4, 4, 262142157; ASM64PWR4-NEXT: rldimi 4, 4, 32, 02158; ASM64PWR4-NEXT: lfd 9, 0(6)2159; ASM64PWR4-NEXT: lis 6, 163392160; ASM64PWR4-NEXT: rlwimi 4, 4, 16, 0, 152161; ASM64PWR4-NEXT: ori 6, 6, 131072162; ASM64PWR4-NEXT: lfd 12, 0(9)2163; ASM64PWR4-NEXT: lis 9, 40932164; ASM64PWR4-NEXT: ori 9, 9, 131072165; ASM64PWR4-NEXT: lfd 13, 0(8)2166; ASM64PWR4-NEXT: lis 8, 163692167; ASM64PWR4-NEXT: ori 8, 8, 393212168; ASM64PWR4-NEXT: rldimi 6, 6, 32, 02169; ASM64PWR4-NEXT: std 31, 232(1) # 8-byte Folded Spill2170; ASM64PWR4-NEXT: ld 31, L..C49(2) # %const.122171; ASM64PWR4-NEXT: rldic 9, 9, 34, 22172; ASM64PWR4-NEXT: rlwimi 6, 6, 16, 0, 152173; ASM64PWR4-NEXT: oris 9, 9, 524282174; ASM64PWR4-NEXT: lfs 5, 0(10)2175; ASM64PWR4-NEXT: lis 10, 163292176; ASM64PWR4-NEXT: ori 10, 10, 393212177; ASM64PWR4-NEXT: std 7, 216(1)2178; ASM64PWR4-NEXT: ori 7, 11, 131072179; ASM64PWR4-NEXT: ori 11, 12, 393212180; ASM64PWR4-NEXT: ori 12, 0, 393212181; ASM64PWR4-NEXT: std 4, 160(1)2182; ASM64PWR4-NEXT: rldic 4, 8, 32, 22183; ASM64PWR4-NEXT: rldic 7, 7, 34, 22184; ASM64PWR4-NEXT: oris 4, 4, 393212185; ASM64PWR4-NEXT: std 30, 224(1) # 8-byte Folded Spill2186; ASM64PWR4-NEXT: lis 30, 163132187; ASM64PWR4-NEXT: rldic 8, 11, 32, 22188; ASM64PWR4-NEXT: rldic 11, 12, 32, 22189; ASM64PWR4-NEXT: std 3, 200(1)2190; ASM64PWR4-NEXT: ori 3, 30, 393212191; ASM64PWR4-NEXT: ori 4, 4, 393222192; ASM64PWR4-NEXT: rldic 3, 3, 32, 22193; ASM64PWR4-NEXT: std 5, 152(1)2194; ASM64PWR4-NEXT: rldic 5, 10, 32, 22195; ASM64PWR4-NEXT: oris 5, 5, 393212196; ASM64PWR4-NEXT: oris 3, 3, 393212197; ASM64PWR4-NEXT: std 6, 128(1)2198; ASM64PWR4-NEXT: oris 6, 7, 524282199; ASM64PWR4-NEXT: ori 7, 9, 524292200; ASM64PWR4-NEXT: li 9, 72201; ASM64PWR4-NEXT: lfs 10, 0(31)2202; ASM64PWR4-NEXT: li 10, 82203; ASM64PWR4-NEXT: std 7, 208(1)2204; ASM64PWR4-NEXT: oris 7, 8, 393212205; ASM64PWR4-NEXT: oris 8, 11, 393212206; ASM64PWR4-NEXT: ori 11, 3, 393222207; ASM64PWR4-NEXT: li 3, 12208; ASM64PWR4-NEXT: std 4, 192(1)2209; ASM64PWR4-NEXT: ori 4, 6, 524292210; ASM64PWR4-NEXT: ori 6, 8, 393222211; ASM64PWR4-NEXT: std 4, 176(1)2212; ASM64PWR4-NEXT: ori 4, 7, 393222213; ASM64PWR4-NEXT: ori 7, 5, 393222214; ASM64PWR4-NEXT: li 5, 32215; ASM64PWR4-NEXT: li 8, 62216; ASM64PWR4-NEXT: std 4, 168(1)2217; ASM64PWR4-NEXT: li 4, 22218; ASM64PWR4-NEXT: std 6, 136(1)2219; ASM64PWR4-NEXT: li 6, 42220; ASM64PWR4-NEXT: std 7, 120(1)2221; ASM64PWR4-NEXT: li 7, 52222; ASM64PWR4-NEXT: std 11, 112(1)2223; ASM64PWR4-NEXT: bl .mix_floats2224; ASM64PWR4-NEXT: nop2225; ASM64PWR4-NEXT: ld 31, 232(1) # 8-byte Folded Reload2226; ASM64PWR4-NEXT: ld 30, 224(1) # 8-byte Folded Reload2227; ASM64PWR4-NEXT: addi 1, 1, 2402228; ASM64PWR4-NEXT: ld 0, 16(1)2229; ASM64PWR4-NEXT: mtlr 02230; ASM64PWR4-NEXT: blr2231 entry:2232 %call = call i32 @mix_floats(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, double 1.000000e-01, double 2.000000e-01, double 3.000000e-01, double 4.000000e-01, double 5.000000e-01, double 6.000000e-01, double 0x3FE6666666666666, double 8.000000e-01, double 9.000000e-01, double 1.000000e+00, double 1.100000e+00, double 1.200000e+00, double 1.300000e+00, double 1.400000e+00)2233 ret void2234 }2235 2236