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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 42; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff \3; RUN:      -mattr=+aix-shared-lib-tls-model-opt --code-model=large < %s | FileCheck %s --check-prefixes=OPT4; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff \5; RUN:      -mattr=+aix-small-local-dynamic-tls --code-model=large < %s | FileCheck %s --check-prefixes=SMALL6; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff \7; RUN:      -mattr=+aix-shared-lib-tls-model-opt -mattr=+aix-small-local-dynamic-tls \8; RUN:      --code-model=large < %s | FileCheck %s --check-prefixes=BOTH9 10@VarTLSLD1 = internal thread_local(localdynamic) global i32 42, align 411 12define i32 @Single_LD(i32 %P, i32 %Q) {13; OPT-LABEL: Single_LD:14; OPT:       # %bb.0: # %entry15; OPT-NEXT:    and 4, 3, 416; OPT-NEXT:    addis 3, L..C0@u(2)17; OPT-NEXT:    ld 3, L..C0@l(3)18; OPT-NEXT:    cmpwi 4, -119; OPT-NEXT:    lwzx 3, 13, 320; OPT-NEXT:    blr21;22; SMALL-LABEL: Single_LD:23; SMALL:       # %bb.0: # %entry24; SMALL-NEXT:    mflr 025; SMALL-NEXT:    stdu 1, -48(1)26; SMALL-NEXT:    and 6, 3, 427; SMALL-NEXT:    addis 3, L..C0@u(2)28; SMALL-NEXT:    std 0, 64(1)29; SMALL-NEXT:    ld 3, L..C0@l(3)30; SMALL-NEXT:    bla .__tls_get_mod[PR]31; SMALL-NEXT:    cmpwi 6, -132; SMALL-NEXT:    lwz 3, VarTLSLD1[TL]@ld(3)33; SMALL-NEXT:    addi 1, 1, 4834; SMALL-NEXT:    ld 0, 16(1)35; SMALL-NEXT:    mtlr 036; SMALL-NEXT:    blr37;38; BOTH-LABEL: Single_LD:39; BOTH:       # %bb.0: # %entry40; BOTH-NEXT:    and 4, 3, 441; BOTH-NEXT:    addis 3, L..C0@u(2)42; BOTH-NEXT:    ld 3, L..C0@l(3)43; BOTH-NEXT:    cmpwi 4, -144; BOTH-NEXT:    lwzx 3, 13, 345; BOTH-NEXT:    blr46entry:47  %a = icmp slt i32 %P, 048  %b = icmp slt i32 %Q, 049  %c = and i1 %a, %b50  %tls1 = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @VarTLSLD1)51  %load1 = load i32, ptr %tls1, align 452  br i1 %c, label %bb1, label %return53 54bb1:55  %tls2 = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @VarTLSLD1)56  %load2 = load i32, ptr %tls2, align 457  ret i32 %load258 59return:60  ret i32 %load161}62 63; OPT-LABEL: .toc64; OPT-LABEL: L..C0:65; OPT-NEXT: .tc VarTLSLD1[TE],VarTLSLD1[TL]@ie66 67; SMALL-LABEL: .toc68; SMALL-LABEL: L..C0:69; SMALL-NEXT: .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml70; SMALL-NEXT: .rename _Renamed..5f24__TLSML[TC],"_$TLSML"71 72; BOTH-LABEL: .toc73; BOTH-LABEL: L..C0:74; BOTH-NEXT: .tc VarTLSLD1[TE],VarTLSLD1[TL]@ie75