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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec \3; RUN: -mtriple powerpc-ibm-aix-xcoff < %s | FileCheck %s \4; RUN: --check-prefix=SMALL325; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec \6; RUN: -mtriple powerpc-ibm-aix-xcoff --code-model=large < %s \7; RUN: | FileCheck %s --check-prefix=LARGE328; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec \9; RUN: -mtriple powerpc64-ibm-aix-xcoff < %s | FileCheck %s \10; RUN: --check-prefix=SMALL6411; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec \12; RUN: -mtriple powerpc64-ibm-aix-xcoff --code-model=large < %s \13; RUN: | FileCheck %s --check-prefix=LARGE6414 15@TGInit = thread_local global double 1.000000e+00, align 816@TWInit = weak thread_local global double 1.000000e+00, align 817@GInit = global double 1.000000e+00, align 818@TGUninit = thread_local global double 0.000000e+00, align 819@TIInit = internal thread_local global double 1.000000e+00, align 820 21; Function Attrs: nofree norecurse nounwind willreturn writeonly22define void @storesTGUninit(double %Val) #0 {23; SMALL32-LABEL: storesTGUninit:24; SMALL32: # %bb.0: # %entry25; SMALL32-NEXT: mflr 026; SMALL32-NEXT: stwu 1, -32(1)27; SMALL32-NEXT: lwz 3, L..C0(2) # target-flags(ppc-tlsgdm) @TGUninit28; SMALL32-NEXT: lwz 4, L..C1(2) # target-flags(ppc-tlsgd) @TGUninit29; SMALL32-NEXT: stw 0, 40(1)30; SMALL32-NEXT: bla .__tls_get_addr[PR]31; SMALL32-NEXT: stfd 1, 0(3)32; SMALL32-NEXT: addi 1, 1, 3233; SMALL32-NEXT: lwz 0, 8(1)34; SMALL32-NEXT: mtlr 035; SMALL32-NEXT: blr36;37; LARGE32-LABEL: storesTGUninit:38; LARGE32: # %bb.0: # %entry39; LARGE32-NEXT: mflr 040; LARGE32-NEXT: stwu 1, -32(1)41; LARGE32-NEXT: stw 0, 40(1)42; LARGE32-NEXT: addis 3, L..C0@u(2)43; LARGE32-NEXT: addis 4, L..C1@u(2)44; LARGE32-NEXT: lwz 3, L..C0@l(3)45; LARGE32-NEXT: lwz 4, L..C1@l(4)46; LARGE32-NEXT: bla .__tls_get_addr[PR]47; LARGE32-NEXT: stfd 1, 0(3)48; LARGE32-NEXT: addi 1, 1, 3249; LARGE32-NEXT: lwz 0, 8(1)50; LARGE32-NEXT: mtlr 051; LARGE32-NEXT: blr52;53; SMALL64-LABEL: storesTGUninit:54; SMALL64: # %bb.0: # %entry55; SMALL64-NEXT: mflr 056; SMALL64-NEXT: stdu 1, -48(1)57; SMALL64-NEXT: ld 3, L..C0(2) # target-flags(ppc-tlsgdm) @TGUninit58; SMALL64-NEXT: ld 4, L..C1(2) # target-flags(ppc-tlsgd) @TGUninit59; SMALL64-NEXT: std 0, 64(1)60; SMALL64-NEXT: bla .__tls_get_addr[PR]61; SMALL64-NEXT: stfd 1, 0(3)62; SMALL64-NEXT: addi 1, 1, 4863; SMALL64-NEXT: ld 0, 16(1)64; SMALL64-NEXT: mtlr 065; SMALL64-NEXT: blr66;67; LARGE64-LABEL: storesTGUninit:68; LARGE64: # %bb.0: # %entry69; LARGE64-NEXT: mflr 070; LARGE64-NEXT: stdu 1, -48(1)71; LARGE64-NEXT: addis 3, L..C0@u(2)72; LARGE64-NEXT: addis 4, L..C1@u(2)73; LARGE64-NEXT: std 0, 64(1)74; LARGE64-NEXT: ld 3, L..C0@l(3)75; LARGE64-NEXT: ld 4, L..C1@l(4)76; LARGE64-NEXT: bla .__tls_get_addr[PR]77; LARGE64-NEXT: stfd 1, 0(3)78; LARGE64-NEXT: addi 1, 1, 4879; LARGE64-NEXT: ld 0, 16(1)80; LARGE64-NEXT: mtlr 081; LARGE64-NEXT: blr82entry:83 store double %Val, ptr @TGUninit, align 884 ret void85}86 87; Function Attrs: nofree norecurse nounwind willreturn writeonly88define void @storesTGInit(double %Val) #0 {89; SMALL32-LABEL: storesTGInit:90; SMALL32: # %bb.0: # %entry91; SMALL32-NEXT: mflr 092; SMALL32-NEXT: stwu 1, -32(1)93; SMALL32-NEXT: lwz 3, L..C2(2) # target-flags(ppc-tlsgdm) @TGInit94; SMALL32-NEXT: lwz 4, L..C3(2) # target-flags(ppc-tlsgd) @TGInit95; SMALL32-NEXT: stw 0, 40(1)96; SMALL32-NEXT: bla .__tls_get_addr[PR]97; SMALL32-NEXT: stfd 1, 0(3)98; SMALL32-NEXT: addi 1, 1, 3299; SMALL32-NEXT: lwz 0, 8(1)100; SMALL32-NEXT: mtlr 0101; SMALL32-NEXT: blr102;103; LARGE32-LABEL: storesTGInit:104; LARGE32: # %bb.0: # %entry105; LARGE32-NEXT: mflr 0106; LARGE32-NEXT: stwu 1, -32(1)107; LARGE32-NEXT: stw 0, 40(1)108; LARGE32-NEXT: addis 3, L..C2@u(2)109; LARGE32-NEXT: addis 4, L..C3@u(2)110; LARGE32-NEXT: lwz 3, L..C2@l(3)111; LARGE32-NEXT: lwz 4, L..C3@l(4)112; LARGE32-NEXT: bla .__tls_get_addr[PR]113; LARGE32-NEXT: stfd 1, 0(3)114; LARGE32-NEXT: addi 1, 1, 32115; LARGE32-NEXT: lwz 0, 8(1)116; LARGE32-NEXT: mtlr 0117; LARGE32-NEXT: blr118;119; SMALL64-LABEL: storesTGInit:120; SMALL64: # %bb.0: # %entry121; SMALL64-NEXT: mflr 0122; SMALL64-NEXT: stdu 1, -48(1)123; SMALL64-NEXT: ld 3, L..C2(2) # target-flags(ppc-tlsgdm) @TGInit124; SMALL64-NEXT: ld 4, L..C3(2) # target-flags(ppc-tlsgd) @TGInit125; SMALL64-NEXT: std 0, 64(1)126; SMALL64-NEXT: bla .__tls_get_addr[PR]127; SMALL64-NEXT: stfd 1, 0(3)128; SMALL64-NEXT: addi 1, 1, 48129; SMALL64-NEXT: ld 0, 16(1)130; SMALL64-NEXT: mtlr 0131; SMALL64-NEXT: blr132;133; LARGE64-LABEL: storesTGInit:134; LARGE64: # %bb.0: # %entry135; LARGE64-NEXT: mflr 0136; LARGE64-NEXT: stdu 1, -48(1)137; LARGE64-NEXT: addis 3, L..C2@u(2)138; LARGE64-NEXT: addis 4, L..C3@u(2)139; LARGE64-NEXT: std 0, 64(1)140; LARGE64-NEXT: ld 3, L..C2@l(3)141; LARGE64-NEXT: ld 4, L..C3@l(4)142; LARGE64-NEXT: bla .__tls_get_addr[PR]143; LARGE64-NEXT: stfd 1, 0(3)144; LARGE64-NEXT: addi 1, 1, 48145; LARGE64-NEXT: ld 0, 16(1)146; LARGE64-NEXT: mtlr 0147; LARGE64-NEXT: blr148entry:149 store double %Val, ptr @TGInit, align 8150 ret void151}152 153; Function Attrs: nofree norecurse nounwind willreturn writeonly154define void @storesTIInit(double %Val) #0 {155; SMALL32-LABEL: storesTIInit:156; SMALL32: # %bb.0: # %entry157; SMALL32-NEXT: mflr 0158; SMALL32-NEXT: stwu 1, -32(1)159; SMALL32-NEXT: lwz 3, L..C4(2) # target-flags(ppc-tlsldm) @"_$TLSML"160; SMALL32-NEXT: stw 0, 40(1)161; SMALL32-NEXT: bla .__tls_get_mod[PR]162; SMALL32-NEXT: lwz 4, L..C5(2) # target-flags(ppc-tlsld) @TIInit163; SMALL32-NEXT: stfdx 1, 3, 4164; SMALL32-NEXT: addi 1, 1, 32165; SMALL32-NEXT: lwz 0, 8(1)166; SMALL32-NEXT: mtlr 0167; SMALL32-NEXT: blr168;169; LARGE32-LABEL: storesTIInit:170; LARGE32: # %bb.0: # %entry171; LARGE32-NEXT: mflr 0172; LARGE32-NEXT: stwu 1, -32(1)173; LARGE32-NEXT: stw 0, 40(1)174; LARGE32-NEXT: addis 6, L..C4@u(2)175; LARGE32-NEXT: addis 3, L..C5@u(2)176; LARGE32-NEXT: lwz 3, L..C5@l(3)177; LARGE32-NEXT: bla .__tls_get_mod[PR]178; LARGE32-NEXT: lwz 4, L..C4@l(6)179; LARGE32-NEXT: stfdx 1, 3, 4180; LARGE32-NEXT: addi 1, 1, 32181; LARGE32-NEXT: lwz 0, 8(1)182; LARGE32-NEXT: mtlr 0183; LARGE32-NEXT: blr184;185; SMALL64-LABEL: storesTIInit:186; SMALL64: # %bb.0: # %entry187; SMALL64-NEXT: mflr 0188; SMALL64-NEXT: stdu 1, -48(1)189; SMALL64-NEXT: ld 3, L..C4(2) # target-flags(ppc-tlsldm) @"_$TLSML"190; SMALL64-NEXT: std 0, 64(1)191; SMALL64-NEXT: bla .__tls_get_mod[PR]192; SMALL64-NEXT: ld 4, L..C5(2) # target-flags(ppc-tlsld) @TIInit193; SMALL64-NEXT: stfdx 1, 3, 4194; SMALL64-NEXT: addi 1, 1, 48195; SMALL64-NEXT: ld 0, 16(1)196; SMALL64-NEXT: mtlr 0197; SMALL64-NEXT: blr198;199; LARGE64-LABEL: storesTIInit:200; LARGE64: # %bb.0: # %entry201; LARGE64-NEXT: mflr 0202; LARGE64-NEXT: stdu 1, -48(1)203; LARGE64-NEXT: addis 3, L..C4@u(2)204; LARGE64-NEXT: std 0, 64(1)205; LARGE64-NEXT: addis 6, L..C5@u(2)206; LARGE64-NEXT: ld 3, L..C4@l(3)207; LARGE64-NEXT: bla .__tls_get_mod[PR]208; LARGE64-NEXT: ld 4, L..C5@l(6)209; LARGE64-NEXT: stfdx 1, 3, 4210; LARGE64-NEXT: addi 1, 1, 48211; LARGE64-NEXT: ld 0, 16(1)212; LARGE64-NEXT: mtlr 0213; LARGE64-NEXT: blr214entry:215 store double %Val, ptr @TIInit, align 8216 ret void217}218 219; Function Attrs: nofree norecurse nounwind willreturn writeonly220define void @storesTWInit(double %Val) #0 {221; SMALL32-LABEL: storesTWInit:222; SMALL32: # %bb.0: # %entry223; SMALL32-NEXT: mflr 0224; SMALL32-NEXT: stwu 1, -32(1)225; SMALL32-NEXT: lwz 3, L..C6(2) # target-flags(ppc-tlsgdm) @TWInit226; SMALL32-NEXT: lwz 4, L..C7(2) # target-flags(ppc-tlsgd) @TWInit227; SMALL32-NEXT: stw 0, 40(1)228; SMALL32-NEXT: bla .__tls_get_addr[PR]229; SMALL32-NEXT: stfd 1, 0(3)230; SMALL32-NEXT: addi 1, 1, 32231; SMALL32-NEXT: lwz 0, 8(1)232; SMALL32-NEXT: mtlr 0233; SMALL32-NEXT: blr234;235; LARGE32-LABEL: storesTWInit:236; LARGE32: # %bb.0: # %entry237; LARGE32-NEXT: mflr 0238; LARGE32-NEXT: stwu 1, -32(1)239; LARGE32-NEXT: stw 0, 40(1)240; LARGE32-NEXT: addis 3, L..C6@u(2)241; LARGE32-NEXT: addis 4, L..C7@u(2)242; LARGE32-NEXT: lwz 3, L..C6@l(3)243; LARGE32-NEXT: lwz 4, L..C7@l(4)244; LARGE32-NEXT: bla .__tls_get_addr[PR]245; LARGE32-NEXT: stfd 1, 0(3)246; LARGE32-NEXT: addi 1, 1, 32247; LARGE32-NEXT: lwz 0, 8(1)248; LARGE32-NEXT: mtlr 0249; LARGE32-NEXT: blr250;251; SMALL64-LABEL: storesTWInit:252; SMALL64: # %bb.0: # %entry253; SMALL64-NEXT: mflr 0254; SMALL64-NEXT: stdu 1, -48(1)255; SMALL64-NEXT: ld 3, L..C6(2) # target-flags(ppc-tlsgdm) @TWInit256; SMALL64-NEXT: ld 4, L..C7(2) # target-flags(ppc-tlsgd) @TWInit257; SMALL64-NEXT: std 0, 64(1)258; SMALL64-NEXT: bla .__tls_get_addr[PR]259; SMALL64-NEXT: stfd 1, 0(3)260; SMALL64-NEXT: addi 1, 1, 48261; SMALL64-NEXT: ld 0, 16(1)262; SMALL64-NEXT: mtlr 0263; SMALL64-NEXT: blr264;265; LARGE64-LABEL: storesTWInit:266; LARGE64: # %bb.0: # %entry267; LARGE64-NEXT: mflr 0268; LARGE64-NEXT: stdu 1, -48(1)269; LARGE64-NEXT: addis 3, L..C6@u(2)270; LARGE64-NEXT: addis 4, L..C7@u(2)271; LARGE64-NEXT: std 0, 64(1)272; LARGE64-NEXT: ld 3, L..C6@l(3)273; LARGE64-NEXT: ld 4, L..C7@l(4)274; LARGE64-NEXT: bla .__tls_get_addr[PR]275; LARGE64-NEXT: stfd 1, 0(3)276; LARGE64-NEXT: addi 1, 1, 48277; LARGE64-NEXT: ld 0, 16(1)278; LARGE64-NEXT: mtlr 0279; LARGE64-NEXT: blr280entry:281 store double %Val, ptr @TWInit, align 8282 ret void283}284 285; Function Attrs: norecurse nounwind readonly willreturn286define double @loadsTGUninit() #1 {287; SMALL32-LABEL: loadsTGUninit:288; SMALL32: # %bb.0: # %entry289; SMALL32-NEXT: mflr 0290; SMALL32-NEXT: stwu 1, -32(1)291; SMALL32-NEXT: lwz 3, L..C0(2) # target-flags(ppc-tlsgdm) @TGUninit292; SMALL32-NEXT: lwz 4, L..C1(2) # target-flags(ppc-tlsgd) @TGUninit293; SMALL32-NEXT: stw 0, 40(1)294; SMALL32-NEXT: bla .__tls_get_addr[PR]295; SMALL32-NEXT: lwz 4, L..C8(2) # @GInit296; SMALL32-NEXT: lfd 0, 0(3)297; SMALL32-NEXT: lfd 1, 0(4)298; SMALL32-NEXT: fadd 1, 0, 1299; SMALL32-NEXT: addi 1, 1, 32300; SMALL32-NEXT: lwz 0, 8(1)301; SMALL32-NEXT: mtlr 0302; SMALL32-NEXT: blr303;304; LARGE32-LABEL: loadsTGUninit:305; LARGE32: # %bb.0: # %entry306; LARGE32-NEXT: mflr 0307; LARGE32-NEXT: stwu 1, -32(1)308; LARGE32-NEXT: stw 0, 40(1)309; LARGE32-NEXT: addis 3, L..C0@u(2)310; LARGE32-NEXT: addis 4, L..C1@u(2)311; LARGE32-NEXT: lwz 3, L..C0@l(3)312; LARGE32-NEXT: lwz 4, L..C1@l(4)313; LARGE32-NEXT: bla .__tls_get_addr[PR]314; LARGE32-NEXT: lfd 0, 0(3)315; LARGE32-NEXT: addis 3, L..C8@u(2)316; LARGE32-NEXT: lwz 3, L..C8@l(3)317; LARGE32-NEXT: lfd 1, 0(3)318; LARGE32-NEXT: fadd 1, 0, 1319; LARGE32-NEXT: addi 1, 1, 32320; LARGE32-NEXT: lwz 0, 8(1)321; LARGE32-NEXT: mtlr 0322; LARGE32-NEXT: blr323;324; SMALL64-LABEL: loadsTGUninit:325; SMALL64: # %bb.0: # %entry326; SMALL64-NEXT: mflr 0327; SMALL64-NEXT: stdu 1, -48(1)328; SMALL64-NEXT: ld 3, L..C0(2) # target-flags(ppc-tlsgdm) @TGUninit329; SMALL64-NEXT: ld 4, L..C1(2) # target-flags(ppc-tlsgd) @TGUninit330; SMALL64-NEXT: std 0, 64(1)331; SMALL64-NEXT: bla .__tls_get_addr[PR]332; SMALL64-NEXT: ld 4, L..C8(2) # @GInit333; SMALL64-NEXT: lfd 0, 0(3)334; SMALL64-NEXT: lfd 1, 0(4)335; SMALL64-NEXT: fadd 1, 0, 1336; SMALL64-NEXT: addi 1, 1, 48337; SMALL64-NEXT: ld 0, 16(1)338; SMALL64-NEXT: mtlr 0339; SMALL64-NEXT: blr340;341; LARGE64-LABEL: loadsTGUninit:342; LARGE64: # %bb.0: # %entry343; LARGE64-NEXT: mflr 0344; LARGE64-NEXT: stdu 1, -48(1)345; LARGE64-NEXT: addis 3, L..C0@u(2)346; LARGE64-NEXT: addis 4, L..C1@u(2)347; LARGE64-NEXT: std 0, 64(1)348; LARGE64-NEXT: ld 3, L..C0@l(3)349; LARGE64-NEXT: ld 4, L..C1@l(4)350; LARGE64-NEXT: bla .__tls_get_addr[PR]351; LARGE64-NEXT: addis 4, L..C8@u(2)352; LARGE64-NEXT: lfd 0, 0(3)353; LARGE64-NEXT: ld 3, L..C8@l(4)354; LARGE64-NEXT: lfd 1, 0(3)355; LARGE64-NEXT: fadd 1, 0, 1356; LARGE64-NEXT: addi 1, 1, 48357; LARGE64-NEXT: ld 0, 16(1)358; LARGE64-NEXT: mtlr 0359; LARGE64-NEXT: blr360entry:361 %0 = load double, ptr @TGUninit, align 8362 %1 = load double, ptr @GInit, align 8363 %add = fadd double %0, %1364 ret double %add365}366 367; Function Attrs: norecurse nounwind readonly willreturn368define double @loadsTGInit() #1 {369; SMALL32-LABEL: loadsTGInit:370; SMALL32: # %bb.0: # %entry371; SMALL32-NEXT: mflr 0372; SMALL32-NEXT: stwu 1, -32(1)373; SMALL32-NEXT: lwz 3, L..C2(2) # target-flags(ppc-tlsgdm) @TGInit374; SMALL32-NEXT: lwz 4, L..C3(2) # target-flags(ppc-tlsgd) @TGInit375; SMALL32-NEXT: stw 0, 40(1)376; SMALL32-NEXT: bla .__tls_get_addr[PR]377; SMALL32-NEXT: lwz 4, L..C8(2) # @GInit378; SMALL32-NEXT: lfd 0, 0(3)379; SMALL32-NEXT: lfd 1, 0(4)380; SMALL32-NEXT: fadd 1, 0, 1381; SMALL32-NEXT: addi 1, 1, 32382; SMALL32-NEXT: lwz 0, 8(1)383; SMALL32-NEXT: mtlr 0384; SMALL32-NEXT: blr385;386; LARGE32-LABEL: loadsTGInit:387; LARGE32: # %bb.0: # %entry388; LARGE32-NEXT: mflr 0389; LARGE32-NEXT: stwu 1, -32(1)390; LARGE32-NEXT: stw 0, 40(1)391; LARGE32-NEXT: addis 3, L..C2@u(2)392; LARGE32-NEXT: addis 4, L..C3@u(2)393; LARGE32-NEXT: lwz 3, L..C2@l(3)394; LARGE32-NEXT: lwz 4, L..C3@l(4)395; LARGE32-NEXT: bla .__tls_get_addr[PR]396; LARGE32-NEXT: lfd 0, 0(3)397; LARGE32-NEXT: addis 3, L..C8@u(2)398; LARGE32-NEXT: lwz 3, L..C8@l(3)399; LARGE32-NEXT: lfd 1, 0(3)400; LARGE32-NEXT: fadd 1, 0, 1401; LARGE32-NEXT: addi 1, 1, 32402; LARGE32-NEXT: lwz 0, 8(1)403; LARGE32-NEXT: mtlr 0404; LARGE32-NEXT: blr405;406; SMALL64-LABEL: loadsTGInit:407; SMALL64: # %bb.0: # %entry408; SMALL64-NEXT: mflr 0409; SMALL64-NEXT: stdu 1, -48(1)410; SMALL64-NEXT: ld 3, L..C2(2) # target-flags(ppc-tlsgdm) @TGInit411; SMALL64-NEXT: ld 4, L..C3(2) # target-flags(ppc-tlsgd) @TGInit412; SMALL64-NEXT: std 0, 64(1)413; SMALL64-NEXT: bla .__tls_get_addr[PR]414; SMALL64-NEXT: ld 4, L..C8(2) # @GInit415; SMALL64-NEXT: lfd 0, 0(3)416; SMALL64-NEXT: lfd 1, 0(4)417; SMALL64-NEXT: fadd 1, 0, 1418; SMALL64-NEXT: addi 1, 1, 48419; SMALL64-NEXT: ld 0, 16(1)420; SMALL64-NEXT: mtlr 0421; SMALL64-NEXT: blr422;423; LARGE64-LABEL: loadsTGInit:424; LARGE64: # %bb.0: # %entry425; LARGE64-NEXT: mflr 0426; LARGE64-NEXT: stdu 1, -48(1)427; LARGE64-NEXT: addis 3, L..C2@u(2)428; LARGE64-NEXT: addis 4, L..C3@u(2)429; LARGE64-NEXT: std 0, 64(1)430; LARGE64-NEXT: ld 3, L..C2@l(3)431; LARGE64-NEXT: ld 4, L..C3@l(4)432; LARGE64-NEXT: bla .__tls_get_addr[PR]433; LARGE64-NEXT: addis 4, L..C8@u(2)434; LARGE64-NEXT: lfd 0, 0(3)435; LARGE64-NEXT: ld 3, L..C8@l(4)436; LARGE64-NEXT: lfd 1, 0(3)437; LARGE64-NEXT: fadd 1, 0, 1438; LARGE64-NEXT: addi 1, 1, 48439; LARGE64-NEXT: ld 0, 16(1)440; LARGE64-NEXT: mtlr 0441; LARGE64-NEXT: blr442entry:443 %0 = load double, ptr @TGInit, align 8444 %1 = load double, ptr @GInit, align 8445 %add = fadd double %0, %1446 ret double %add447}448 449; Function Attrs: norecurse nounwind readonly willreturn450define double @loadsTIInit() #1 {451; SMALL32-LABEL: loadsTIInit:452; SMALL32: # %bb.0: # %entry453; SMALL32-NEXT: mflr 0454; SMALL32-NEXT: stwu 1, -32(1)455; SMALL32-NEXT: lwz 3, L..C4(2) # target-flags(ppc-tlsldm) @"_$TLSML"456; SMALL32-NEXT: stw 0, 40(1)457; SMALL32-NEXT: bla .__tls_get_mod[PR]458; SMALL32-NEXT: lwz 4, L..C5(2) # target-flags(ppc-tlsld) @TIInit459; SMALL32-NEXT: lfdx 0, 3, 4460; SMALL32-NEXT: lwz 3, L..C8(2) # @GInit461; SMALL32-NEXT: lfd 1, 0(3)462; SMALL32-NEXT: fadd 1, 0, 1463; SMALL32-NEXT: addi 1, 1, 32464; SMALL32-NEXT: lwz 0, 8(1)465; SMALL32-NEXT: mtlr 0466; SMALL32-NEXT: blr467;468; LARGE32-LABEL: loadsTIInit:469; LARGE32: # %bb.0: # %entry470; LARGE32-NEXT: mflr 0471; LARGE32-NEXT: stwu 1, -32(1)472; LARGE32-NEXT: stw 0, 40(1)473; LARGE32-NEXT: addis 6, L..C4@u(2)474; LARGE32-NEXT: addis 3, L..C5@u(2)475; LARGE32-NEXT: lwz 3, L..C5@l(3)476; LARGE32-NEXT: bla .__tls_get_mod[PR]477; LARGE32-NEXT: lwz 4, L..C4@l(6)478; LARGE32-NEXT: lfdx 0, 3, 4479; LARGE32-NEXT: addis 3, L..C8@u(2)480; LARGE32-NEXT: lwz 3, L..C8@l(3)481; LARGE32-NEXT: lfd 1, 0(3)482; LARGE32-NEXT: fadd 1, 0, 1483; LARGE32-NEXT: addi 1, 1, 32484; LARGE32-NEXT: lwz 0, 8(1)485; LARGE32-NEXT: mtlr 0486; LARGE32-NEXT: blr487;488; SMALL64-LABEL: loadsTIInit:489; SMALL64: # %bb.0: # %entry490; SMALL64-NEXT: mflr 0491; SMALL64-NEXT: stdu 1, -48(1)492; SMALL64-NEXT: ld 3, L..C4(2) # target-flags(ppc-tlsldm) @"_$TLSML"493; SMALL64-NEXT: std 0, 64(1)494; SMALL64-NEXT: bla .__tls_get_mod[PR]495; SMALL64-NEXT: ld 4, L..C5(2) # target-flags(ppc-tlsld) @TIInit496; SMALL64-NEXT: lfdx 0, 3, 4497; SMALL64-NEXT: ld 3, L..C8(2) # @GInit498; SMALL64-NEXT: lfd 1, 0(3)499; SMALL64-NEXT: fadd 1, 0, 1500; SMALL64-NEXT: addi 1, 1, 48501; SMALL64-NEXT: ld 0, 16(1)502; SMALL64-NEXT: mtlr 0503; SMALL64-NEXT: blr504;505; LARGE64-LABEL: loadsTIInit:506; LARGE64: # %bb.0: # %entry507; LARGE64-NEXT: mflr 0508; LARGE64-NEXT: stdu 1, -48(1)509; LARGE64-NEXT: addis 3, L..C4@u(2)510; LARGE64-NEXT: std 0, 64(1)511; LARGE64-NEXT: addis 6, L..C5@u(2)512; LARGE64-NEXT: ld 3, L..C4@l(3)513; LARGE64-NEXT: bla .__tls_get_mod[PR]514; LARGE64-NEXT: ld 4, L..C5@l(6)515; LARGE64-NEXT: addis 5, L..C8@u(2)516; LARGE64-NEXT: lfdx 0, 3, 4517; LARGE64-NEXT: ld 3, L..C8@l(5)518; LARGE64-NEXT: lfd 1, 0(3)519; LARGE64-NEXT: fadd 1, 0, 1520; LARGE64-NEXT: addi 1, 1, 48521; LARGE64-NEXT: ld 0, 16(1)522; LARGE64-NEXT: mtlr 0523; LARGE64-NEXT: blr524entry:525 %0 = load double, ptr @TIInit, align 8526 %1 = load double, ptr @GInit, align 8527 %add = fadd double %0, %1528 ret double %add529}530 531; Function Attrs: norecurse nounwind readonly willreturn532define double @loadsTWInit() #1 {533; SMALL32-LABEL: loadsTWInit:534; SMALL32: # %bb.0: # %entry535; SMALL32-NEXT: mflr 0536; SMALL32-NEXT: stwu 1, -32(1)537; SMALL32-NEXT: lwz 3, L..C6(2) # target-flags(ppc-tlsgdm) @TWInit538; SMALL32-NEXT: lwz 4, L..C7(2) # target-flags(ppc-tlsgd) @TWInit539; SMALL32-NEXT: stw 0, 40(1)540; SMALL32-NEXT: bla .__tls_get_addr[PR]541; SMALL32-NEXT: lwz 4, L..C8(2) # @GInit542; SMALL32-NEXT: lfd 0, 0(3)543; SMALL32-NEXT: lfd 1, 0(4)544; SMALL32-NEXT: fadd 1, 0, 1545; SMALL32-NEXT: addi 1, 1, 32546; SMALL32-NEXT: lwz 0, 8(1)547; SMALL32-NEXT: mtlr 0548; SMALL32-NEXT: blr549;550; LARGE32-LABEL: loadsTWInit:551; LARGE32: # %bb.0: # %entry552; LARGE32-NEXT: mflr 0553; LARGE32-NEXT: stwu 1, -32(1)554; LARGE32-NEXT: stw 0, 40(1)555; LARGE32-NEXT: addis 3, L..C6@u(2)556; LARGE32-NEXT: addis 4, L..C7@u(2)557; LARGE32-NEXT: lwz 3, L..C6@l(3)558; LARGE32-NEXT: lwz 4, L..C7@l(4)559; LARGE32-NEXT: bla .__tls_get_addr[PR]560; LARGE32-NEXT: lfd 0, 0(3)561; LARGE32-NEXT: addis 3, L..C8@u(2)562; LARGE32-NEXT: lwz 3, L..C8@l(3)563; LARGE32-NEXT: lfd 1, 0(3)564; LARGE32-NEXT: fadd 1, 0, 1565; LARGE32-NEXT: addi 1, 1, 32566; LARGE32-NEXT: lwz 0, 8(1)567; LARGE32-NEXT: mtlr 0568; LARGE32-NEXT: blr569;570; SMALL64-LABEL: loadsTWInit:571; SMALL64: # %bb.0: # %entry572; SMALL64-NEXT: mflr 0573; SMALL64-NEXT: stdu 1, -48(1)574; SMALL64-NEXT: ld 3, L..C6(2) # target-flags(ppc-tlsgdm) @TWInit575; SMALL64-NEXT: ld 4, L..C7(2) # target-flags(ppc-tlsgd) @TWInit576; SMALL64-NEXT: std 0, 64(1)577; SMALL64-NEXT: bla .__tls_get_addr[PR]578; SMALL64-NEXT: ld 4, L..C8(2) # @GInit579; SMALL64-NEXT: lfd 0, 0(3)580; SMALL64-NEXT: lfd 1, 0(4)581; SMALL64-NEXT: fadd 1, 0, 1582; SMALL64-NEXT: addi 1, 1, 48583; SMALL64-NEXT: ld 0, 16(1)584; SMALL64-NEXT: mtlr 0585; SMALL64-NEXT: blr586;587; LARGE64-LABEL: loadsTWInit:588; LARGE64: # %bb.0: # %entry589; LARGE64-NEXT: mflr 0590; LARGE64-NEXT: stdu 1, -48(1)591; LARGE64-NEXT: addis 3, L..C6@u(2)592; LARGE64-NEXT: addis 4, L..C7@u(2)593; LARGE64-NEXT: std 0, 64(1)594; LARGE64-NEXT: ld 3, L..C6@l(3)595; LARGE64-NEXT: ld 4, L..C7@l(4)596; LARGE64-NEXT: bla .__tls_get_addr[PR]597; LARGE64-NEXT: addis 4, L..C8@u(2)598; LARGE64-NEXT: lfd 0, 0(3)599; LARGE64-NEXT: ld 3, L..C8@l(4)600; LARGE64-NEXT: lfd 1, 0(3)601; LARGE64-NEXT: fadd 1, 0, 1602; LARGE64-NEXT: addi 1, 1, 48603; LARGE64-NEXT: ld 0, 16(1)604; LARGE64-NEXT: mtlr 0605; LARGE64-NEXT: blr606entry:607 %0 = load double, ptr @TWInit, align 8608 %1 = load double, ptr @GInit, align 8609 %add = fadd double %0, %1610 ret double %add611}612 613; External symbol reference checks for .__tls_get_addr/.__tls_get_mod614 615; SMALL32: .extern .__tls_get_addr[PR]616; SMALL32: .extern .__tls_get_mod[PR]617; SMALL64: .extern .__tls_get_addr[PR]618; SMALL64: .extern .__tls_get_mod[PR]619; LARGE32: .extern .__tls_get_addr[PR]620; LARGE32: .extern .__tls_get_mod[PR]621; LARGE64: .extern .__tls_get_addr[PR]622; LARGE64: .extern .__tls_get_mod[PR]623 624; TOC entry checks625 626; SMALL32-LABEL: .toc627; SMALL32-LABEL: L..C0:628; SMALL32-NEXT: .tc .TGUninit[TC],TGUninit[TL]@m629; SMALL32-LABEL: L..C1:630; SMALL32-NEXT: .tc TGUninit[TC],TGUninit[TL]@gd631; SMALL32-LABEL: L..C2:632; SMALL32-NEXT: .tc .TGInit[TC],TGInit[TL]@m633; SMALL32-LABEL: L..C3:634; SMALL32-NEXT: .tc TGInit[TC],TGInit[TL]@gd635; SMALL32-LABEL: L..C4:636; SMALL32-NEXT: .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml637; SMALL32-NEXT: .rename _Renamed..5f24__TLSML[TC],"_$TLSML"638; SMALL32-LABEL: L..C5:639; SMALL32-NEXT: .tc TIInit[TC],TIInit[TL]@ld640; SMALL32-LABEL: L..C6:641; SMALL32-NEXT: .tc .TWInit[TC],TWInit[TL]@m642; SMALL32-LABEL: L..C7:643; SMALL32-NEXT: .tc TWInit[TC],TWInit[TL]@gd644; SMALL32-LABEL: L..C8:645; SMALL32-NEXT: .tc GInit[TC],GInit[RW]646 647; LARGE32-LABEL: .toc648; LARGE32-LABEL: L..C0:649; LARGE32-NEXT: .tc .TGUninit[TE],TGUninit[TL]@m650; LARGE32-LABEL: L..C1:651; LARGE32-NEXT: .tc TGUninit[TE],TGUninit[TL]@gd652; LARGE32-LABEL: L..C2:653; LARGE32-NEXT: .tc .TGInit[TE],TGInit[TL]@m654; LARGE32-LABEL: L..C3:655; LARGE32-NEXT: .tc TGInit[TE],TGInit[TL]@gd656; LARGE32-LABEL: L..C4:657; LARGE32-NEXT: .tc TIInit[TE],TIInit[TL]@ld658; LARGE32-LABEL: L..C5:659; LARGE32-NEXT: .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml660; LARGE32-NEXT: .rename _Renamed..5f24__TLSML[TC],"_$TLSML"661; LARGE32-LABEL: L..C6:662; LARGE32-NEXT: .tc .TWInit[TE],TWInit[TL]@m663; LARGE32-LABEL: L..C7:664; LARGE32-NEXT: .tc TWInit[TE],TWInit[TL]@gd665; LARGE32-LABEL: L..C8:666; LARGE32-NEXT: .tc GInit[TE],GInit[RW]667 668; SMALL64-LABEL: .toc669; SMALL64-LABEL: L..C0:670; SMALL64-NEXT: .tc .TGUninit[TC],TGUninit[TL]@m671; SMALL64-LABEL: L..C1:672; SMALL64-NEXT: .tc TGUninit[TC],TGUninit[TL]@gd673; SMALL64-LABEL: L..C2:674; SMALL64-NEXT: .tc .TGInit[TC],TGInit[TL]@m675; SMALL64-LABEL: L..C3:676; SMALL64-NEXT: .tc TGInit[TC],TGInit[TL]@gd677; SMALL64-LABEL: L..C4:678; SMALL64-NEXT: .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml679; SMALL64-NEXT: .rename _Renamed..5f24__TLSML[TC],"_$TLSML"680; SMALL64-LABEL: L..C5:681; SMALL64-NEXT: .tc TIInit[TC],TIInit[TL]@ld682; SMALL64-LABEL: L..C6:683; SMALL64-NEXT: .tc .TWInit[TC],TWInit[TL]@m684; SMALL64-LABEL: L..C7:685; SMALL64-NEXT: .tc TWInit[TC],TWInit[TL]@gd686; SMALL64-LABEL: L..C8:687; SMALL64-NEXT: .tc GInit[TC],GInit[RW]688 689; LARGE64-LABEL: .toc690; LARGE64-LABEL: L..C0:691; LARGE64-NEXT: .tc .TGUninit[TE],TGUninit[TL]@m692; LARGE64-LABEL: L..C1:693; LARGE64-NEXT: .tc TGUninit[TE],TGUninit[TL]@gd694; LARGE64-LABEL: L..C2:695; LARGE64-NEXT: .tc .TGInit[TE],TGInit[TL]@m696; LARGE64-LABEL: L..C3:697; LARGE64-NEXT: .tc TGInit[TE],TGInit[TL]@gd698; LARGE64-LABEL: L..C4:699; LARGE64-NEXT: .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml700; LARGE64-NEXT: .rename _Renamed..5f24__TLSML[TC],"_$TLSML"701; LARGE64-LABEL: L..C5:702; LARGE64-NEXT: .tc TIInit[TE],TIInit[TL]@ld703; LARGE64-LABEL: L..C6:704; LARGE64-NEXT: .tc .TWInit[TE],TWInit[TL]@m705; LARGE64-LABEL: L..C7:706; LARGE64-NEXT: .tc TWInit[TE],TWInit[TL]@gd707; LARGE64-LABEL: L..C8:708; LARGE64-NEXT: .tc GInit[TE],GInit[RW]709 710 711attributes #0 = { nofree norecurse nounwind willreturn writeonly "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="pwr4" "target-features"="-altivec,-bpermd,-crypto,-direct-move,-extdiv,-float128,-htm,-mma,-paired-vector-memops,-power10-vector,-power8-vector,-power9-vector,-spe,-vsx" }712attributes #1 = { norecurse nounwind readonly willreturn "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="pwr4" "target-features"="-altivec,-bpermd,-crypto,-direct-move,-extdiv,-float128,-htm,-mma,-paired-vector-memops,-power10-vector,-power8-vector,-power9-vector,-spe,-vsx" }713