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1; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec \2; RUN: -mtriple powerpc-ibm-aix-xcoff < %s | FileCheck %s \3; RUN: --check-prefix=SMALL324; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec \5; RUN: -mtriple powerpc-ibm-aix-xcoff --code-model=large < %s \6; RUN: | FileCheck %s --check-prefix=LARGE327; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec \8; RUN: -mtriple powerpc64-ibm-aix-xcoff < %s | FileCheck %s \9; RUN: --check-prefix=SMALL6410; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec \11; RUN: -mtriple powerpc64-ibm-aix-xcoff --code-model=large < %s \12; RUN: | FileCheck %s --check-prefix=LARGE6413 14@TGInit = thread_local global i32 1, align 415@GInit = global i32 1, align 416@TGUninit = thread_local global i32 0, align 417@TIUninit = internal thread_local global i32 0, align 418@TWUninit = weak thread_local global i32 0, align 419 20; Function Attrs: nofree norecurse nounwind willreturn writeonly21define void @storesTGUninit(i32 %Val) #0 {22; SMALL32-LABEL: storesTGUninit:23; SMALL32: # %bb.0: # %entry24; SMALL32-NEXT: mflr 025; SMALL32-NEXT: stwu 1, -32(1)26; SMALL32-NEXT: mr 6, 327; SMALL32-NEXT: lwz 3, L..C0(2)28; SMALL32-NEXT: lwz 4, L..C1(2)29; SMALL32-NEXT: stw 0, 40(1)30; SMALL32-NEXT: bla .__tls_get_addr[PR]31; SMALL32-NEXT: stw 6, 0(3)32; SMALL32-NEXT: addi 1, 1, 3233; SMALL32-NEXT: lwz 0, 8(1)34; SMALL32-NEXT: mtlr 035; SMALL32-NEXT: blr36;37; LARGE32-LABEL: storesTGUninit:38; LARGE32: # %bb.0: # %entry39; LARGE32-NEXT: mflr 040; LARGE32-NEXT: stwu 1, -32(1)41; LARGE32-NEXT: stw 0, 40(1)42; LARGE32-NEXT: mr 6, 343; LARGE32-NEXT: addis 3, L..C0@u(2)44; LARGE32-NEXT: addis 4, L..C1@u(2)45; LARGE32-NEXT: lwz 3, L..C0@l(3)46; LARGE32-NEXT: lwz 4, L..C1@l(4)47; LARGE32-NEXT: bla .__tls_get_addr[PR]48; LARGE32-NEXT: stw 6, 0(3)49; LARGE32-NEXT: addi 1, 1, 3250; LARGE32-NEXT: lwz 0, 8(1)51; LARGE32-NEXT: mtlr 052; LARGE32-NEXT: blr53;54; SMALL64-LABEL: storesTGUninit:55; SMALL64: # %bb.0: # %entry56; SMALL64-NEXT: mflr 057; SMALL64-NEXT: stdu 1, -48(1)58; SMALL64-NEXT: mr 6, 359; SMALL64-NEXT: ld 3, L..C0(2)60; SMALL64-NEXT: ld 4, L..C1(2)61; SMALL64-NEXT: std 0, 64(1)62; SMALL64-NEXT: bla .__tls_get_addr[PR]63; SMALL64-NEXT: stw 6, 0(3)64; SMALL64-NEXT: addi 1, 1, 4865; SMALL64-NEXT: ld 0, 16(1)66; SMALL64-NEXT: mtlr 067; SMALL64-NEXT: blr68;69; LARGE64-LABEL: storesTGUninit:70; LARGE64: # %bb.0: # %entry71; LARGE64-NEXT: mflr 072; LARGE64-NEXT: stdu 1, -48(1)73; LARGE64-NEXT: mr 6, 374; LARGE64-NEXT: addis 3, L..C0@u(2)75; LARGE64-NEXT: addis 4, L..C1@u(2)76; LARGE64-NEXT: std 0, 64(1)77; LARGE64-NEXT: ld 3, L..C0@l(3)78; LARGE64-NEXT: ld 4, L..C1@l(4)79; LARGE64-NEXT: bla .__tls_get_addr[PR]80; LARGE64-NEXT: stw 6, 0(3)81; LARGE64-NEXT: addi 1, 1, 4882; LARGE64-NEXT: ld 0, 16(1)83; LARGE64-NEXT: mtlr 084; LARGE64-NEXT: blr85entry:86 store i32 %Val, ptr @TGUninit, align 487 ret void88}89 90; Function Attrs: nofree norecurse nounwind willreturn writeonly91define void @storesTGInit(i32 %Val) #0 {92; SMALL32-LABEL: storesTGInit:93; SMALL32: # %bb.0: # %entry94; SMALL32-NEXT: mflr 095; SMALL32-NEXT: stwu 1, -32(1)96; SMALL32-NEXT: mr 6, 397; SMALL32-NEXT: lwz 3, L..C2(2)98; SMALL32-NEXT: lwz 4, L..C3(2)99; SMALL32-NEXT: stw 0, 40(1)100; SMALL32-NEXT: bla .__tls_get_addr[PR]101; SMALL32-NEXT: stw 6, 0(3)102; SMALL32-NEXT: addi 1, 1, 32103; SMALL32-NEXT: lwz 0, 8(1)104; SMALL32-NEXT: mtlr 0105; SMALL32-NEXT: blr106;107; LARGE32-LABEL: storesTGInit:108; LARGE32: # %bb.0: # %entry109; LARGE32-NEXT: mflr 0110; LARGE32-NEXT: stwu 1, -32(1)111; LARGE32-NEXT: stw 0, 40(1)112; LARGE32-NEXT: mr 6, 3113; LARGE32-NEXT: addis 3, L..C2@u(2)114; LARGE32-NEXT: addis 4, L..C3@u(2)115; LARGE32-NEXT: lwz 3, L..C2@l(3)116; LARGE32-NEXT: lwz 4, L..C3@l(4)117; LARGE32-NEXT: bla .__tls_get_addr[PR]118; LARGE32-NEXT: stw 6, 0(3)119; LARGE32-NEXT: addi 1, 1, 32120; LARGE32-NEXT: lwz 0, 8(1)121; LARGE32-NEXT: mtlr 0122; LARGE32-NEXT: blr123;124; SMALL64-LABEL: storesTGInit:125; SMALL64: # %bb.0: # %entry126; SMALL64-NEXT: mflr 0127; SMALL64-NEXT: stdu 1, -48(1)128; SMALL64-NEXT: mr 6, 3129; SMALL64-NEXT: ld 3, L..C2(2)130; SMALL64-NEXT: ld 4, L..C3(2)131; SMALL64-NEXT: std 0, 64(1)132; SMALL64-NEXT: bla .__tls_get_addr[PR]133; SMALL64-NEXT: stw 6, 0(3)134; SMALL64-NEXT: addi 1, 1, 48135; SMALL64-NEXT: ld 0, 16(1)136; SMALL64-NEXT: mtlr 0137; SMALL64-NEXT: blr138;139; LARGE64-LABEL: storesTGInit:140; LARGE64: # %bb.0: # %entry141; LARGE64-NEXT: mflr 0142; LARGE64-NEXT: stdu 1, -48(1)143; LARGE64-NEXT: mr 6, 3144; LARGE64-NEXT: addis 3, L..C2@u(2)145; LARGE64-NEXT: addis 4, L..C3@u(2)146; LARGE64-NEXT: std 0, 64(1)147; LARGE64-NEXT: ld 3, L..C2@l(3)148; LARGE64-NEXT: ld 4, L..C3@l(4)149; LARGE64-NEXT: bla .__tls_get_addr[PR]150; LARGE64-NEXT: stw 6, 0(3)151; LARGE64-NEXT: addi 1, 1, 48152; LARGE64-NEXT: ld 0, 16(1)153; LARGE64-NEXT: mtlr 0154; LARGE64-NEXT: blr155entry:156 store i32 %Val, ptr @TGInit, align 4157 ret void158}159 160; Function Attrs: nofree norecurse nounwind willreturn writeonly161define void @storesTIUninit(i32 %Val) #0 {162; SMALL32-LABEL: storesTIUninit:163; SMALL32: # %bb.0: # %entry164; SMALL32-NEXT: mflr 0165; SMALL32-NEXT: stwu 1, -32(1)166; SMALL32-NEXT: mr 6, 3167; SMALL32-NEXT: lwz 3, L..C4(2)168; SMALL32-NEXT: stw 0, 40(1)169; SMALL32-NEXT: bla .__tls_get_mod[PR]170; SMALL32-NEXT: lwz 4, L..C5(2)171; SMALL32-NEXT: stwx 6, 3, 4172; SMALL32-NEXT: addi 1, 1, 32173; SMALL32-NEXT: lwz 0, 8(1)174; SMALL32-NEXT: mtlr 0175; SMALL32-NEXT: blr176;177; LARGE32-LABEL: storesTIUninit:178; LARGE32: # %bb.0: # %entry179; LARGE32-NEXT: mflr 0180; LARGE32-NEXT: stwu 1, -32(1)181; LARGE32-NEXT: stw 0, 40(1)182; LARGE32-NEXT: mr 6, 3183; LARGE32-NEXT: addis 7, L..C4@u(2)184; LARGE32-NEXT: addis 3, L..C5@u(2)185; LARGE32-NEXT: lwz 3, L..C5@l(3)186; LARGE32-NEXT: bla .__tls_get_mod[PR]187; LARGE32-NEXT: lwz 4, L..C4@l(7)188; LARGE32-NEXT: stwx 6, 3, 4189; LARGE32-NEXT: addi 1, 1, 32190; LARGE32-NEXT: lwz 0, 8(1)191; LARGE32-NEXT: mtlr 0192; LARGE32-NEXT: blr193;194; SMALL64-LABEL: storesTIUninit:195; SMALL64: # %bb.0: # %entry196; SMALL64-NEXT: mflr 0197; SMALL64-NEXT: stdu 1, -48(1)198; SMALL64-NEXT: mr 6, 3199; SMALL64-NEXT: ld 3, L..C4(2)200; SMALL64-NEXT: std 0, 64(1)201; SMALL64-NEXT: bla .__tls_get_mod[PR]202; SMALL64-NEXT: ld 4, L..C5(2)203; SMALL64-NEXT: stwx 6, 3, 4204; SMALL64-NEXT: addi 1, 1, 48205; SMALL64-NEXT: ld 0, 16(1)206; SMALL64-NEXT: mtlr 0207; SMALL64-NEXT: blr208;209; LARGE64-LABEL: storesTIUninit:210; LARGE64: # %bb.0: # %entry211; LARGE64-NEXT: mflr 0212; LARGE64-NEXT: stdu 1, -48(1)213; LARGE64-NEXT: mr 6, 3214; LARGE64-NEXT: addis 3, L..C4@u(2)215; LARGE64-NEXT: std 0, 64(1)216; LARGE64-NEXT: addis 7, L..C5@u(2)217; LARGE64-NEXT: ld 3, L..C4@l(3)218; LARGE64-NEXT: bla .__tls_get_mod[PR]219; LARGE64-NEXT: ld 4, L..C5@l(7)220; LARGE64-NEXT: stwx 6, 3, 4221; LARGE64-NEXT: addi 1, 1, 48222; LARGE64-NEXT: ld 0, 16(1)223; LARGE64-NEXT: mtlr 0224; LARGE64-NEXT: blr225entry:226 store i32 %Val, ptr @TIUninit, align 4227 ret void228}229 230; Function Attrs: nofree norecurse nounwind willreturn writeonly231define void @storesTWUninit(i32 %Val) #0 {232; SMALL32-LABEL: storesTWUninit:233; SMALL32: # %bb.0: # %entry234; SMALL32-NEXT: mflr 0235; SMALL32-NEXT: stwu 1, -32(1)236; SMALL32-NEXT: mr 6, 3237; SMALL32-NEXT: lwz 3, L..C6(2)238; SMALL32-NEXT: lwz 4, L..C7(2)239; SMALL32-NEXT: stw 0, 40(1)240; SMALL32-NEXT: bla .__tls_get_addr[PR]241; SMALL32-NEXT: stw 6, 0(3)242; SMALL32-NEXT: addi 1, 1, 32243; SMALL32-NEXT: lwz 0, 8(1)244; SMALL32-NEXT: mtlr 0245; SMALL32-NEXT: blr246;247; LARGE32-LABEL: storesTWUninit:248; LARGE32: # %bb.0: # %entry249; LARGE32-NEXT: mflr 0250; LARGE32-NEXT: stwu 1, -32(1)251; LARGE32-NEXT: stw 0, 40(1)252; LARGE32-NEXT: mr 6, 3253; LARGE32-NEXT: addis 3, L..C6@u(2)254; LARGE32-NEXT: addis 4, L..C7@u(2)255; LARGE32-NEXT: lwz 3, L..C6@l(3)256; LARGE32-NEXT: lwz 4, L..C7@l(4)257; LARGE32-NEXT: bla .__tls_get_addr[PR]258; LARGE32-NEXT: stw 6, 0(3)259; LARGE32-NEXT: addi 1, 1, 32260; LARGE32-NEXT: lwz 0, 8(1)261; LARGE32-NEXT: mtlr 0262; LARGE32-NEXT: blr263;264; SMALL64-LABEL: storesTWUninit:265; SMALL64: # %bb.0: # %entry266; SMALL64-NEXT: mflr 0267; SMALL64-NEXT: stdu 1, -48(1)268; SMALL64-NEXT: mr 6, 3269; SMALL64-NEXT: ld 3, L..C6(2)270; SMALL64-NEXT: ld 4, L..C7(2)271; SMALL64-NEXT: std 0, 64(1)272; SMALL64-NEXT: bla .__tls_get_addr[PR]273; SMALL64-NEXT: stw 6, 0(3)274; SMALL64-NEXT: addi 1, 1, 48275; SMALL64-NEXT: ld 0, 16(1)276; SMALL64-NEXT: mtlr 0277; SMALL64-NEXT: blr278;279; LARGE64-LABEL: storesTWUninit:280; LARGE64: # %bb.0: # %entry281; LARGE64-NEXT: mflr 0282; LARGE64-NEXT: stdu 1, -48(1)283; LARGE64-NEXT: mr 6, 3284; LARGE64-NEXT: addis 3, L..C6@u(2)285; LARGE64-NEXT: addis 4, L..C7@u(2)286; LARGE64-NEXT: std 0, 64(1)287; LARGE64-NEXT: ld 3, L..C6@l(3)288; LARGE64-NEXT: ld 4, L..C7@l(4)289; LARGE64-NEXT: bla .__tls_get_addr[PR]290; LARGE64-NEXT: stw 6, 0(3)291; LARGE64-NEXT: addi 1, 1, 48292; LARGE64-NEXT: ld 0, 16(1)293; LARGE64-NEXT: mtlr 0294; LARGE64-NEXT: blr295entry:296 store i32 %Val, ptr @TWUninit, align 4297 ret void298}299 300; Function Attrs: norecurse nounwind readonly willreturn301define i32 @loadsTGUninit() #1 {302; SMALL32-LABEL: loadsTGUninit:303; SMALL32: # %bb.0: # %entry304; SMALL32-NEXT: mflr 0305; SMALL32-NEXT: stwu 1, -32(1)306; SMALL32-NEXT: lwz 3, L..C0(2)307; SMALL32-NEXT: lwz 4, L..C1(2)308; SMALL32-NEXT: stw 0, 40(1)309; SMALL32-NEXT: bla .__tls_get_addr[PR]310; SMALL32-NEXT: lwz 4, L..C8(2)311; SMALL32-NEXT: lwz 3, 0(3)312; SMALL32-NEXT: lwz 4, 0(4)313; SMALL32-NEXT: add 3, 4, 3314; SMALL32-NEXT: addi 1, 1, 32315; SMALL32-NEXT: lwz 0, 8(1)316; SMALL32-NEXT: mtlr 0317; SMALL32-NEXT: blr318;319; LARGE32-LABEL: loadsTGUninit:320; LARGE32: # %bb.0: # %entry321; LARGE32-NEXT: mflr 0322; LARGE32-NEXT: stwu 1, -32(1)323; LARGE32-NEXT: stw 0, 40(1)324; LARGE32-NEXT: addis 3, L..C0@u(2)325; LARGE32-NEXT: addis 4, L..C1@u(2)326; LARGE32-NEXT: lwz 3, L..C0@l(3)327; LARGE32-NEXT: lwz 4, L..C1@l(4)328; LARGE32-NEXT: bla .__tls_get_addr[PR]329; LARGE32-NEXT: lwz 3, 0(3)330; LARGE32-NEXT: addis 4, L..C8@u(2)331; LARGE32-NEXT: lwz 4, L..C8@l(4)332; LARGE32-NEXT: lwz 4, 0(4)333; LARGE32-NEXT: add 3, 4, 3334; LARGE32-NEXT: addi 1, 1, 32335; LARGE32-NEXT: lwz 0, 8(1)336; LARGE32-NEXT: mtlr 0337; LARGE32-NEXT: blr338;339; SMALL64-LABEL: loadsTGUninit:340; SMALL64: # %bb.0: # %entry341; SMALL64-NEXT: mflr 0342; SMALL64-NEXT: stdu 1, -48(1)343; SMALL64-NEXT: ld 3, L..C0(2)344; SMALL64-NEXT: ld 4, L..C1(2)345; SMALL64-NEXT: std 0, 64(1)346; SMALL64-NEXT: bla .__tls_get_addr[PR]347; SMALL64-NEXT: ld 4, L..C8(2)348; SMALL64-NEXT: lwz 3, 0(3)349; SMALL64-NEXT: lwz 4, 0(4)350; SMALL64-NEXT: add 3, 4, 3351; SMALL64-NEXT: addi 1, 1, 48352; SMALL64-NEXT: ld 0, 16(1)353; SMALL64-NEXT: mtlr 0354; SMALL64-NEXT: blr355;356; LARGE64-LABEL: loadsTGUninit:357; LARGE64: # %bb.0: # %entry358; LARGE64-NEXT: mflr 0359; LARGE64-NEXT: stdu 1, -48(1)360; LARGE64-NEXT: addis 3, L..C0@u(2)361; LARGE64-NEXT: addis 4, L..C1@u(2)362; LARGE64-NEXT: std 0, 64(1)363; LARGE64-NEXT: ld 3, L..C0@l(3)364; LARGE64-NEXT: ld 4, L..C1@l(4)365; LARGE64-NEXT: bla .__tls_get_addr[PR]366; LARGE64-NEXT: addis 4, L..C8@u(2)367; LARGE64-NEXT: lwz 3, 0(3)368; LARGE64-NEXT: ld 4, L..C8@l(4)369; LARGE64-NEXT: lwz 4, 0(4)370; LARGE64-NEXT: add 3, 4, 3371; LARGE64-NEXT: addi 1, 1, 48372; LARGE64-NEXT: ld 0, 16(1)373; LARGE64-NEXT: mtlr 0374; LARGE64-NEXT: blr375entry:376 %0 = load i32, ptr @TGUninit, align 4377 %1 = load i32, ptr @GInit, align 4378 %add = add nsw i32 %1, %0379 ret i32 %add380}381 382; Function Attrs: norecurse nounwind readonly willreturn383define i32 @loadsTGInit() #1 {384; SMALL32-LABEL: loadsTGInit:385; SMALL32: # %bb.0: # %entry386; SMALL32-NEXT: mflr 0387; SMALL32-NEXT: stwu 1, -32(1)388; SMALL32-NEXT: lwz 3, L..C2(2)389; SMALL32-NEXT: lwz 4, L..C3(2)390; SMALL32-NEXT: stw 0, 40(1)391; SMALL32-NEXT: bla .__tls_get_addr[PR]392; SMALL32-NEXT: lwz 4, L..C8(2)393; SMALL32-NEXT: lwz 3, 0(3)394; SMALL32-NEXT: lwz 4, 0(4)395; SMALL32-NEXT: add 3, 4, 3396; SMALL32-NEXT: addi 1, 1, 32397; SMALL32-NEXT: lwz 0, 8(1)398; SMALL32-NEXT: mtlr 0399; SMALL32-NEXT: blr400;401; LARGE32-LABEL: loadsTGInit:402; LARGE32: # %bb.0: # %entry403; LARGE32-NEXT: mflr 0404; LARGE32-NEXT: stwu 1, -32(1)405; LARGE32-NEXT: stw 0, 40(1)406; LARGE32-NEXT: addis 3, L..C2@u(2)407; LARGE32-NEXT: addis 4, L..C3@u(2)408; LARGE32-NEXT: lwz 3, L..C2@l(3)409; LARGE32-NEXT: lwz 4, L..C3@l(4)410; LARGE32-NEXT: bla .__tls_get_addr[PR]411; LARGE32-NEXT: lwz 3, 0(3)412; LARGE32-NEXT: addis 4, L..C8@u(2)413; LARGE32-NEXT: lwz 4, L..C8@l(4)414; LARGE32-NEXT: lwz 4, 0(4)415; LARGE32-NEXT: add 3, 4, 3416; LARGE32-NEXT: addi 1, 1, 32417; LARGE32-NEXT: lwz 0, 8(1)418; LARGE32-NEXT: mtlr 0419; LARGE32-NEXT: blr420;421; SMALL64-LABEL: loadsTGInit:422; SMALL64: # %bb.0: # %entry423; SMALL64-NEXT: mflr 0424; SMALL64-NEXT: stdu 1, -48(1)425; SMALL64-NEXT: ld 3, L..C2(2)426; SMALL64-NEXT: ld 4, L..C3(2)427; SMALL64-NEXT: std 0, 64(1)428; SMALL64-NEXT: bla .__tls_get_addr[PR]429; SMALL64-NEXT: ld 4, L..C8(2)430; SMALL64-NEXT: lwz 3, 0(3)431; SMALL64-NEXT: lwz 4, 0(4)432; SMALL64-NEXT: add 3, 4, 3433; SMALL64-NEXT: addi 1, 1, 48434; SMALL64-NEXT: ld 0, 16(1)435; SMALL64-NEXT: mtlr 0436; SMALL64-NEXT: blr437;438; LARGE64-LABEL: loadsTGInit:439; LARGE64: # %bb.0: # %entry440; LARGE64-NEXT: mflr 0441; LARGE64-NEXT: stdu 1, -48(1)442; LARGE64-NEXT: addis 3, L..C2@u(2)443; LARGE64-NEXT: addis 4, L..C3@u(2)444; LARGE64-NEXT: std 0, 64(1)445; LARGE64-NEXT: ld 3, L..C2@l(3)446; LARGE64-NEXT: ld 4, L..C3@l(4)447; LARGE64-NEXT: bla .__tls_get_addr[PR]448; LARGE64-NEXT: addis 4, L..C8@u(2)449; LARGE64-NEXT: lwz 3, 0(3)450; LARGE64-NEXT: ld 4, L..C8@l(4)451; LARGE64-NEXT: lwz 4, 0(4)452; LARGE64-NEXT: add 3, 4, 3453; LARGE64-NEXT: addi 1, 1, 48454; LARGE64-NEXT: ld 0, 16(1)455; LARGE64-NEXT: mtlr 0456; LARGE64-NEXT: blr457entry:458 %0 = load i32, ptr @TGInit, align 4459 %1 = load i32, ptr @GInit, align 4460 %add = add nsw i32 %1, %0461 ret i32 %add462}463 464; Function Attrs: norecurse nounwind readonly willreturn465define i32 @loadsTIUninit() #1 {466; SMALL32-LABEL: loadsTIUninit:467; SMALL32: # %bb.0: # %entry468; SMALL32-NEXT: mflr 0469; SMALL32-NEXT: stwu 1, -32(1)470; SMALL32-NEXT: lwz 3, L..C4(2)471; SMALL32-NEXT: stw 0, 40(1)472; SMALL32-NEXT: bla .__tls_get_mod[PR]473; SMALL32-NEXT: lwz 4, L..C5(2)474; SMALL32-NEXT: lwzx 3, 3, 4475; SMALL32-NEXT: lwz 4, L..C8(2)476; SMALL32-NEXT: lwz 4, 0(4)477; SMALL32-NEXT: add 3, 4, 3478; SMALL32-NEXT: addi 1, 1, 32479; SMALL32-NEXT: lwz 0, 8(1)480; SMALL32-NEXT: mtlr 0481; SMALL32-NEXT: blr482;483; LARGE32-LABEL: loadsTIUninit:484; LARGE32: # %bb.0: # %entry485; LARGE32-NEXT: mflr 0486; LARGE32-NEXT: stwu 1, -32(1)487; LARGE32-NEXT: stw 0, 40(1)488; LARGE32-NEXT: addis 6, L..C4@u(2)489; LARGE32-NEXT: addis 3, L..C5@u(2)490; LARGE32-NEXT: lwz 3, L..C5@l(3)491; LARGE32-NEXT: bla .__tls_get_mod[PR]492; LARGE32-NEXT: lwz 4, L..C4@l(6)493; LARGE32-NEXT: lwzx 3, 3, 4494; LARGE32-NEXT: addis 4, L..C8@u(2)495; LARGE32-NEXT: lwz 4, L..C8@l(4)496; LARGE32-NEXT: lwz 4, 0(4)497; LARGE32-NEXT: add 3, 4, 3498; LARGE32-NEXT: addi 1, 1, 32499; LARGE32-NEXT: lwz 0, 8(1)500; LARGE32-NEXT: mtlr 0501; LARGE32-NEXT: blr502;503; SMALL64-LABEL: loadsTIUninit:504; SMALL64: # %bb.0: # %entry505; SMALL64-NEXT: mflr 0506; SMALL64-NEXT: stdu 1, -48(1)507; SMALL64-NEXT: ld 3, L..C4(2)508; SMALL64-NEXT: std 0, 64(1)509; SMALL64-NEXT: bla .__tls_get_mod[PR]510; SMALL64-NEXT: ld 4, L..C5(2)511; SMALL64-NEXT: lwzx 3, 3, 4512; SMALL64-NEXT: ld 4, L..C8(2)513; SMALL64-NEXT: lwz 4, 0(4)514; SMALL64-NEXT: add 3, 4, 3515; SMALL64-NEXT: addi 1, 1, 48516; SMALL64-NEXT: ld 0, 16(1)517; SMALL64-NEXT: mtlr 0518; SMALL64-NEXT: blr519;520; LARGE64-LABEL: loadsTIUninit:521; LARGE64: # %bb.0: # %entry522; LARGE64-NEXT: mflr 0523; LARGE64-NEXT: stdu 1, -48(1)524; LARGE64-NEXT: addis 3, L..C4@u(2)525; LARGE64-NEXT: std 0, 64(1)526; LARGE64-NEXT: addis 6, L..C5@u(2)527; LARGE64-NEXT: ld 3, L..C4@l(3)528; LARGE64-NEXT: bla .__tls_get_mod[PR]529; LARGE64-NEXT: ld 4, L..C5@l(6)530; LARGE64-NEXT: addis 5, L..C8@u(2)531; LARGE64-NEXT: lwzx 3, 3, 4532; LARGE64-NEXT: ld 4, L..C8@l(5)533; LARGE64-NEXT: lwz 4, 0(4)534; LARGE64-NEXT: add 3, 4, 3535; LARGE64-NEXT: addi 1, 1, 48536; LARGE64-NEXT: ld 0, 16(1)537; LARGE64-NEXT: mtlr 0538; LARGE64-NEXT: blr539entry:540 %0 = load i32, ptr @TIUninit, align 4541 %1 = load i32, ptr @GInit, align 4542 %add = add nsw i32 %1, %0543 ret i32 %add544}545 546; Function Attrs: norecurse nounwind readonly willreturn547define i32 @loadsTWUninit() #1 {548; SMALL32-LABEL: loadsTWUninit:549; SMALL32: # %bb.0: # %entry550; SMALL32-NEXT: mflr 0551; SMALL32-NEXT: stwu 1, -32(1)552; SMALL32-NEXT: lwz 3, L..C6(2)553; SMALL32-NEXT: lwz 4, L..C7(2)554; SMALL32-NEXT: stw 0, 40(1)555; SMALL32-NEXT: bla .__tls_get_addr[PR]556; SMALL32-NEXT: lwz 4, L..C8(2)557; SMALL32-NEXT: lwz 3, 0(3)558; SMALL32-NEXT: lwz 4, 0(4)559; SMALL32-NEXT: add 3, 4, 3560; SMALL32-NEXT: addi 1, 1, 32561; SMALL32-NEXT: lwz 0, 8(1)562; SMALL32-NEXT: mtlr 0563; SMALL32-NEXT: blr564;565; LARGE32-LABEL: loadsTWUninit:566; LARGE32: # %bb.0: # %entry567; LARGE32-NEXT: mflr 0568; LARGE32-NEXT: stwu 1, -32(1)569; LARGE32-NEXT: stw 0, 40(1)570; LARGE32-NEXT: addis 3, L..C6@u(2)571; LARGE32-NEXT: addis 4, L..C7@u(2)572; LARGE32-NEXT: lwz 3, L..C6@l(3)573; LARGE32-NEXT: lwz 4, L..C7@l(4)574; LARGE32-NEXT: bla .__tls_get_addr[PR]575; LARGE32-NEXT: lwz 3, 0(3)576; LARGE32-NEXT: addis 4, L..C8@u(2)577; LARGE32-NEXT: lwz 4, L..C8@l(4)578; LARGE32-NEXT: lwz 4, 0(4)579; LARGE32-NEXT: add 3, 4, 3580; LARGE32-NEXT: addi 1, 1, 32581; LARGE32-NEXT: lwz 0, 8(1)582; LARGE32-NEXT: mtlr 0583; LARGE32-NEXT: blr584;585; SMALL64-LABEL: loadsTWUninit:586; SMALL64: # %bb.0: # %entry587; SMALL64-NEXT: mflr 0588; SMALL64-NEXT: stdu 1, -48(1)589; SMALL64-NEXT: ld 3, L..C6(2)590; SMALL64-NEXT: ld 4, L..C7(2)591; SMALL64-NEXT: std 0, 64(1)592; SMALL64-NEXT: bla .__tls_get_addr[PR]593; SMALL64-NEXT: ld 4, L..C8(2)594; SMALL64-NEXT: lwz 3, 0(3)595; SMALL64-NEXT: lwz 4, 0(4)596; SMALL64-NEXT: add 3, 4, 3597; SMALL64-NEXT: addi 1, 1, 48598; SMALL64-NEXT: ld 0, 16(1)599; SMALL64-NEXT: mtlr 0600; SMALL64-NEXT: blr601;602; LARGE64-LABEL: loadsTWUninit:603; LARGE64: # %bb.0: # %entry604; LARGE64-NEXT: mflr 0605; LARGE64-NEXT: stdu 1, -48(1)606; LARGE64-NEXT: addis 3, L..C6@u(2)607; LARGE64-NEXT: addis 4, L..C7@u(2)608; LARGE64-NEXT: std 0, 64(1)609; LARGE64-NEXT: ld 3, L..C6@l(3)610; LARGE64-NEXT: ld 4, L..C7@l(4)611; LARGE64-NEXT: bla .__tls_get_addr[PR]612; LARGE64-NEXT: addis 4, L..C8@u(2)613; LARGE64-NEXT: lwz 3, 0(3)614; LARGE64-NEXT: ld 4, L..C8@l(4)615; LARGE64-NEXT: lwz 4, 0(4)616; LARGE64-NEXT: add 3, 4, 3617; LARGE64-NEXT: addi 1, 1, 48618; LARGE64-NEXT: ld 0, 16(1)619; LARGE64-NEXT: mtlr 0620; LARGE64-NEXT: blr621entry:622 %0 = load i32, ptr @TWUninit, align 4623 %1 = load i32, ptr @GInit, align 4624 %add = add nsw i32 %1, %0625 ret i32 %add626}627 628; External symbol reference checks for .__tls_get_addr/.__tls_get_mod629 630; SMALL32: .extern .__tls_get_addr[PR]631; SMALL32: .extern .__tls_get_mod[PR]632; SMALL64: .extern .__tls_get_addr[PR]633; SMALL64: .extern .__tls_get_mod[PR]634; LARGE32: .extern .__tls_get_addr[PR]635; LARGE32: .extern .__tls_get_mod[PR]636; LARGE64: .extern .__tls_get_addr[PR]637; LARGE64: .extern .__tls_get_mod[PR]638 639; TOC entry checks640 641; SMALL32-LABEL: .toc642; SMALL32-LABEL: L..C0:643; SMALL32-NEXT: .tc .TGUninit[TC],TGUninit[TL]@m644; SMALL32-LABEL: L..C1:645; SMALL32-NEXT: .tc TGUninit[TC],TGUninit[TL]@gd646; SMALL32-LABEL: L..C2:647; SMALL32-NEXT: .tc .TGInit[TC],TGInit[TL]@m648; SMALL32-LABEL: L..C3:649; SMALL32-NEXT: .tc TGInit[TC],TGInit[TL]@gd650; SMALL32-LABEL: L..C4:651; SMALL32-NEXT: .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml652; SMALL32-NEXT: .rename _Renamed..5f24__TLSML[TC],"_$TLSML"653; SMALL32-LABEL: L..C5:654; SMALL32-NEXT: .tc TIUninit[TC],TIUninit[UL]@ld655; SMALL32-LABEL: L..C6:656; SMALL32-NEXT: .tc .TWUninit[TC],TWUninit[TL]@m657; SMALL32-LABEL: L..C7:658; SMALL32-NEXT: .tc TWUninit[TC],TWUninit[TL]@gd659; SMALL32-LABEL: L..C8:660; SMALL32-NEXT: .tc GInit[TC],GInit[RW]661 662; LARGE32-LABEL: .toc663; LARGE32-LABEL: L..C0:664; LARGE32-NEXT: .tc .TGUninit[TE],TGUninit[TL]@m665; LARGE32-LABEL: L..C1:666; LARGE32-NEXT: .tc TGUninit[TE],TGUninit[TL]@gd667; LARGE32-LABEL: L..C2:668; LARGE32-NEXT: .tc .TGInit[TE],TGInit[TL]@m669; LARGE32-LABEL: L..C3:670; LARGE32-NEXT: .tc TGInit[TE],TGInit[TL]@gd671; LARGE32-LABEL: L..C4:672; LARGE32-NEXT: .tc TIUninit[TE],TIUninit[UL]@ld673; LARGE32-LABEL: L..C5:674; LARGE32-NEXT: .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml675; LARGE32-NEXT: .rename _Renamed..5f24__TLSML[TC],"_$TLSML"676; LARGE32-LABEL: L..C6:677; LARGE32-NEXT: .tc .TWUninit[TE],TWUninit[TL]@m678; LARGE32-LABEL: L..C7:679; LARGE32-NEXT: .tc TWUninit[TE],TWUninit[TL]@gd680; LARGE32-LABEL: L..C8:681; LARGE32-NEXT: .tc GInit[TE],GInit[RW]682 683; SMALL64-LABEL: .toc684; SMALL64-LABEL: L..C0:685; SMALL64-NEXT: .tc .TGUninit[TC],TGUninit[TL]@m686; SMALL64-LABEL: L..C1:687; SMALL64-NEXT: .tc TGUninit[TC],TGUninit[TL]@gd688; SMALL64-LABEL: L..C2:689; SMALL64-NEXT: .tc .TGInit[TC],TGInit[TL]@m690; SMALL64-LABEL: L..C3:691; SMALL64-NEXT: .tc TGInit[TC],TGInit[TL]@gd692; SMALL64-LABEL: L..C4:693; SMALL64-NEXT: .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml694; SMALL64-NEXT: .rename _Renamed..5f24__TLSML[TC],"_$TLSML"695; SMALL64-LABEL: L..C5:696; SMALL64-NEXT: .tc TIUninit[TC],TIUninit[UL]@ld697; SMALL64-LABEL: L..C6:698; SMALL64-NEXT: .tc .TWUninit[TC],TWUninit[TL]@m699; SMALL64-LABEL: L..C7:700; SMALL64-NEXT: .tc TWUninit[TC],TWUninit[TL]@gd701; SMALL64-LABEL: L..C8:702; SMALL64-NEXT: .tc GInit[TC],GInit[RW]703 704; LARGE64-LABEL: .toc705; LARGE64-LABEL: L..C0:706; LARGE64-NEXT: .tc .TGUninit[TE],TGUninit[TL]@m707; LARGE64-LABEL: L..C1:708; LARGE64-NEXT: .tc TGUninit[TE],TGUninit[TL]@gd709; LARGE64-LABEL: L..C2:710; LARGE64-NEXT: .tc .TGInit[TE],TGInit[TL]@m711; LARGE64-LABEL: L..C3:712; LARGE64-NEXT: .tc TGInit[TE],TGInit[TL]@gd713; LARGE64-LABEL: L..C4:714; LARGE64-NEXT: .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml715; LARGE64-NEXT: .rename _Renamed..5f24__TLSML[TC],"_$TLSML"716; LARGE64-LABEL: L..C5:717; LARGE64-NEXT: .tc TIUninit[TE],TIUninit[UL]@ld718; LARGE64-LABEL: L..C6:719; LARGE64-NEXT: .tc .TWUninit[TE],TWUninit[TL]@m720; LARGE64-LABEL: L..C7:721; LARGE64-NEXT: .tc TWUninit[TE],TWUninit[TL]@gd722; LARGE64-LABEL: L..C8:723; LARGE64-NEXT: .tc GInit[TE],GInit[RW]724 725attributes #0 = { nofree norecurse nounwind willreturn writeonly "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="pwr4" "target-features"="-altivec,-bpermd,-crypto,-direct-move,-extdiv,-float128,-htm,-mma,-paired-vector-memops,-power10-vector,-power8-vector,-power9-vector,-spe,-vsx" }726attributes #1 = { norecurse nounwind readonly willreturn "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="pwr4" "target-features"="-altivec,-bpermd,-crypto,-direct-move,-extdiv,-float128,-htm,-mma,-paired-vector-memops,-power10-vector,-power8-vector,-power9-vector,-spe,-vsx" }727