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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec \3; RUN: -mtriple powerpc-ibm-aix-xcoff < %s | FileCheck %s \4; RUN: --check-prefix=SMALL325; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec \6; RUN: -mtriple powerpc-ibm-aix-xcoff --code-model=large < %s \7; RUN: | FileCheck %s --check-prefix=LARGE328; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec \9; RUN: -mtriple powerpc64-ibm-aix-xcoff < %s | FileCheck %s \10; RUN: --check-prefix=SMALL6411; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec \12; RUN: -mtriple powerpc64-ibm-aix-xcoff --code-model=large < %s \13; RUN: | FileCheck %s --check-prefix=LARGE6414 15@TGInit = thread_local global i64 1, align 816@TWInit = weak thread_local global i64 1, align 817@GInit = global i64 1, align 818@TIUninit = internal thread_local global i64 0, align 819@TIInit = internal thread_local global i64 1, align 820 21; Function Attrs: nofree norecurse nounwind willreturn writeonly22define void @storesTGInit(i64 %Val) #0 {23; SMALL32-LABEL: storesTGInit:24; SMALL32: # %bb.0: # %entry25; SMALL32-NEXT: mflr 026; SMALL32-NEXT: stwu 1, -32(1)27; SMALL32-NEXT: mr 6, 428; SMALL32-NEXT: mr 7, 329; SMALL32-NEXT: lwz 3, L..C0(2) # target-flags(ppc-tlsgdm) @TGInit30; SMALL32-NEXT: lwz 4, L..C1(2) # target-flags(ppc-tlsgd) @TGInit31; SMALL32-NEXT: stw 0, 40(1)32; SMALL32-NEXT: bla .__tls_get_addr[PR]33; SMALL32-NEXT: stw 6, 4(3)34; SMALL32-NEXT: stw 7, 0(3)35; SMALL32-NEXT: addi 1, 1, 3236; SMALL32-NEXT: lwz 0, 8(1)37; SMALL32-NEXT: mtlr 038; SMALL32-NEXT: blr39;40; LARGE32-LABEL: storesTGInit:41; LARGE32: # %bb.0: # %entry42; LARGE32-NEXT: mflr 043; LARGE32-NEXT: stwu 1, -32(1)44; LARGE32-NEXT: stw 0, 40(1)45; LARGE32-NEXT: mr 6, 446; LARGE32-NEXT: mr 7, 347; LARGE32-NEXT: addis 3, L..C0@u(2)48; LARGE32-NEXT: addis 4, L..C1@u(2)49; LARGE32-NEXT: lwz 3, L..C0@l(3)50; LARGE32-NEXT: lwz 4, L..C1@l(4)51; LARGE32-NEXT: bla .__tls_get_addr[PR]52; LARGE32-NEXT: stw 6, 4(3)53; LARGE32-NEXT: stw 7, 0(3)54; LARGE32-NEXT: addi 1, 1, 3255; LARGE32-NEXT: lwz 0, 8(1)56; LARGE32-NEXT: mtlr 057; LARGE32-NEXT: blr58;59; SMALL64-LABEL: storesTGInit:60; SMALL64: # %bb.0: # %entry61; SMALL64-NEXT: mflr 062; SMALL64-NEXT: stdu 1, -48(1)63; SMALL64-NEXT: mr 6, 364; SMALL64-NEXT: ld 3, L..C0(2) # target-flags(ppc-tlsgdm) @TGInit65; SMALL64-NEXT: ld 4, L..C1(2) # target-flags(ppc-tlsgd) @TGInit66; SMALL64-NEXT: std 0, 64(1)67; SMALL64-NEXT: bla .__tls_get_addr[PR]68; SMALL64-NEXT: std 6, 0(3)69; SMALL64-NEXT: addi 1, 1, 4870; SMALL64-NEXT: ld 0, 16(1)71; SMALL64-NEXT: mtlr 072; SMALL64-NEXT: blr73;74; LARGE64-LABEL: storesTGInit:75; LARGE64: # %bb.0: # %entry76; LARGE64-NEXT: mflr 077; LARGE64-NEXT: stdu 1, -48(1)78; LARGE64-NEXT: mr 6, 379; LARGE64-NEXT: addis 3, L..C0@u(2)80; LARGE64-NEXT: addis 4, L..C1@u(2)81; LARGE64-NEXT: std 0, 64(1)82; LARGE64-NEXT: ld 3, L..C0@l(3)83; LARGE64-NEXT: ld 4, L..C1@l(4)84; LARGE64-NEXT: bla .__tls_get_addr[PR]85; LARGE64-NEXT: std 6, 0(3)86; LARGE64-NEXT: addi 1, 1, 4887; LARGE64-NEXT: ld 0, 16(1)88; LARGE64-NEXT: mtlr 089; LARGE64-NEXT: blr90entry:91 store i64 %Val, ptr @TGInit, align 892 ret void93}94 95; Function Attrs: nofree norecurse nounwind willreturn writeonly96define void @storesTIUninit(i64 %Val) #0 {97; SMALL32-LABEL: storesTIUninit:98; SMALL32: # %bb.0: # %entry99; SMALL32-NEXT: mflr 0100; SMALL32-NEXT: stwu 1, -32(1)101; SMALL32-NEXT: mr 7, 3102; SMALL32-NEXT: lwz 3, L..C2(2) # target-flags(ppc-tlsldm) @"_$TLSML"103; SMALL32-NEXT: stw 0, 40(1)104; SMALL32-NEXT: mr 6, 4105; SMALL32-NEXT: bla .__tls_get_mod[PR]106; SMALL32-NEXT: lwz 4, L..C3(2) # target-flags(ppc-tlsld) @TIUninit107; SMALL32-NEXT: stwux 7, 3, 4108; SMALL32-NEXT: stw 6, 4(3)109; SMALL32-NEXT: addi 1, 1, 32110; SMALL32-NEXT: lwz 0, 8(1)111; SMALL32-NEXT: mtlr 0112; SMALL32-NEXT: blr113;114; LARGE32-LABEL: storesTIUninit:115; LARGE32: # %bb.0: # %entry116; LARGE32-NEXT: mflr 0117; LARGE32-NEXT: stwu 1, -32(1)118; LARGE32-NEXT: stw 0, 40(1)119; LARGE32-NEXT: mr 7, 3120; LARGE32-NEXT: addis 8, L..C2@u(2)121; LARGE32-NEXT: addis 3, L..C3@u(2)122; LARGE32-NEXT: mr 6, 4123; LARGE32-NEXT: lwz 3, L..C3@l(3)124; LARGE32-NEXT: bla .__tls_get_mod[PR]125; LARGE32-NEXT: lwz 4, L..C2@l(8)126; LARGE32-NEXT: stwux 7, 3, 4127; LARGE32-NEXT: stw 6, 4(3)128; LARGE32-NEXT: addi 1, 1, 32129; LARGE32-NEXT: lwz 0, 8(1)130; LARGE32-NEXT: mtlr 0131; LARGE32-NEXT: blr132;133; SMALL64-LABEL: storesTIUninit:134; SMALL64: # %bb.0: # %entry135; SMALL64-NEXT: mflr 0136; SMALL64-NEXT: stdu 1, -48(1)137; SMALL64-NEXT: mr 6, 3138; SMALL64-NEXT: ld 3, L..C2(2) # target-flags(ppc-tlsldm) @"_$TLSML"139; SMALL64-NEXT: std 0, 64(1)140; SMALL64-NEXT: bla .__tls_get_mod[PR]141; SMALL64-NEXT: ld 4, L..C3(2) # target-flags(ppc-tlsld) @TIUninit142; SMALL64-NEXT: stdx 6, 3, 4143; SMALL64-NEXT: addi 1, 1, 48144; SMALL64-NEXT: ld 0, 16(1)145; SMALL64-NEXT: mtlr 0146; SMALL64-NEXT: blr147;148; LARGE64-LABEL: storesTIUninit:149; LARGE64: # %bb.0: # %entry150; LARGE64-NEXT: mflr 0151; LARGE64-NEXT: stdu 1, -48(1)152; LARGE64-NEXT: mr 6, 3153; LARGE64-NEXT: addis 3, L..C2@u(2)154; LARGE64-NEXT: std 0, 64(1)155; LARGE64-NEXT: addis 7, L..C3@u(2)156; LARGE64-NEXT: ld 3, L..C2@l(3)157; LARGE64-NEXT: bla .__tls_get_mod[PR]158; LARGE64-NEXT: ld 4, L..C3@l(7)159; LARGE64-NEXT: stdx 6, 3, 4160; LARGE64-NEXT: addi 1, 1, 48161; LARGE64-NEXT: ld 0, 16(1)162; LARGE64-NEXT: mtlr 0163; LARGE64-NEXT: blr164entry:165 store i64 %Val, ptr @TIUninit, align 8166 ret void167}168 169; Function Attrs: nofree norecurse nounwind willreturn writeonly170define void @storesTIInit(i64 %Val) #0 {171; SMALL32-LABEL: storesTIInit:172; SMALL32: # %bb.0: # %entry173; SMALL32-NEXT: mflr 0174; SMALL32-NEXT: stwu 1, -32(1)175; SMALL32-NEXT: mr 7, 3176; SMALL32-NEXT: lwz 3, L..C2(2) # target-flags(ppc-tlsldm) @"_$TLSML"177; SMALL32-NEXT: stw 0, 40(1)178; SMALL32-NEXT: mr 6, 4179; SMALL32-NEXT: bla .__tls_get_mod[PR]180; SMALL32-NEXT: lwz 4, L..C4(2) # target-flags(ppc-tlsld) @TIInit181; SMALL32-NEXT: stwux 7, 3, 4182; SMALL32-NEXT: stw 6, 4(3)183; SMALL32-NEXT: addi 1, 1, 32184; SMALL32-NEXT: lwz 0, 8(1)185; SMALL32-NEXT: mtlr 0186; SMALL32-NEXT: blr187;188; LARGE32-LABEL: storesTIInit:189; LARGE32: # %bb.0: # %entry190; LARGE32-NEXT: mflr 0191; LARGE32-NEXT: stwu 1, -32(1)192; LARGE32-NEXT: stw 0, 40(1)193; LARGE32-NEXT: mr 7, 3194; LARGE32-NEXT: addis 8, L..C4@u(2)195; LARGE32-NEXT: addis 3, L..C3@u(2)196; LARGE32-NEXT: mr 6, 4197; LARGE32-NEXT: lwz 3, L..C3@l(3)198; LARGE32-NEXT: bla .__tls_get_mod[PR]199; LARGE32-NEXT: lwz 4, L..C4@l(8)200; LARGE32-NEXT: stwux 7, 3, 4201; LARGE32-NEXT: stw 6, 4(3)202; LARGE32-NEXT: addi 1, 1, 32203; LARGE32-NEXT: lwz 0, 8(1)204; LARGE32-NEXT: mtlr 0205; LARGE32-NEXT: blr206;207; SMALL64-LABEL: storesTIInit:208; SMALL64: # %bb.0: # %entry209; SMALL64-NEXT: mflr 0210; SMALL64-NEXT: stdu 1, -48(1)211; SMALL64-NEXT: mr 6, 3212; SMALL64-NEXT: ld 3, L..C2(2) # target-flags(ppc-tlsldm) @"_$TLSML"213; SMALL64-NEXT: std 0, 64(1)214; SMALL64-NEXT: bla .__tls_get_mod[PR]215; SMALL64-NEXT: ld 4, L..C4(2) # target-flags(ppc-tlsld) @TIInit216; SMALL64-NEXT: stdx 6, 3, 4217; SMALL64-NEXT: addi 1, 1, 48218; SMALL64-NEXT: ld 0, 16(1)219; SMALL64-NEXT: mtlr 0220; SMALL64-NEXT: blr221;222; LARGE64-LABEL: storesTIInit:223; LARGE64: # %bb.0: # %entry224; LARGE64-NEXT: mflr 0225; LARGE64-NEXT: stdu 1, -48(1)226; LARGE64-NEXT: mr 6, 3227; LARGE64-NEXT: addis 3, L..C2@u(2)228; LARGE64-NEXT: std 0, 64(1)229; LARGE64-NEXT: addis 7, L..C4@u(2)230; LARGE64-NEXT: ld 3, L..C2@l(3)231; LARGE64-NEXT: bla .__tls_get_mod[PR]232; LARGE64-NEXT: ld 4, L..C4@l(7)233; LARGE64-NEXT: stdx 6, 3, 4234; LARGE64-NEXT: addi 1, 1, 48235; LARGE64-NEXT: ld 0, 16(1)236; LARGE64-NEXT: mtlr 0237; LARGE64-NEXT: blr238entry:239 store i64 %Val, ptr @TIInit, align 8240 ret void241}242 243; Function Attrs: nofree norecurse nounwind willreturn writeonly244define void @storesTWInit(i64 %Val) #0 {245; SMALL32-LABEL: storesTWInit:246; SMALL32: # %bb.0: # %entry247; SMALL32-NEXT: mflr 0248; SMALL32-NEXT: stwu 1, -32(1)249; SMALL32-NEXT: mr 6, 4250; SMALL32-NEXT: mr 7, 3251; SMALL32-NEXT: lwz 3, L..C5(2) # target-flags(ppc-tlsgdm) @TWInit252; SMALL32-NEXT: lwz 4, L..C6(2) # target-flags(ppc-tlsgd) @TWInit253; SMALL32-NEXT: stw 0, 40(1)254; SMALL32-NEXT: bla .__tls_get_addr[PR]255; SMALL32-NEXT: stw 6, 4(3)256; SMALL32-NEXT: stw 7, 0(3)257; SMALL32-NEXT: addi 1, 1, 32258; SMALL32-NEXT: lwz 0, 8(1)259; SMALL32-NEXT: mtlr 0260; SMALL32-NEXT: blr261;262; LARGE32-LABEL: storesTWInit:263; LARGE32: # %bb.0: # %entry264; LARGE32-NEXT: mflr 0265; LARGE32-NEXT: stwu 1, -32(1)266; LARGE32-NEXT: stw 0, 40(1)267; LARGE32-NEXT: mr 6, 4268; LARGE32-NEXT: mr 7, 3269; LARGE32-NEXT: addis 3, L..C5@u(2)270; LARGE32-NEXT: addis 4, L..C6@u(2)271; LARGE32-NEXT: lwz 3, L..C5@l(3)272; LARGE32-NEXT: lwz 4, L..C6@l(4)273; LARGE32-NEXT: bla .__tls_get_addr[PR]274; LARGE32-NEXT: stw 6, 4(3)275; LARGE32-NEXT: stw 7, 0(3)276; LARGE32-NEXT: addi 1, 1, 32277; LARGE32-NEXT: lwz 0, 8(1)278; LARGE32-NEXT: mtlr 0279; LARGE32-NEXT: blr280;281; SMALL64-LABEL: storesTWInit:282; SMALL64: # %bb.0: # %entry283; SMALL64-NEXT: mflr 0284; SMALL64-NEXT: stdu 1, -48(1)285; SMALL64-NEXT: mr 6, 3286; SMALL64-NEXT: ld 3, L..C5(2) # target-flags(ppc-tlsgdm) @TWInit287; SMALL64-NEXT: ld 4, L..C6(2) # target-flags(ppc-tlsgd) @TWInit288; SMALL64-NEXT: std 0, 64(1)289; SMALL64-NEXT: bla .__tls_get_addr[PR]290; SMALL64-NEXT: std 6, 0(3)291; SMALL64-NEXT: addi 1, 1, 48292; SMALL64-NEXT: ld 0, 16(1)293; SMALL64-NEXT: mtlr 0294; SMALL64-NEXT: blr295;296; LARGE64-LABEL: storesTWInit:297; LARGE64: # %bb.0: # %entry298; LARGE64-NEXT: mflr 0299; LARGE64-NEXT: stdu 1, -48(1)300; LARGE64-NEXT: mr 6, 3301; LARGE64-NEXT: addis 3, L..C5@u(2)302; LARGE64-NEXT: addis 4, L..C6@u(2)303; LARGE64-NEXT: std 0, 64(1)304; LARGE64-NEXT: ld 3, L..C5@l(3)305; LARGE64-NEXT: ld 4, L..C6@l(4)306; LARGE64-NEXT: bla .__tls_get_addr[PR]307; LARGE64-NEXT: std 6, 0(3)308; LARGE64-NEXT: addi 1, 1, 48309; LARGE64-NEXT: ld 0, 16(1)310; LARGE64-NEXT: mtlr 0311; LARGE64-NEXT: blr312entry:313 store i64 %Val, ptr @TWInit, align 8314 ret void315}316 317; Function Attrs: norecurse nounwind readonly willreturn318define i64 @loadsTGInit() #1 {319; SMALL32-LABEL: loadsTGInit:320; SMALL32: # %bb.0: # %entry321; SMALL32-NEXT: mflr 0322; SMALL32-NEXT: stwu 1, -32(1)323; SMALL32-NEXT: lwz 3, L..C0(2) # target-flags(ppc-tlsgdm) @TGInit324; SMALL32-NEXT: lwz 4, L..C1(2) # target-flags(ppc-tlsgd) @TGInit325; SMALL32-NEXT: stw 0, 40(1)326; SMALL32-NEXT: bla .__tls_get_addr[PR]327; SMALL32-NEXT: lwz 4, L..C7(2) # @GInit328; SMALL32-NEXT: lwz 5, 0(3)329; SMALL32-NEXT: lwz 3, 4(3)330; SMALL32-NEXT: lwz 6, 4(4)331; SMALL32-NEXT: lwz 7, 0(4)332; SMALL32-NEXT: addc 4, 6, 3333; SMALL32-NEXT: adde 3, 7, 5334; SMALL32-NEXT: addi 1, 1, 32335; SMALL32-NEXT: lwz 0, 8(1)336; SMALL32-NEXT: mtlr 0337; SMALL32-NEXT: blr338;339; LARGE32-LABEL: loadsTGInit:340; LARGE32: # %bb.0: # %entry341; LARGE32-NEXT: mflr 0342; LARGE32-NEXT: stwu 1, -32(1)343; LARGE32-NEXT: stw 0, 40(1)344; LARGE32-NEXT: addis 3, L..C0@u(2)345; LARGE32-NEXT: addis 4, L..C1@u(2)346; LARGE32-NEXT: lwz 3, L..C0@l(3)347; LARGE32-NEXT: lwz 4, L..C1@l(4)348; LARGE32-NEXT: bla .__tls_get_addr[PR]349; LARGE32-NEXT: lwz 5, 0(3)350; LARGE32-NEXT: lwz 3, 4(3)351; LARGE32-NEXT: addis 4, L..C7@u(2)352; LARGE32-NEXT: lwz 4, L..C7@l(4)353; LARGE32-NEXT: lwz 6, 4(4)354; LARGE32-NEXT: lwz 7, 0(4)355; LARGE32-NEXT: addc 4, 6, 3356; LARGE32-NEXT: adde 3, 7, 5357; LARGE32-NEXT: addi 1, 1, 32358; LARGE32-NEXT: lwz 0, 8(1)359; LARGE32-NEXT: mtlr 0360; LARGE32-NEXT: blr361;362; SMALL64-LABEL: loadsTGInit:363; SMALL64: # %bb.0: # %entry364; SMALL64-NEXT: mflr 0365; SMALL64-NEXT: stdu 1, -48(1)366; SMALL64-NEXT: ld 3, L..C0(2) # target-flags(ppc-tlsgdm) @TGInit367; SMALL64-NEXT: ld 4, L..C1(2) # target-flags(ppc-tlsgd) @TGInit368; SMALL64-NEXT: std 0, 64(1)369; SMALL64-NEXT: bla .__tls_get_addr[PR]370; SMALL64-NEXT: ld 4, L..C7(2) # @GInit371; SMALL64-NEXT: ld 3, 0(3)372; SMALL64-NEXT: ld 4, 0(4)373; SMALL64-NEXT: add 3, 4, 3374; SMALL64-NEXT: addi 1, 1, 48375; SMALL64-NEXT: ld 0, 16(1)376; SMALL64-NEXT: mtlr 0377; SMALL64-NEXT: blr378;379; LARGE64-LABEL: loadsTGInit:380; LARGE64: # %bb.0: # %entry381; LARGE64-NEXT: mflr 0382; LARGE64-NEXT: stdu 1, -48(1)383; LARGE64-NEXT: addis 3, L..C0@u(2)384; LARGE64-NEXT: addis 4, L..C1@u(2)385; LARGE64-NEXT: std 0, 64(1)386; LARGE64-NEXT: ld 3, L..C0@l(3)387; LARGE64-NEXT: ld 4, L..C1@l(4)388; LARGE64-NEXT: bla .__tls_get_addr[PR]389; LARGE64-NEXT: addis 4, L..C7@u(2)390; LARGE64-NEXT: ld 3, 0(3)391; LARGE64-NEXT: ld 4, L..C7@l(4)392; LARGE64-NEXT: ld 4, 0(4)393; LARGE64-NEXT: add 3, 4, 3394; LARGE64-NEXT: addi 1, 1, 48395; LARGE64-NEXT: ld 0, 16(1)396; LARGE64-NEXT: mtlr 0397; LARGE64-NEXT: blr398entry:399 %0 = load i64, ptr @TGInit, align 8400 %1 = load i64, ptr @GInit, align 8401 %add = add nsw i64 %1, %0402 ret i64 %add403}404 405; Function Attrs: norecurse nounwind readonly willreturn406define i64 @loadsTIUninit() #1 {407; SMALL32-LABEL: loadsTIUninit:408; SMALL32: # %bb.0: # %entry409; SMALL32-NEXT: mflr 0410; SMALL32-NEXT: stwu 1, -32(1)411; SMALL32-NEXT: lwz 3, L..C2(2) # target-flags(ppc-tlsldm) @"_$TLSML"412; SMALL32-NEXT: stw 0, 40(1)413; SMALL32-NEXT: bla .__tls_get_mod[PR]414; SMALL32-NEXT: lwz 4, L..C3(2) # target-flags(ppc-tlsld) @TIUninit415; SMALL32-NEXT: lwz 5, L..C7(2) # @GInit416; SMALL32-NEXT: lwzux 6, 3, 4417; SMALL32-NEXT: lwz 4, 4(5)418; SMALL32-NEXT: lwz 3, 4(3)419; SMALL32-NEXT: lwz 5, 0(5)420; SMALL32-NEXT: addc 4, 4, 3421; SMALL32-NEXT: adde 3, 5, 6422; SMALL32-NEXT: addi 1, 1, 32423; SMALL32-NEXT: lwz 0, 8(1)424; SMALL32-NEXT: mtlr 0425; SMALL32-NEXT: blr426;427; LARGE32-LABEL: loadsTIUninit:428; LARGE32: # %bb.0: # %entry429; LARGE32-NEXT: mflr 0430; LARGE32-NEXT: stwu 1, -32(1)431; LARGE32-NEXT: stw 0, 40(1)432; LARGE32-NEXT: addis 6, L..C2@u(2)433; LARGE32-NEXT: addis 3, L..C3@u(2)434; LARGE32-NEXT: lwz 3, L..C3@l(3)435; LARGE32-NEXT: bla .__tls_get_mod[PR]436; LARGE32-NEXT: lwz 4, L..C2@l(6)437; LARGE32-NEXT: lwzux 5, 3, 4438; LARGE32-NEXT: lwz 3, 4(3)439; LARGE32-NEXT: addis 4, L..C7@u(2)440; LARGE32-NEXT: lwz 4, L..C7@l(4)441; LARGE32-NEXT: lwz 6, 4(4)442; LARGE32-NEXT: lwz 7, 0(4)443; LARGE32-NEXT: addc 4, 6, 3444; LARGE32-NEXT: adde 3, 7, 5445; LARGE32-NEXT: addi 1, 1, 32446; LARGE32-NEXT: lwz 0, 8(1)447; LARGE32-NEXT: mtlr 0448; LARGE32-NEXT: blr449;450; SMALL64-LABEL: loadsTIUninit:451; SMALL64: # %bb.0: # %entry452; SMALL64-NEXT: mflr 0453; SMALL64-NEXT: stdu 1, -48(1)454; SMALL64-NEXT: ld 3, L..C2(2) # target-flags(ppc-tlsldm) @"_$TLSML"455; SMALL64-NEXT: std 0, 64(1)456; SMALL64-NEXT: bla .__tls_get_mod[PR]457; SMALL64-NEXT: ld 4, L..C3(2) # target-flags(ppc-tlsld) @TIUninit458; SMALL64-NEXT: ldx 3, 3, 4459; SMALL64-NEXT: ld 4, L..C7(2) # @GInit460; SMALL64-NEXT: ld 4, 0(4)461; SMALL64-NEXT: add 3, 4, 3462; SMALL64-NEXT: addi 1, 1, 48463; SMALL64-NEXT: ld 0, 16(1)464; SMALL64-NEXT: mtlr 0465; SMALL64-NEXT: blr466;467; LARGE64-LABEL: loadsTIUninit:468; LARGE64: # %bb.0: # %entry469; LARGE64-NEXT: mflr 0470; LARGE64-NEXT: stdu 1, -48(1)471; LARGE64-NEXT: addis 3, L..C2@u(2)472; LARGE64-NEXT: std 0, 64(1)473; LARGE64-NEXT: addis 6, L..C3@u(2)474; LARGE64-NEXT: ld 3, L..C2@l(3)475; LARGE64-NEXT: bla .__tls_get_mod[PR]476; LARGE64-NEXT: ld 4, L..C3@l(6)477; LARGE64-NEXT: addis 5, L..C7@u(2)478; LARGE64-NEXT: ldx 3, 3, 4479; LARGE64-NEXT: ld 4, L..C7@l(5)480; LARGE64-NEXT: ld 4, 0(4)481; LARGE64-NEXT: add 3, 4, 3482; LARGE64-NEXT: addi 1, 1, 48483; LARGE64-NEXT: ld 0, 16(1)484; LARGE64-NEXT: mtlr 0485; LARGE64-NEXT: blr486entry:487 %0 = load i64, ptr @TIUninit, align 8488 %1 = load i64, ptr @GInit, align 8489 %add = add nsw i64 %1, %0490 ret i64 %add491}492 493; Function Attrs: norecurse nounwind readonly willreturn494define i64 @loadsTIInit() #1 {495; SMALL32-LABEL: loadsTIInit:496; SMALL32: # %bb.0: # %entry497; SMALL32-NEXT: mflr 0498; SMALL32-NEXT: stwu 1, -32(1)499; SMALL32-NEXT: lwz 3, L..C2(2) # target-flags(ppc-tlsldm) @"_$TLSML"500; SMALL32-NEXT: stw 0, 40(1)501; SMALL32-NEXT: bla .__tls_get_mod[PR]502; SMALL32-NEXT: lwz 4, L..C4(2) # target-flags(ppc-tlsld) @TIInit503; SMALL32-NEXT: lwz 5, L..C7(2) # @GInit504; SMALL32-NEXT: lwzux 6, 3, 4505; SMALL32-NEXT: lwz 4, 4(5)506; SMALL32-NEXT: lwz 3, 4(3)507; SMALL32-NEXT: lwz 5, 0(5)508; SMALL32-NEXT: addc 4, 4, 3509; SMALL32-NEXT: adde 3, 5, 6510; SMALL32-NEXT: addi 1, 1, 32511; SMALL32-NEXT: lwz 0, 8(1)512; SMALL32-NEXT: mtlr 0513; SMALL32-NEXT: blr514;515; LARGE32-LABEL: loadsTIInit:516; LARGE32: # %bb.0: # %entry517; LARGE32-NEXT: mflr 0518; LARGE32-NEXT: stwu 1, -32(1)519; LARGE32-NEXT: stw 0, 40(1)520; LARGE32-NEXT: addis 6, L..C4@u(2)521; LARGE32-NEXT: addis 3, L..C3@u(2)522; LARGE32-NEXT: lwz 3, L..C3@l(3)523; LARGE32-NEXT: bla .__tls_get_mod[PR]524; LARGE32-NEXT: lwz 4, L..C4@l(6)525; LARGE32-NEXT: lwzux 5, 3, 4526; LARGE32-NEXT: lwz 3, 4(3)527; LARGE32-NEXT: addis 4, L..C7@u(2)528; LARGE32-NEXT: lwz 4, L..C7@l(4)529; LARGE32-NEXT: lwz 6, 4(4)530; LARGE32-NEXT: lwz 7, 0(4)531; LARGE32-NEXT: addc 4, 6, 3532; LARGE32-NEXT: adde 3, 7, 5533; LARGE32-NEXT: addi 1, 1, 32534; LARGE32-NEXT: lwz 0, 8(1)535; LARGE32-NEXT: mtlr 0536; LARGE32-NEXT: blr537;538; SMALL64-LABEL: loadsTIInit:539; SMALL64: # %bb.0: # %entry540; SMALL64-NEXT: mflr 0541; SMALL64-NEXT: stdu 1, -48(1)542; SMALL64-NEXT: ld 3, L..C2(2) # target-flags(ppc-tlsldm) @"_$TLSML"543; SMALL64-NEXT: std 0, 64(1)544; SMALL64-NEXT: bla .__tls_get_mod[PR]545; SMALL64-NEXT: ld 4, L..C4(2) # target-flags(ppc-tlsld) @TIInit546; SMALL64-NEXT: ldx 3, 3, 4547; SMALL64-NEXT: ld 4, L..C7(2) # @GInit548; SMALL64-NEXT: ld 4, 0(4)549; SMALL64-NEXT: add 3, 4, 3550; SMALL64-NEXT: addi 1, 1, 48551; SMALL64-NEXT: ld 0, 16(1)552; SMALL64-NEXT: mtlr 0553; SMALL64-NEXT: blr554;555; LARGE64-LABEL: loadsTIInit:556; LARGE64: # %bb.0: # %entry557; LARGE64-NEXT: mflr 0558; LARGE64-NEXT: stdu 1, -48(1)559; LARGE64-NEXT: addis 3, L..C2@u(2)560; LARGE64-NEXT: std 0, 64(1)561; LARGE64-NEXT: addis 6, L..C4@u(2)562; LARGE64-NEXT: ld 3, L..C2@l(3)563; LARGE64-NEXT: bla .__tls_get_mod[PR]564; LARGE64-NEXT: ld 4, L..C4@l(6)565; LARGE64-NEXT: addis 5, L..C7@u(2)566; LARGE64-NEXT: ldx 3, 3, 4567; LARGE64-NEXT: ld 4, L..C7@l(5)568; LARGE64-NEXT: ld 4, 0(4)569; LARGE64-NEXT: add 3, 4, 3570; LARGE64-NEXT: addi 1, 1, 48571; LARGE64-NEXT: ld 0, 16(1)572; LARGE64-NEXT: mtlr 0573; LARGE64-NEXT: blr574entry:575 %0 = load i64, ptr @TIInit, align 8576 %1 = load i64, ptr @GInit, align 8577 %add = add nsw i64 %1, %0578 ret i64 %add579}580 581; Function Attrs: norecurse nounwind readonly willreturn582define i64 @loadsTWInit() #1 {583; SMALL32-LABEL: loadsTWInit:584; SMALL32: # %bb.0: # %entry585; SMALL32-NEXT: mflr 0586; SMALL32-NEXT: stwu 1, -32(1)587; SMALL32-NEXT: lwz 3, L..C5(2) # target-flags(ppc-tlsgdm) @TWInit588; SMALL32-NEXT: lwz 4, L..C6(2) # target-flags(ppc-tlsgd) @TWInit589; SMALL32-NEXT: stw 0, 40(1)590; SMALL32-NEXT: bla .__tls_get_addr[PR]591; SMALL32-NEXT: lwz 4, L..C7(2) # @GInit592; SMALL32-NEXT: lwz 5, 0(3)593; SMALL32-NEXT: lwz 3, 4(3)594; SMALL32-NEXT: lwz 6, 4(4)595; SMALL32-NEXT: lwz 7, 0(4)596; SMALL32-NEXT: addc 4, 6, 3597; SMALL32-NEXT: adde 3, 7, 5598; SMALL32-NEXT: addi 1, 1, 32599; SMALL32-NEXT: lwz 0, 8(1)600; SMALL32-NEXT: mtlr 0601; SMALL32-NEXT: blr602;603; LARGE32-LABEL: loadsTWInit:604; LARGE32: # %bb.0: # %entry605; LARGE32-NEXT: mflr 0606; LARGE32-NEXT: stwu 1, -32(1)607; LARGE32-NEXT: stw 0, 40(1)608; LARGE32-NEXT: addis 3, L..C5@u(2)609; LARGE32-NEXT: addis 4, L..C6@u(2)610; LARGE32-NEXT: lwz 3, L..C5@l(3)611; LARGE32-NEXT: lwz 4, L..C6@l(4)612; LARGE32-NEXT: bla .__tls_get_addr[PR]613; LARGE32-NEXT: lwz 5, 0(3)614; LARGE32-NEXT: lwz 3, 4(3)615; LARGE32-NEXT: addis 4, L..C7@u(2)616; LARGE32-NEXT: lwz 4, L..C7@l(4)617; LARGE32-NEXT: lwz 6, 4(4)618; LARGE32-NEXT: lwz 7, 0(4)619; LARGE32-NEXT: addc 4, 6, 3620; LARGE32-NEXT: adde 3, 7, 5621; LARGE32-NEXT: addi 1, 1, 32622; LARGE32-NEXT: lwz 0, 8(1)623; LARGE32-NEXT: mtlr 0624; LARGE32-NEXT: blr625;626; SMALL64-LABEL: loadsTWInit:627; SMALL64: # %bb.0: # %entry628; SMALL64-NEXT: mflr 0629; SMALL64-NEXT: stdu 1, -48(1)630; SMALL64-NEXT: ld 3, L..C5(2) # target-flags(ppc-tlsgdm) @TWInit631; SMALL64-NEXT: ld 4, L..C6(2) # target-flags(ppc-tlsgd) @TWInit632; SMALL64-NEXT: std 0, 64(1)633; SMALL64-NEXT: bla .__tls_get_addr[PR]634; SMALL64-NEXT: ld 4, L..C7(2) # @GInit635; SMALL64-NEXT: ld 3, 0(3)636; SMALL64-NEXT: ld 4, 0(4)637; SMALL64-NEXT: add 3, 4, 3638; SMALL64-NEXT: addi 1, 1, 48639; SMALL64-NEXT: ld 0, 16(1)640; SMALL64-NEXT: mtlr 0641; SMALL64-NEXT: blr642;643; LARGE64-LABEL: loadsTWInit:644; LARGE64: # %bb.0: # %entry645; LARGE64-NEXT: mflr 0646; LARGE64-NEXT: stdu 1, -48(1)647; LARGE64-NEXT: addis 3, L..C5@u(2)648; LARGE64-NEXT: addis 4, L..C6@u(2)649; LARGE64-NEXT: std 0, 64(1)650; LARGE64-NEXT: ld 3, L..C5@l(3)651; LARGE64-NEXT: ld 4, L..C6@l(4)652; LARGE64-NEXT: bla .__tls_get_addr[PR]653; LARGE64-NEXT: addis 4, L..C7@u(2)654; LARGE64-NEXT: ld 3, 0(3)655; LARGE64-NEXT: ld 4, L..C7@l(4)656; LARGE64-NEXT: ld 4, 0(4)657; LARGE64-NEXT: add 3, 4, 3658; LARGE64-NEXT: addi 1, 1, 48659; LARGE64-NEXT: ld 0, 16(1)660; LARGE64-NEXT: mtlr 0661; LARGE64-NEXT: blr662entry:663 %0 = load i64, ptr @TWInit, align 8664 %1 = load i64, ptr @GInit, align 8665 %add = add nsw i64 %1, %0666 ret i64 %add667}668 669; External symbol reference checks for .__tls_get_addr/.__tls_get_mod670 671; SMALL32: .extern .__tls_get_addr[PR]672; SMALL32: .extern .__tls_get_mod[PR]673; SMALL64: .extern .__tls_get_addr[PR]674; SMALL64: .extern .__tls_get_mod[PR]675; LARGE32: .extern .__tls_get_addr[PR]676; LARGE32: .extern .__tls_get_mod[PR]677; LARGE64: .extern .__tls_get_addr[PR]678; LARGE64: .extern .__tls_get_mod[PR]679 680; TOC entry checks681 682; SMALL32-LABEL: .toc683; SMALL32-LABEL: L..C0:684; SMALL32-NEXT: .tc .TGInit[TC],TGInit[TL]@m685; SMALL32-LABEL: L..C1:686; SMALL32-NEXT: .tc TGInit[TC],TGInit[TL]@gd687; SMALL32-LABEL: L..C2:688; SMALL32-NEXT: .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml689; SMALL32-NEXT: .rename _Renamed..5f24__TLSML[TC],"_$TLSML"690; SMALL32-LABEL: L..C3:691; SMALL32-NEXT: .tc TIUninit[TC],TIUninit[UL]@ld692; SMALL32-LABEL: L..C4:693; SMALL32-NEXT: .tc TIInit[TC],TIInit[TL]@ld694; SMALL32-LABEL: L..C5:695; SMALL32-NEXT: .tc .TWInit[TC],TWInit[TL]@m696; SMALL32-LABEL: L..C6:697; SMALL32-NEXT: .tc TWInit[TC],TWInit[TL]@gd698; SMALL32-LABEL: L..C7:699; SMALL32-NEXT: .tc GInit[TC],GInit[RW]700 701; LARGE32-LABEL: .toc702; LARGE32-LABEL: L..C0:703; LARGE32-NEXT: .tc .TGInit[TE],TGInit[TL]@m704; LARGE32-LABEL: L..C1:705; LARGE32-NEXT: .tc TGInit[TE],TGInit[TL]@gd706; LARGE32-LABEL: L..C2:707; LARGE32-NEXT: .tc TIUninit[TE],TIUninit[UL]@ld708; LARGE32-LABEL: L..C3:709; LARGE32-NEXT: .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml710; LARGE32-NEXT: .rename _Renamed..5f24__TLSML[TC],"_$TLSML"711; LARGE32-LABEL: L..C4:712; LARGE32-NEXT: .tc TIInit[TE],TIInit[TL]@ld713; LARGE32-LABEL: L..C5:714; LARGE32-NEXT: .tc .TWInit[TE],TWInit[TL]@m715; LARGE32-LABEL: L..C6:716; LARGE32-NEXT: .tc TWInit[TE],TWInit[TL]@gd717; LARGE32-LABEL: L..C7:718; LARGE32-NEXT: .tc GInit[TE],GInit[RW]719 720; SMALL64-LABEL: .toc721; SMALL64-LABEL: L..C0:722; SMALL64-NEXT: .tc .TGInit[TC],TGInit[TL]@m723; SMALL64-LABEL: L..C1:724; SMALL64-NEXT: .tc TGInit[TC],TGInit[TL]@gd725; SMALL64-LABEL: L..C2:726; SMALL64-NEXT: .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml727; SMALL64-NEXT: .rename _Renamed..5f24__TLSML[TC],"_$TLSML"728; SMALL64-LABEL: L..C3:729; SMALL64-NEXT: .tc TIUninit[TC],TIUninit[UL]@ld730; SMALL64-LABEL: L..C4:731; SMALL64-NEXT: .tc TIInit[TC],TIInit[TL]@ld732; SMALL64-LABEL: L..C5:733; SMALL64-NEXT: .tc .TWInit[TC],TWInit[TL]@m734; SMALL64-LABEL: L..C6:735; SMALL64-NEXT: .tc TWInit[TC],TWInit[TL]@gd736; SMALL64-LABEL: L..C7:737; SMALL64-NEXT: .tc GInit[TC],GInit[RW]738 739; LARGE64-LABEL: .toc740; LARGE64-LABEL: L..C0:741; LARGE64-NEXT: .tc .TGInit[TE],TGInit[TL]@m742; LARGE64-LABEL: L..C1:743; LARGE64-NEXT: .tc TGInit[TE],TGInit[TL]@gd744; LARGE64-LABEL: L..C2:745; LARGE64-NEXT: .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml746; LARGE64-NEXT: .rename _Renamed..5f24__TLSML[TC],"_$TLSML"747; LARGE64-LABEL: L..C3:748; LARGE64-NEXT: .tc TIUninit[TE],TIUninit[UL]@ld749; LARGE64-LABEL: L..C4:750; LARGE64-NEXT: .tc TIInit[TE],TIInit[TL]@ld751; LARGE64-LABEL: L..C5:752; LARGE64-NEXT: .tc .TWInit[TE],TWInit[TL]@m753; LARGE64-LABEL: L..C6:754; LARGE64-NEXT: .tc TWInit[TE],TWInit[TL]@gd755; LARGE64-LABEL: L..C7:756; LARGE64-NEXT: .tc GInit[TE],GInit[RW]757 758attributes #0 = { nofree norecurse nounwind willreturn writeonly "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="pwr4" "target-features"="-altivec,-bpermd,-crypto,-direct-move,-extdiv,-float128,-htm,-mma,-paired-vector-memops,-power10-vector,-power8-vector,-power9-vector,-spe,-vsx" }759attributes #1 = { norecurse nounwind readonly willreturn "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="pwr4" "target-features"="-altivec,-bpermd,-crypto,-direct-move,-extdiv,-float128,-htm,-mma,-paired-vector-memops,-power10-vector,-power8-vector,-power9-vector,-spe,-vsx" }760