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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 22; RUN: llc -verify-machineinstrs -mcpu=pwr7 -ppc-asm-full-reg-names \3; RUN: -mtriple powerpc64-ibm-aix-xcoff -code-model=large < %s | \4; RUN: FileCheck %s -check-prefix=LARGE645; RUN: llc -verify-machineinstrs -mcpu=pwr7 -ppc-asm-full-reg-names \6; RUN: -mtriple powerpc64-ibm-aix-xcoff -code-model=small < %s | \7; RUN: FileCheck %s -check-prefix=SMALL648; RUN: llc -verify-machineinstrs -mcpu=pwr7 -ppc-asm-full-reg-names \9; RUN: -mtriple powerpc-ibm-aix-xcoff -code-model=large < %s | \10; RUN: FileCheck %s -check-prefix=LARGE3211; RUN: llc -verify-machineinstrs -mcpu=pwr7 -ppc-asm-full-reg-names \12; RUN: -mtriple powerpc-ibm-aix-xcoff -code-model=small < %s | \13; RUN: FileCheck %s -check-prefix=SMALL3214 15@global_int_zero = thread_local(initialexec) global i32 0, align 416@global_int_nonzero = thread_local(initialexec) global i32 1, align 417@intern_int_zero = internal thread_local(initialexec) global i32 0, align 418@intern_int_nonzero = internal thread_local(initialexec) global i32 1, align 419 20@global_long_zero = thread_local(initialexec) global i64 0, align 821@global_long_nonzero = thread_local(initialexec) global i64 1, align 822@intern_long_zero = internal thread_local(initialexec) global i64 0, align 823@intern_long_nonzero = internal thread_local(initialexec) global i64 1, align 824 25@global_float_zero = thread_local(initialexec) global float 0.000000, align 426@global_float_nonzero = thread_local(initialexec) global float 1.000000, align 427@intern_float_zero = internal thread_local(initialexec) global float 0.000000, align 428@intern_float_nonzero = internal thread_local(initialexec) global float 1.000000, align 429 30@global_double_zero = thread_local(initialexec) global double 0.000000, align 831@global_double_nonzero = thread_local(initialexec) global double 1.000000, align 832@intern_double_zero = internal thread_local(initialexec) global double 0.000000, align 833@intern_double_nonzero = internal thread_local(initialexec) global double 1.000000, align 834 35define void @store_global_int_zero(i32 noundef signext %i) {36; LARGE64-LABEL: store_global_int_zero:37; LARGE64: # %bb.0: # %entry38; LARGE64-NEXT: addis r4, L..C0@u(r2)39; LARGE64-NEXT: ld r4, L..C0@l(r4)40; LARGE64-NEXT: stwx r3, r13, r441; LARGE64-NEXT: blr42;43; SMALL64-LABEL: store_global_int_zero:44; SMALL64: # %bb.0: # %entry45; SMALL64-NEXT: ld r4, L..C0(r2) # target-flags(ppc-tprel) @global_int_zero46; SMALL64-NEXT: stwx r3, r13, r447; SMALL64-NEXT: blr48;49; LARGE32-LABEL: store_global_int_zero:50; LARGE32: # %bb.0: # %entry51; LARGE32-NEXT: mflr r052; LARGE32-NEXT: stwu r1, -32(r1)53; LARGE32-NEXT: stw r0, 40(r1)54; LARGE32-NEXT: mr r4, r355; LARGE32-NEXT: addis r3, L..C0@u(r2)56; LARGE32-NEXT: lwz r5, L..C0@l(r3)57; LARGE32-NEXT: bla .__get_tpointer[PR]58; LARGE32-NEXT: stwx r4, r3, r559; LARGE32-NEXT: addi r1, r1, 3260; LARGE32-NEXT: lwz r0, 8(r1)61; LARGE32-NEXT: mtlr r062; LARGE32-NEXT: blr63;64; SMALL32-LABEL: store_global_int_zero:65; SMALL32: # %bb.0: # %entry66; SMALL32-NEXT: mflr r067; SMALL32-NEXT: stwu r1, -32(r1)68; SMALL32-NEXT: lwz r5, L..C0(r2) # target-flags(ppc-tprel) @global_int_zero69; SMALL32-NEXT: mr r4, r370; SMALL32-NEXT: bla .__get_tpointer[PR]71; SMALL32-NEXT: stw r0, 40(r1)72; SMALL32-NEXT: stwx r4, r3, r573; SMALL32-NEXT: addi r1, r1, 3274; SMALL32-NEXT: lwz r0, 8(r1)75; SMALL32-NEXT: mtlr r076; SMALL32-NEXT: blr77entry:78 %addr = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @global_int_zero)79 store i32 %i, ptr %addr, align 480 ret void81}82 83define void @store_global_int_nonzero(i32 noundef signext %i) {84; LARGE64-LABEL: store_global_int_nonzero:85; LARGE64: # %bb.0: # %entry86; LARGE64-NEXT: addis r4, L..C1@u(r2)87; LARGE64-NEXT: ld r4, L..C1@l(r4)88; LARGE64-NEXT: stwx r3, r13, r489; LARGE64-NEXT: blr90;91; SMALL64-LABEL: store_global_int_nonzero:92; SMALL64: # %bb.0: # %entry93; SMALL64-NEXT: ld r4, L..C1(r2) # target-flags(ppc-tprel) @global_int_nonzero94; SMALL64-NEXT: stwx r3, r13, r495; SMALL64-NEXT: blr96;97; LARGE32-LABEL: store_global_int_nonzero:98; LARGE32: # %bb.0: # %entry99; LARGE32-NEXT: mflr r0100; LARGE32-NEXT: stwu r1, -32(r1)101; LARGE32-NEXT: stw r0, 40(r1)102; LARGE32-NEXT: mr r4, r3103; LARGE32-NEXT: addis r3, L..C1@u(r2)104; LARGE32-NEXT: lwz r5, L..C1@l(r3)105; LARGE32-NEXT: bla .__get_tpointer[PR]106; LARGE32-NEXT: stwx r4, r3, r5107; LARGE32-NEXT: addi r1, r1, 32108; LARGE32-NEXT: lwz r0, 8(r1)109; LARGE32-NEXT: mtlr r0110; LARGE32-NEXT: blr111;112; SMALL32-LABEL: store_global_int_nonzero:113; SMALL32: # %bb.0: # %entry114; SMALL32-NEXT: mflr r0115; SMALL32-NEXT: stwu r1, -32(r1)116; SMALL32-NEXT: lwz r5, L..C1(r2) # target-flags(ppc-tprel) @global_int_nonzero117; SMALL32-NEXT: mr r4, r3118; SMALL32-NEXT: bla .__get_tpointer[PR]119; SMALL32-NEXT: stw r0, 40(r1)120; SMALL32-NEXT: stwx r4, r3, r5121; SMALL32-NEXT: addi r1, r1, 32122; SMALL32-NEXT: lwz r0, 8(r1)123; SMALL32-NEXT: mtlr r0124; SMALL32-NEXT: blr125entry:126 %addr = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @global_int_nonzero)127 store i32 %i, ptr %addr, align 4128 ret void129}130 131define void @store_intern_int_zero(i32 noundef signext %i) {132; LARGE64-LABEL: store_intern_int_zero:133; LARGE64: # %bb.0: # %entry134; LARGE64-NEXT: addis r4, L..C2@u(r2)135; LARGE64-NEXT: ld r4, L..C2@l(r4)136; LARGE64-NEXT: stwx r3, r13, r4137; LARGE64-NEXT: blr138;139; SMALL64-LABEL: store_intern_int_zero:140; SMALL64: # %bb.0: # %entry141; SMALL64-NEXT: ld r4, L..C2(r2) # target-flags(ppc-tprel) @intern_int_zero142; SMALL64-NEXT: stwx r3, r13, r4143; SMALL64-NEXT: blr144;145; LARGE32-LABEL: store_intern_int_zero:146; LARGE32: # %bb.0: # %entry147; LARGE32-NEXT: mflr r0148; LARGE32-NEXT: stwu r1, -32(r1)149; LARGE32-NEXT: stw r0, 40(r1)150; LARGE32-NEXT: mr r4, r3151; LARGE32-NEXT: addis r3, L..C2@u(r2)152; LARGE32-NEXT: lwz r5, L..C2@l(r3)153; LARGE32-NEXT: bla .__get_tpointer[PR]154; LARGE32-NEXT: stwx r4, r3, r5155; LARGE32-NEXT: addi r1, r1, 32156; LARGE32-NEXT: lwz r0, 8(r1)157; LARGE32-NEXT: mtlr r0158; LARGE32-NEXT: blr159;160; SMALL32-LABEL: store_intern_int_zero:161; SMALL32: # %bb.0: # %entry162; SMALL32-NEXT: mflr r0163; SMALL32-NEXT: stwu r1, -32(r1)164; SMALL32-NEXT: lwz r5, L..C2(r2) # target-flags(ppc-tprel) @intern_int_zero165; SMALL32-NEXT: mr r4, r3166; SMALL32-NEXT: bla .__get_tpointer[PR]167; SMALL32-NEXT: stw r0, 40(r1)168; SMALL32-NEXT: stwx r4, r3, r5169; SMALL32-NEXT: addi r1, r1, 32170; SMALL32-NEXT: lwz r0, 8(r1)171; SMALL32-NEXT: mtlr r0172; SMALL32-NEXT: blr173entry:174 %addr = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @intern_int_zero)175 store i32 %i, ptr %addr, align 4176 ret void177}178 179define void @store_intern_int_nonzero(i32 noundef signext %i) {180; LARGE64-LABEL: store_intern_int_nonzero:181; LARGE64: # %bb.0: # %entry182; LARGE64-NEXT: addis r4, L..C3@u(r2)183; LARGE64-NEXT: ld r4, L..C3@l(r4)184; LARGE64-NEXT: stwx r3, r13, r4185; LARGE64-NEXT: blr186;187; SMALL64-LABEL: store_intern_int_nonzero:188; SMALL64: # %bb.0: # %entry189; SMALL64-NEXT: ld r4, L..C3(r2) # target-flags(ppc-tprel) @intern_int_nonzero190; SMALL64-NEXT: stwx r3, r13, r4191; SMALL64-NEXT: blr192;193; LARGE32-LABEL: store_intern_int_nonzero:194; LARGE32: # %bb.0: # %entry195; LARGE32-NEXT: mflr r0196; LARGE32-NEXT: stwu r1, -32(r1)197; LARGE32-NEXT: stw r0, 40(r1)198; LARGE32-NEXT: mr r4, r3199; LARGE32-NEXT: addis r3, L..C3@u(r2)200; LARGE32-NEXT: lwz r5, L..C3@l(r3)201; LARGE32-NEXT: bla .__get_tpointer[PR]202; LARGE32-NEXT: stwx r4, r3, r5203; LARGE32-NEXT: addi r1, r1, 32204; LARGE32-NEXT: lwz r0, 8(r1)205; LARGE32-NEXT: mtlr r0206; LARGE32-NEXT: blr207;208; SMALL32-LABEL: store_intern_int_nonzero:209; SMALL32: # %bb.0: # %entry210; SMALL32-NEXT: mflr r0211; SMALL32-NEXT: stwu r1, -32(r1)212; SMALL32-NEXT: lwz r5, L..C3(r2) # target-flags(ppc-tprel) @intern_int_nonzero213; SMALL32-NEXT: mr r4, r3214; SMALL32-NEXT: bla .__get_tpointer[PR]215; SMALL32-NEXT: stw r0, 40(r1)216; SMALL32-NEXT: stwx r4, r3, r5217; SMALL32-NEXT: addi r1, r1, 32218; SMALL32-NEXT: lwz r0, 8(r1)219; SMALL32-NEXT: mtlr r0220; SMALL32-NEXT: blr221entry:222 %addr = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @intern_int_nonzero)223 store i32 %i, ptr %addr, align 4224 ret void225}226 227define signext i32 @load_global_int_zero() {228; LARGE64-LABEL: load_global_int_zero:229; LARGE64: # %bb.0: # %entry230; LARGE64-NEXT: addis r3, L..C0@u(r2)231; LARGE64-NEXT: ld r3, L..C0@l(r3)232; LARGE64-NEXT: lwax r3, r13, r3233; LARGE64-NEXT: blr234;235; SMALL64-LABEL: load_global_int_zero:236; SMALL64: # %bb.0: # %entry237; SMALL64-NEXT: ld r3, L..C0(r2) # target-flags(ppc-tprel) @global_int_zero238; SMALL64-NEXT: lwax r3, r13, r3239; SMALL64-NEXT: blr240;241; LARGE32-LABEL: load_global_int_zero:242; LARGE32: # %bb.0: # %entry243; LARGE32-NEXT: mflr r0244; LARGE32-NEXT: stwu r1, -32(r1)245; LARGE32-NEXT: stw r0, 40(r1)246; LARGE32-NEXT: addis r3, L..C0@u(r2)247; LARGE32-NEXT: lwz r4, L..C0@l(r3)248; LARGE32-NEXT: bla .__get_tpointer[PR]249; LARGE32-NEXT: lwzx r3, r3, r4250; LARGE32-NEXT: addi r1, r1, 32251; LARGE32-NEXT: lwz r0, 8(r1)252; LARGE32-NEXT: mtlr r0253; LARGE32-NEXT: blr254;255; SMALL32-LABEL: load_global_int_zero:256; SMALL32: # %bb.0: # %entry257; SMALL32-NEXT: mflr r0258; SMALL32-NEXT: stwu r1, -32(r1)259; SMALL32-NEXT: lwz r4, L..C0(r2) # target-flags(ppc-tprel) @global_int_zero260; SMALL32-NEXT: stw r0, 40(r1)261; SMALL32-NEXT: bla .__get_tpointer[PR]262; SMALL32-NEXT: lwzx r3, r3, r4263; SMALL32-NEXT: addi r1, r1, 32264; SMALL32-NEXT: lwz r0, 8(r1)265; SMALL32-NEXT: mtlr r0266; SMALL32-NEXT: blr267entry:268 %addr = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @global_int_zero)269 %val = load i32, ptr %addr, align 4270 ret i32 %val271}272 273define signext i32 @load_global_int_nonzero() {274; LARGE64-LABEL: load_global_int_nonzero:275; LARGE64: # %bb.0: # %entry276; LARGE64-NEXT: addis r3, L..C1@u(r2)277; LARGE64-NEXT: ld r3, L..C1@l(r3)278; LARGE64-NEXT: lwax r3, r13, r3279; LARGE64-NEXT: blr280;281; SMALL64-LABEL: load_global_int_nonzero:282; SMALL64: # %bb.0: # %entry283; SMALL64-NEXT: ld r3, L..C1(r2) # target-flags(ppc-tprel) @global_int_nonzero284; SMALL64-NEXT: lwax r3, r13, r3285; SMALL64-NEXT: blr286;287; LARGE32-LABEL: load_global_int_nonzero:288; LARGE32: # %bb.0: # %entry289; LARGE32-NEXT: mflr r0290; LARGE32-NEXT: stwu r1, -32(r1)291; LARGE32-NEXT: stw r0, 40(r1)292; LARGE32-NEXT: addis r3, L..C1@u(r2)293; LARGE32-NEXT: lwz r4, L..C1@l(r3)294; LARGE32-NEXT: bla .__get_tpointer[PR]295; LARGE32-NEXT: lwzx r3, r3, r4296; LARGE32-NEXT: addi r1, r1, 32297; LARGE32-NEXT: lwz r0, 8(r1)298; LARGE32-NEXT: mtlr r0299; LARGE32-NEXT: blr300;301; SMALL32-LABEL: load_global_int_nonzero:302; SMALL32: # %bb.0: # %entry303; SMALL32-NEXT: mflr r0304; SMALL32-NEXT: stwu r1, -32(r1)305; SMALL32-NEXT: lwz r4, L..C1(r2) # target-flags(ppc-tprel) @global_int_nonzero306; SMALL32-NEXT: stw r0, 40(r1)307; SMALL32-NEXT: bla .__get_tpointer[PR]308; SMALL32-NEXT: lwzx r3, r3, r4309; SMALL32-NEXT: addi r1, r1, 32310; SMALL32-NEXT: lwz r0, 8(r1)311; SMALL32-NEXT: mtlr r0312; SMALL32-NEXT: blr313entry:314 %addr = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @global_int_nonzero)315 %val = load i32, ptr %addr, align 4316 ret i32 %val317}318 319define signext i32 @load_intern_int_zero() {320; LARGE64-LABEL: load_intern_int_zero:321; LARGE64: # %bb.0: # %entry322; LARGE64-NEXT: addis r3, L..C2@u(r2)323; LARGE64-NEXT: ld r3, L..C2@l(r3)324; LARGE64-NEXT: lwax r3, r13, r3325; LARGE64-NEXT: blr326;327; SMALL64-LABEL: load_intern_int_zero:328; SMALL64: # %bb.0: # %entry329; SMALL64-NEXT: ld r3, L..C2(r2) # target-flags(ppc-tprel) @intern_int_zero330; SMALL64-NEXT: lwax r3, r13, r3331; SMALL64-NEXT: blr332;333; LARGE32-LABEL: load_intern_int_zero:334; LARGE32: # %bb.0: # %entry335; LARGE32-NEXT: mflr r0336; LARGE32-NEXT: stwu r1, -32(r1)337; LARGE32-NEXT: stw r0, 40(r1)338; LARGE32-NEXT: addis r3, L..C2@u(r2)339; LARGE32-NEXT: lwz r4, L..C2@l(r3)340; LARGE32-NEXT: bla .__get_tpointer[PR]341; LARGE32-NEXT: lwzx r3, r3, r4342; LARGE32-NEXT: addi r1, r1, 32343; LARGE32-NEXT: lwz r0, 8(r1)344; LARGE32-NEXT: mtlr r0345; LARGE32-NEXT: blr346;347; SMALL32-LABEL: load_intern_int_zero:348; SMALL32: # %bb.0: # %entry349; SMALL32-NEXT: mflr r0350; SMALL32-NEXT: stwu r1, -32(r1)351; SMALL32-NEXT: lwz r4, L..C2(r2) # target-flags(ppc-tprel) @intern_int_zero352; SMALL32-NEXT: stw r0, 40(r1)353; SMALL32-NEXT: bla .__get_tpointer[PR]354; SMALL32-NEXT: lwzx r3, r3, r4355; SMALL32-NEXT: addi r1, r1, 32356; SMALL32-NEXT: lwz r0, 8(r1)357; SMALL32-NEXT: mtlr r0358; SMALL32-NEXT: blr359entry:360 %addr = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @intern_int_zero)361 %val = load i32, ptr %addr, align 4362 ret i32 %val363}364 365define signext i32 @load_intern_int_nonzero() {366; LARGE64-LABEL: load_intern_int_nonzero:367; LARGE64: # %bb.0: # %entry368; LARGE64-NEXT: addis r3, L..C3@u(r2)369; LARGE64-NEXT: ld r3, L..C3@l(r3)370; LARGE64-NEXT: lwax r3, r13, r3371; LARGE64-NEXT: blr372;373; SMALL64-LABEL: load_intern_int_nonzero:374; SMALL64: # %bb.0: # %entry375; SMALL64-NEXT: ld r3, L..C3(r2) # target-flags(ppc-tprel) @intern_int_nonzero376; SMALL64-NEXT: lwax r3, r13, r3377; SMALL64-NEXT: blr378;379; LARGE32-LABEL: load_intern_int_nonzero:380; LARGE32: # %bb.0: # %entry381; LARGE32-NEXT: mflr r0382; LARGE32-NEXT: stwu r1, -32(r1)383; LARGE32-NEXT: stw r0, 40(r1)384; LARGE32-NEXT: addis r3, L..C3@u(r2)385; LARGE32-NEXT: lwz r4, L..C3@l(r3)386; LARGE32-NEXT: bla .__get_tpointer[PR]387; LARGE32-NEXT: lwzx r3, r3, r4388; LARGE32-NEXT: addi r1, r1, 32389; LARGE32-NEXT: lwz r0, 8(r1)390; LARGE32-NEXT: mtlr r0391; LARGE32-NEXT: blr392;393; SMALL32-LABEL: load_intern_int_nonzero:394; SMALL32: # %bb.0: # %entry395; SMALL32-NEXT: mflr r0396; SMALL32-NEXT: stwu r1, -32(r1)397; SMALL32-NEXT: lwz r4, L..C3(r2) # target-flags(ppc-tprel) @intern_int_nonzero398; SMALL32-NEXT: stw r0, 40(r1)399; SMALL32-NEXT: bla .__get_tpointer[PR]400; SMALL32-NEXT: lwzx r3, r3, r4401; SMALL32-NEXT: addi r1, r1, 32402; SMALL32-NEXT: lwz r0, 8(r1)403; SMALL32-NEXT: mtlr r0404; SMALL32-NEXT: blr405entry:406 %addr = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @intern_int_nonzero)407 %val = load i32, ptr %addr, align 4408 ret i32 %val409}410 411define void @store_global_long_zero(i64 noundef %i) {412; LARGE64-LABEL: store_global_long_zero:413; LARGE64: # %bb.0: # %entry414; LARGE64-NEXT: addis r4, L..C4@u(r2)415; LARGE64-NEXT: ld r4, L..C4@l(r4)416; LARGE64-NEXT: stdx r3, r13, r4417; LARGE64-NEXT: blr418;419; SMALL64-LABEL: store_global_long_zero:420; SMALL64: # %bb.0: # %entry421; SMALL64-NEXT: ld r4, L..C4(r2) # target-flags(ppc-tprel) @global_long_zero422; SMALL64-NEXT: stdx r3, r13, r4423; SMALL64-NEXT: blr424;425; LARGE32-LABEL: store_global_long_zero:426; LARGE32: # %bb.0: # %entry427; LARGE32-NEXT: mflr r0428; LARGE32-NEXT: stwu r1, -32(r1)429; LARGE32-NEXT: stw r0, 40(r1)430; LARGE32-NEXT: mr r5, r3431; LARGE32-NEXT: addis r3, L..C4@u(r2)432; LARGE32-NEXT: lwz r6, L..C4@l(r3)433; LARGE32-NEXT: bla .__get_tpointer[PR]434; LARGE32-NEXT: add r3, r3, r6435; LARGE32-NEXT: stw r4, 4(r3)436; LARGE32-NEXT: stw r5, 0(r3)437; LARGE32-NEXT: addi r1, r1, 32438; LARGE32-NEXT: lwz r0, 8(r1)439; LARGE32-NEXT: mtlr r0440; LARGE32-NEXT: blr441;442; SMALL32-LABEL: store_global_long_zero:443; SMALL32: # %bb.0: # %entry444; SMALL32-NEXT: mflr r0445; SMALL32-NEXT: stwu r1, -32(r1)446; SMALL32-NEXT: lwz r6, L..C4(r2) # target-flags(ppc-tprel) @global_long_zero447; SMALL32-NEXT: mr r5, r3448; SMALL32-NEXT: bla .__get_tpointer[PR]449; SMALL32-NEXT: stw r0, 40(r1)450; SMALL32-NEXT: add r3, r3, r6451; SMALL32-NEXT: stw r4, 4(r3)452; SMALL32-NEXT: stw r5, 0(r3)453; SMALL32-NEXT: addi r1, r1, 32454; SMALL32-NEXT: lwz r0, 8(r1)455; SMALL32-NEXT: mtlr r0456; SMALL32-NEXT: blr457entry:458 %addr = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @global_long_zero)459 store i64 %i, ptr %addr, align 8460 ret void461}462 463define void @store_global_long_nonzero(i64 noundef %i) {464; LARGE64-LABEL: store_global_long_nonzero:465; LARGE64: # %bb.0: # %entry466; LARGE64-NEXT: addis r4, L..C5@u(r2)467; LARGE64-NEXT: ld r4, L..C5@l(r4)468; LARGE64-NEXT: stdx r3, r13, r4469; LARGE64-NEXT: blr470;471; SMALL64-LABEL: store_global_long_nonzero:472; SMALL64: # %bb.0: # %entry473; SMALL64-NEXT: ld r4, L..C5(r2) # target-flags(ppc-tprel) @global_long_nonzero474; SMALL64-NEXT: stdx r3, r13, r4475; SMALL64-NEXT: blr476;477; LARGE32-LABEL: store_global_long_nonzero:478; LARGE32: # %bb.0: # %entry479; LARGE32-NEXT: mflr r0480; LARGE32-NEXT: stwu r1, -32(r1)481; LARGE32-NEXT: stw r0, 40(r1)482; LARGE32-NEXT: mr r5, r3483; LARGE32-NEXT: addis r3, L..C5@u(r2)484; LARGE32-NEXT: lwz r6, L..C5@l(r3)485; LARGE32-NEXT: bla .__get_tpointer[PR]486; LARGE32-NEXT: add r3, r3, r6487; LARGE32-NEXT: stw r4, 4(r3)488; LARGE32-NEXT: stw r5, 0(r3)489; LARGE32-NEXT: addi r1, r1, 32490; LARGE32-NEXT: lwz r0, 8(r1)491; LARGE32-NEXT: mtlr r0492; LARGE32-NEXT: blr493;494; SMALL32-LABEL: store_global_long_nonzero:495; SMALL32: # %bb.0: # %entry496; SMALL32-NEXT: mflr r0497; SMALL32-NEXT: stwu r1, -32(r1)498; SMALL32-NEXT: lwz r6, L..C5(r2) # target-flags(ppc-tprel) @global_long_nonzero499; SMALL32-NEXT: mr r5, r3500; SMALL32-NEXT: bla .__get_tpointer[PR]501; SMALL32-NEXT: stw r0, 40(r1)502; SMALL32-NEXT: add r3, r3, r6503; SMALL32-NEXT: stw r4, 4(r3)504; SMALL32-NEXT: stw r5, 0(r3)505; SMALL32-NEXT: addi r1, r1, 32506; SMALL32-NEXT: lwz r0, 8(r1)507; SMALL32-NEXT: mtlr r0508; SMALL32-NEXT: blr509entry:510 %addr = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @global_long_nonzero)511 store i64 %i, ptr %addr, align 8512 ret void513}514 515define void @store_intern_long_zero(i64 noundef %i) {516; LARGE64-LABEL: store_intern_long_zero:517; LARGE64: # %bb.0: # %entry518; LARGE64-NEXT: addis r4, L..C6@u(r2)519; LARGE64-NEXT: ld r4, L..C6@l(r4)520; LARGE64-NEXT: stdx r3, r13, r4521; LARGE64-NEXT: blr522;523; SMALL64-LABEL: store_intern_long_zero:524; SMALL64: # %bb.0: # %entry525; SMALL64-NEXT: ld r4, L..C6(r2) # target-flags(ppc-tprel) @intern_long_zero526; SMALL64-NEXT: stdx r3, r13, r4527; SMALL64-NEXT: blr528;529; LARGE32-LABEL: store_intern_long_zero:530; LARGE32: # %bb.0: # %entry531; LARGE32-NEXT: mflr r0532; LARGE32-NEXT: stwu r1, -32(r1)533; LARGE32-NEXT: stw r0, 40(r1)534; LARGE32-NEXT: mr r5, r3535; LARGE32-NEXT: addis r3, L..C6@u(r2)536; LARGE32-NEXT: lwz r6, L..C6@l(r3)537; LARGE32-NEXT: bla .__get_tpointer[PR]538; LARGE32-NEXT: add r3, r3, r6539; LARGE32-NEXT: stw r4, 4(r3)540; LARGE32-NEXT: stw r5, 0(r3)541; LARGE32-NEXT: addi r1, r1, 32542; LARGE32-NEXT: lwz r0, 8(r1)543; LARGE32-NEXT: mtlr r0544; LARGE32-NEXT: blr545;546; SMALL32-LABEL: store_intern_long_zero:547; SMALL32: # %bb.0: # %entry548; SMALL32-NEXT: mflr r0549; SMALL32-NEXT: stwu r1, -32(r1)550; SMALL32-NEXT: lwz r6, L..C6(r2) # target-flags(ppc-tprel) @intern_long_zero551; SMALL32-NEXT: mr r5, r3552; SMALL32-NEXT: bla .__get_tpointer[PR]553; SMALL32-NEXT: stw r0, 40(r1)554; SMALL32-NEXT: add r3, r3, r6555; SMALL32-NEXT: stw r4, 4(r3)556; SMALL32-NEXT: stw r5, 0(r3)557; SMALL32-NEXT: addi r1, r1, 32558; SMALL32-NEXT: lwz r0, 8(r1)559; SMALL32-NEXT: mtlr r0560; SMALL32-NEXT: blr561entry:562 %addr = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @intern_long_zero)563 store i64 %i, ptr %addr, align 8564 ret void565}566 567define void @store_intern_long_nonzero(i64 noundef %i) {568; LARGE64-LABEL: store_intern_long_nonzero:569; LARGE64: # %bb.0: # %entry570; LARGE64-NEXT: addis r4, L..C7@u(r2)571; LARGE64-NEXT: ld r4, L..C7@l(r4)572; LARGE64-NEXT: stdx r3, r13, r4573; LARGE64-NEXT: blr574;575; SMALL64-LABEL: store_intern_long_nonzero:576; SMALL64: # %bb.0: # %entry577; SMALL64-NEXT: ld r4, L..C7(r2) # target-flags(ppc-tprel) @intern_long_nonzero578; SMALL64-NEXT: stdx r3, r13, r4579; SMALL64-NEXT: blr580;581; LARGE32-LABEL: store_intern_long_nonzero:582; LARGE32: # %bb.0: # %entry583; LARGE32-NEXT: mflr r0584; LARGE32-NEXT: stwu r1, -32(r1)585; LARGE32-NEXT: stw r0, 40(r1)586; LARGE32-NEXT: mr r5, r3587; LARGE32-NEXT: addis r3, L..C7@u(r2)588; LARGE32-NEXT: lwz r6, L..C7@l(r3)589; LARGE32-NEXT: bla .__get_tpointer[PR]590; LARGE32-NEXT: add r3, r3, r6591; LARGE32-NEXT: stw r4, 4(r3)592; LARGE32-NEXT: stw r5, 0(r3)593; LARGE32-NEXT: addi r1, r1, 32594; LARGE32-NEXT: lwz r0, 8(r1)595; LARGE32-NEXT: mtlr r0596; LARGE32-NEXT: blr597;598; SMALL32-LABEL: store_intern_long_nonzero:599; SMALL32: # %bb.0: # %entry600; SMALL32-NEXT: mflr r0601; SMALL32-NEXT: stwu r1, -32(r1)602; SMALL32-NEXT: lwz r6, L..C7(r2) # target-flags(ppc-tprel) @intern_long_nonzero603; SMALL32-NEXT: mr r5, r3604; SMALL32-NEXT: bla .__get_tpointer[PR]605; SMALL32-NEXT: stw r0, 40(r1)606; SMALL32-NEXT: add r3, r3, r6607; SMALL32-NEXT: stw r4, 4(r3)608; SMALL32-NEXT: stw r5, 0(r3)609; SMALL32-NEXT: addi r1, r1, 32610; SMALL32-NEXT: lwz r0, 8(r1)611; SMALL32-NEXT: mtlr r0612; SMALL32-NEXT: blr613entry:614 %addr = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @intern_long_nonzero)615 store i64 %i, ptr %addr, align 8616 ret void617}618 619define i64 @load_global_long_zero() {620; LARGE64-LABEL: load_global_long_zero:621; LARGE64: # %bb.0: # %entry622; LARGE64-NEXT: addis r3, L..C4@u(r2)623; LARGE64-NEXT: ld r3, L..C4@l(r3)624; LARGE64-NEXT: ldx r3, r13, r3625; LARGE64-NEXT: blr626;627; SMALL64-LABEL: load_global_long_zero:628; SMALL64: # %bb.0: # %entry629; SMALL64-NEXT: ld r3, L..C4(r2) # target-flags(ppc-tprel) @global_long_zero630; SMALL64-NEXT: ldx r3, r13, r3631; SMALL64-NEXT: blr632;633; LARGE32-LABEL: load_global_long_zero:634; LARGE32: # %bb.0: # %entry635; LARGE32-NEXT: mflr r0636; LARGE32-NEXT: stwu r1, -32(r1)637; LARGE32-NEXT: stw r0, 40(r1)638; LARGE32-NEXT: addis r3, L..C4@u(r2)639; LARGE32-NEXT: lwz r4, L..C4@l(r3)640; LARGE32-NEXT: bla .__get_tpointer[PR]641; LARGE32-NEXT: add r4, r3, r4642; LARGE32-NEXT: lwz r3, 0(r4)643; LARGE32-NEXT: lwz r4, 4(r4)644; LARGE32-NEXT: addi r1, r1, 32645; LARGE32-NEXT: lwz r0, 8(r1)646; LARGE32-NEXT: mtlr r0647; LARGE32-NEXT: blr648;649; SMALL32-LABEL: load_global_long_zero:650; SMALL32: # %bb.0: # %entry651; SMALL32-NEXT: mflr r0652; SMALL32-NEXT: stwu r1, -32(r1)653; SMALL32-NEXT: lwz r4, L..C4(r2) # target-flags(ppc-tprel) @global_long_zero654; SMALL32-NEXT: bla .__get_tpointer[PR]655; SMALL32-NEXT: stw r0, 40(r1)656; SMALL32-NEXT: add r4, r3, r4657; SMALL32-NEXT: lwz r3, 0(r4)658; SMALL32-NEXT: lwz r4, 4(r4)659; SMALL32-NEXT: addi r1, r1, 32660; SMALL32-NEXT: lwz r0, 8(r1)661; SMALL32-NEXT: mtlr r0662; SMALL32-NEXT: blr663entry:664 %addr = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @global_long_zero)665 %val = load i64, ptr %addr, align 8666 ret i64 %val667}668 669define i64 @load_global_long_nonzero() {670; LARGE64-LABEL: load_global_long_nonzero:671; LARGE64: # %bb.0: # %entry672; LARGE64-NEXT: addis r3, L..C5@u(r2)673; LARGE64-NEXT: ld r3, L..C5@l(r3)674; LARGE64-NEXT: ldx r3, r13, r3675; LARGE64-NEXT: blr676;677; SMALL64-LABEL: load_global_long_nonzero:678; SMALL64: # %bb.0: # %entry679; SMALL64-NEXT: ld r3, L..C5(r2) # target-flags(ppc-tprel) @global_long_nonzero680; SMALL64-NEXT: ldx r3, r13, r3681; SMALL64-NEXT: blr682;683; LARGE32-LABEL: load_global_long_nonzero:684; LARGE32: # %bb.0: # %entry685; LARGE32-NEXT: mflr r0686; LARGE32-NEXT: stwu r1, -32(r1)687; LARGE32-NEXT: stw r0, 40(r1)688; LARGE32-NEXT: addis r3, L..C5@u(r2)689; LARGE32-NEXT: lwz r4, L..C5@l(r3)690; LARGE32-NEXT: bla .__get_tpointer[PR]691; LARGE32-NEXT: add r4, r3, r4692; LARGE32-NEXT: lwz r3, 0(r4)693; LARGE32-NEXT: lwz r4, 4(r4)694; LARGE32-NEXT: addi r1, r1, 32695; LARGE32-NEXT: lwz r0, 8(r1)696; LARGE32-NEXT: mtlr r0697; LARGE32-NEXT: blr698;699; SMALL32-LABEL: load_global_long_nonzero:700; SMALL32: # %bb.0: # %entry701; SMALL32-NEXT: mflr r0702; SMALL32-NEXT: stwu r1, -32(r1)703; SMALL32-NEXT: lwz r4, L..C5(r2) # target-flags(ppc-tprel) @global_long_nonzero704; SMALL32-NEXT: bla .__get_tpointer[PR]705; SMALL32-NEXT: stw r0, 40(r1)706; SMALL32-NEXT: add r4, r3, r4707; SMALL32-NEXT: lwz r3, 0(r4)708; SMALL32-NEXT: lwz r4, 4(r4)709; SMALL32-NEXT: addi r1, r1, 32710; SMALL32-NEXT: lwz r0, 8(r1)711; SMALL32-NEXT: mtlr r0712; SMALL32-NEXT: blr713entry:714 %addr = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @global_long_nonzero)715 %val = load i64, ptr %addr, align 8716 ret i64 %val717}718 719define i64 @load_intern_long_zero() {720; LARGE64-LABEL: load_intern_long_zero:721; LARGE64: # %bb.0: # %entry722; LARGE64-NEXT: addis r3, L..C6@u(r2)723; LARGE64-NEXT: ld r3, L..C6@l(r3)724; LARGE64-NEXT: ldx r3, r13, r3725; LARGE64-NEXT: blr726;727; SMALL64-LABEL: load_intern_long_zero:728; SMALL64: # %bb.0: # %entry729; SMALL64-NEXT: ld r3, L..C6(r2) # target-flags(ppc-tprel) @intern_long_zero730; SMALL64-NEXT: ldx r3, r13, r3731; SMALL64-NEXT: blr732;733; LARGE32-LABEL: load_intern_long_zero:734; LARGE32: # %bb.0: # %entry735; LARGE32-NEXT: mflr r0736; LARGE32-NEXT: stwu r1, -32(r1)737; LARGE32-NEXT: stw r0, 40(r1)738; LARGE32-NEXT: addis r3, L..C6@u(r2)739; LARGE32-NEXT: lwz r4, L..C6@l(r3)740; LARGE32-NEXT: bla .__get_tpointer[PR]741; LARGE32-NEXT: add r4, r3, r4742; LARGE32-NEXT: lwz r3, 0(r4)743; LARGE32-NEXT: lwz r4, 4(r4)744; LARGE32-NEXT: addi r1, r1, 32745; LARGE32-NEXT: lwz r0, 8(r1)746; LARGE32-NEXT: mtlr r0747; LARGE32-NEXT: blr748;749; SMALL32-LABEL: load_intern_long_zero:750; SMALL32: # %bb.0: # %entry751; SMALL32-NEXT: mflr r0752; SMALL32-NEXT: stwu r1, -32(r1)753; SMALL32-NEXT: lwz r4, L..C6(r2) # target-flags(ppc-tprel) @intern_long_zero754; SMALL32-NEXT: bla .__get_tpointer[PR]755; SMALL32-NEXT: stw r0, 40(r1)756; SMALL32-NEXT: add r4, r3, r4757; SMALL32-NEXT: lwz r3, 0(r4)758; SMALL32-NEXT: lwz r4, 4(r4)759; SMALL32-NEXT: addi r1, r1, 32760; SMALL32-NEXT: lwz r0, 8(r1)761; SMALL32-NEXT: mtlr r0762; SMALL32-NEXT: blr763entry:764 %addr = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @intern_long_zero)765 %val = load i64, ptr %addr, align 8766 ret i64 %val767}768 769define i64 @load_intern_long_nonzero() {770; LARGE64-LABEL: load_intern_long_nonzero:771; LARGE64: # %bb.0: # %entry772; LARGE64-NEXT: addis r3, L..C7@u(r2)773; LARGE64-NEXT: ld r3, L..C7@l(r3)774; LARGE64-NEXT: ldx r3, r13, r3775; LARGE64-NEXT: blr776;777; SMALL64-LABEL: load_intern_long_nonzero:778; SMALL64: # %bb.0: # %entry779; SMALL64-NEXT: ld r3, L..C7(r2) # target-flags(ppc-tprel) @intern_long_nonzero780; SMALL64-NEXT: ldx r3, r13, r3781; SMALL64-NEXT: blr782;783; LARGE32-LABEL: load_intern_long_nonzero:784; LARGE32: # %bb.0: # %entry785; LARGE32-NEXT: mflr r0786; LARGE32-NEXT: stwu r1, -32(r1)787; LARGE32-NEXT: stw r0, 40(r1)788; LARGE32-NEXT: addis r3, L..C7@u(r2)789; LARGE32-NEXT: lwz r4, L..C7@l(r3)790; LARGE32-NEXT: bla .__get_tpointer[PR]791; LARGE32-NEXT: add r4, r3, r4792; LARGE32-NEXT: lwz r3, 0(r4)793; LARGE32-NEXT: lwz r4, 4(r4)794; LARGE32-NEXT: addi r1, r1, 32795; LARGE32-NEXT: lwz r0, 8(r1)796; LARGE32-NEXT: mtlr r0797; LARGE32-NEXT: blr798;799; SMALL32-LABEL: load_intern_long_nonzero:800; SMALL32: # %bb.0: # %entry801; SMALL32-NEXT: mflr r0802; SMALL32-NEXT: stwu r1, -32(r1)803; SMALL32-NEXT: lwz r4, L..C7(r2) # target-flags(ppc-tprel) @intern_long_nonzero804; SMALL32-NEXT: bla .__get_tpointer[PR]805; SMALL32-NEXT: stw r0, 40(r1)806; SMALL32-NEXT: add r4, r3, r4807; SMALL32-NEXT: lwz r3, 0(r4)808; SMALL32-NEXT: lwz r4, 4(r4)809; SMALL32-NEXT: addi r1, r1, 32810; SMALL32-NEXT: lwz r0, 8(r1)811; SMALL32-NEXT: mtlr r0812; SMALL32-NEXT: blr813entry:814 %addr = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @intern_long_nonzero)815 %val = load i64, ptr %addr, align 8816 ret i64 %val817}818 819define void @store_global_float_zero(float noundef %i) {820; LARGE64-LABEL: store_global_float_zero:821; LARGE64: # %bb.0: # %entry822; LARGE64-NEXT: addis r3, L..C8@u(r2)823; LARGE64-NEXT: ld r3, L..C8@l(r3)824; LARGE64-NEXT: stfsx f1, r13, r3825; LARGE64-NEXT: blr826;827; SMALL64-LABEL: store_global_float_zero:828; SMALL64: # %bb.0: # %entry829; SMALL64-NEXT: ld r3, L..C8(r2) # target-flags(ppc-tprel) @global_float_zero830; SMALL64-NEXT: stfsx f1, r13, r3831; SMALL64-NEXT: blr832;833; LARGE32-LABEL: store_global_float_zero:834; LARGE32: # %bb.0: # %entry835; LARGE32-NEXT: mflr r0836; LARGE32-NEXT: stwu r1, -32(r1)837; LARGE32-NEXT: stw r0, 40(r1)838; LARGE32-NEXT: addis r3, L..C8@u(r2)839; LARGE32-NEXT: lwz r4, L..C8@l(r3)840; LARGE32-NEXT: bla .__get_tpointer[PR]841; LARGE32-NEXT: stfsx f1, r3, r4842; LARGE32-NEXT: addi r1, r1, 32843; LARGE32-NEXT: lwz r0, 8(r1)844; LARGE32-NEXT: mtlr r0845; LARGE32-NEXT: blr846;847; SMALL32-LABEL: store_global_float_zero:848; SMALL32: # %bb.0: # %entry849; SMALL32-NEXT: mflr r0850; SMALL32-NEXT: stwu r1, -32(r1)851; SMALL32-NEXT: lwz r4, L..C8(r2) # target-flags(ppc-tprel) @global_float_zero852; SMALL32-NEXT: bla .__get_tpointer[PR]853; SMALL32-NEXT: stw r0, 40(r1)854; SMALL32-NEXT: stfsx f1, r3, r4855; SMALL32-NEXT: addi r1, r1, 32856; SMALL32-NEXT: lwz r0, 8(r1)857; SMALL32-NEXT: mtlr r0858; SMALL32-NEXT: blr859entry:860 %addr = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @global_float_zero)861 store float %i, ptr %addr, align 4862 ret void863}864 865define void @store_global_float_nonzero(float noundef %i) {866; LARGE64-LABEL: store_global_float_nonzero:867; LARGE64: # %bb.0: # %entry868; LARGE64-NEXT: addis r3, L..C9@u(r2)869; LARGE64-NEXT: ld r3, L..C9@l(r3)870; LARGE64-NEXT: stfsx f1, r13, r3871; LARGE64-NEXT: blr872;873; SMALL64-LABEL: store_global_float_nonzero:874; SMALL64: # %bb.0: # %entry875; SMALL64-NEXT: ld r3, L..C9(r2) # target-flags(ppc-tprel) @global_float_nonzero876; SMALL64-NEXT: stfsx f1, r13, r3877; SMALL64-NEXT: blr878;879; LARGE32-LABEL: store_global_float_nonzero:880; LARGE32: # %bb.0: # %entry881; LARGE32-NEXT: mflr r0882; LARGE32-NEXT: stwu r1, -32(r1)883; LARGE32-NEXT: stw r0, 40(r1)884; LARGE32-NEXT: addis r3, L..C9@u(r2)885; LARGE32-NEXT: lwz r4, L..C9@l(r3)886; LARGE32-NEXT: bla .__get_tpointer[PR]887; LARGE32-NEXT: stfsx f1, r3, r4888; LARGE32-NEXT: addi r1, r1, 32889; LARGE32-NEXT: lwz r0, 8(r1)890; LARGE32-NEXT: mtlr r0891; LARGE32-NEXT: blr892;893; SMALL32-LABEL: store_global_float_nonzero:894; SMALL32: # %bb.0: # %entry895; SMALL32-NEXT: mflr r0896; SMALL32-NEXT: stwu r1, -32(r1)897; SMALL32-NEXT: lwz r4, L..C9(r2) # target-flags(ppc-tprel) @global_float_nonzero898; SMALL32-NEXT: bla .__get_tpointer[PR]899; SMALL32-NEXT: stw r0, 40(r1)900; SMALL32-NEXT: stfsx f1, r3, r4901; SMALL32-NEXT: addi r1, r1, 32902; SMALL32-NEXT: lwz r0, 8(r1)903; SMALL32-NEXT: mtlr r0904; SMALL32-NEXT: blr905entry:906 %addr = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @global_float_nonzero)907 store float %i, ptr %addr, align 4908 ret void909}910 911define void @store_intern_float_zero(float noundef %i) {912; LARGE64-LABEL: store_intern_float_zero:913; LARGE64: # %bb.0: # %entry914; LARGE64-NEXT: addis r3, L..C10@u(r2)915; LARGE64-NEXT: ld r3, L..C10@l(r3)916; LARGE64-NEXT: stfsx f1, r13, r3917; LARGE64-NEXT: blr918;919; SMALL64-LABEL: store_intern_float_zero:920; SMALL64: # %bb.0: # %entry921; SMALL64-NEXT: ld r3, L..C10(r2) # target-flags(ppc-tprel) @intern_float_zero922; SMALL64-NEXT: stfsx f1, r13, r3923; SMALL64-NEXT: blr924;925; LARGE32-LABEL: store_intern_float_zero:926; LARGE32: # %bb.0: # %entry927; LARGE32-NEXT: mflr r0928; LARGE32-NEXT: stwu r1, -32(r1)929; LARGE32-NEXT: stw r0, 40(r1)930; LARGE32-NEXT: addis r3, L..C10@u(r2)931; LARGE32-NEXT: lwz r4, L..C10@l(r3)932; LARGE32-NEXT: bla .__get_tpointer[PR]933; LARGE32-NEXT: stfsx f1, r3, r4934; LARGE32-NEXT: addi r1, r1, 32935; LARGE32-NEXT: lwz r0, 8(r1)936; LARGE32-NEXT: mtlr r0937; LARGE32-NEXT: blr938;939; SMALL32-LABEL: store_intern_float_zero:940; SMALL32: # %bb.0: # %entry941; SMALL32-NEXT: mflr r0942; SMALL32-NEXT: stwu r1, -32(r1)943; SMALL32-NEXT: lwz r4, L..C10(r2) # target-flags(ppc-tprel) @intern_float_zero944; SMALL32-NEXT: bla .__get_tpointer[PR]945; SMALL32-NEXT: stw r0, 40(r1)946; SMALL32-NEXT: stfsx f1, r3, r4947; SMALL32-NEXT: addi r1, r1, 32948; SMALL32-NEXT: lwz r0, 8(r1)949; SMALL32-NEXT: mtlr r0950; SMALL32-NEXT: blr951entry:952 %addr = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @intern_float_zero)953 store float %i, ptr %addr, align 4954 ret void955}956 957define void @store_intern_float_nonzero(float noundef %i) {958; LARGE64-LABEL: store_intern_float_nonzero:959; LARGE64: # %bb.0: # %entry960; LARGE64-NEXT: addis r3, L..C11@u(r2)961; LARGE64-NEXT: ld r3, L..C11@l(r3)962; LARGE64-NEXT: stfsx f1, r13, r3963; LARGE64-NEXT: blr964;965; SMALL64-LABEL: store_intern_float_nonzero:966; SMALL64: # %bb.0: # %entry967; SMALL64-NEXT: ld r3, L..C11(r2) # target-flags(ppc-tprel) @intern_float_nonzero968; SMALL64-NEXT: stfsx f1, r13, r3969; SMALL64-NEXT: blr970;971; LARGE32-LABEL: store_intern_float_nonzero:972; LARGE32: # %bb.0: # %entry973; LARGE32-NEXT: mflr r0974; LARGE32-NEXT: stwu r1, -32(r1)975; LARGE32-NEXT: stw r0, 40(r1)976; LARGE32-NEXT: addis r3, L..C11@u(r2)977; LARGE32-NEXT: lwz r4, L..C11@l(r3)978; LARGE32-NEXT: bla .__get_tpointer[PR]979; LARGE32-NEXT: stfsx f1, r3, r4980; LARGE32-NEXT: addi r1, r1, 32981; LARGE32-NEXT: lwz r0, 8(r1)982; LARGE32-NEXT: mtlr r0983; LARGE32-NEXT: blr984;985; SMALL32-LABEL: store_intern_float_nonzero:986; SMALL32: # %bb.0: # %entry987; SMALL32-NEXT: mflr r0988; SMALL32-NEXT: stwu r1, -32(r1)989; SMALL32-NEXT: lwz r4, L..C11(r2) # target-flags(ppc-tprel) @intern_float_nonzero990; SMALL32-NEXT: bla .__get_tpointer[PR]991; SMALL32-NEXT: stw r0, 40(r1)992; SMALL32-NEXT: stfsx f1, r3, r4993; SMALL32-NEXT: addi r1, r1, 32994; SMALL32-NEXT: lwz r0, 8(r1)995; SMALL32-NEXT: mtlr r0996; SMALL32-NEXT: blr997entry:998 %addr = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @intern_float_nonzero)999 store float %i, ptr %addr, align 41000 ret void1001}1002 1003define float @load_global_float_zero() {1004; LARGE64-LABEL: load_global_float_zero:1005; LARGE64: # %bb.0: # %entry1006; LARGE64-NEXT: addis r3, L..C8@u(r2)1007; LARGE64-NEXT: ld r3, L..C8@l(r3)1008; LARGE64-NEXT: lfsx f1, r13, r31009; LARGE64-NEXT: blr1010;1011; SMALL64-LABEL: load_global_float_zero:1012; SMALL64: # %bb.0: # %entry1013; SMALL64-NEXT: ld r3, L..C8(r2) # target-flags(ppc-tprel) @global_float_zero1014; SMALL64-NEXT: lfsx f1, r13, r31015; SMALL64-NEXT: blr1016;1017; LARGE32-LABEL: load_global_float_zero:1018; LARGE32: # %bb.0: # %entry1019; LARGE32-NEXT: mflr r01020; LARGE32-NEXT: stwu r1, -32(r1)1021; LARGE32-NEXT: stw r0, 40(r1)1022; LARGE32-NEXT: addis r3, L..C8@u(r2)1023; LARGE32-NEXT: lwz r4, L..C8@l(r3)1024; LARGE32-NEXT: bla .__get_tpointer[PR]1025; LARGE32-NEXT: lfsx f1, r3, r41026; LARGE32-NEXT: addi r1, r1, 321027; LARGE32-NEXT: lwz r0, 8(r1)1028; LARGE32-NEXT: mtlr r01029; LARGE32-NEXT: blr1030;1031; SMALL32-LABEL: load_global_float_zero:1032; SMALL32: # %bb.0: # %entry1033; SMALL32-NEXT: mflr r01034; SMALL32-NEXT: stwu r1, -32(r1)1035; SMALL32-NEXT: lwz r4, L..C8(r2) # target-flags(ppc-tprel) @global_float_zero1036; SMALL32-NEXT: stw r0, 40(r1)1037; SMALL32-NEXT: bla .__get_tpointer[PR]1038; SMALL32-NEXT: lfsx f1, r3, r41039; SMALL32-NEXT: addi r1, r1, 321040; SMALL32-NEXT: lwz r0, 8(r1)1041; SMALL32-NEXT: mtlr r01042; SMALL32-NEXT: blr1043entry:1044 %addr = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @global_float_zero)1045 %val = load float, ptr %addr, align 41046 ret float %val1047}1048 1049define float @load_global_float_nonzero() {1050; LARGE64-LABEL: load_global_float_nonzero:1051; LARGE64: # %bb.0: # %entry1052; LARGE64-NEXT: addis r3, L..C9@u(r2)1053; LARGE64-NEXT: ld r3, L..C9@l(r3)1054; LARGE64-NEXT: lfsx f1, r13, r31055; LARGE64-NEXT: blr1056;1057; SMALL64-LABEL: load_global_float_nonzero:1058; SMALL64: # %bb.0: # %entry1059; SMALL64-NEXT: ld r3, L..C9(r2) # target-flags(ppc-tprel) @global_float_nonzero1060; SMALL64-NEXT: lfsx f1, r13, r31061; SMALL64-NEXT: blr1062;1063; LARGE32-LABEL: load_global_float_nonzero:1064; LARGE32: # %bb.0: # %entry1065; LARGE32-NEXT: mflr r01066; LARGE32-NEXT: stwu r1, -32(r1)1067; LARGE32-NEXT: stw r0, 40(r1)1068; LARGE32-NEXT: addis r3, L..C9@u(r2)1069; LARGE32-NEXT: lwz r4, L..C9@l(r3)1070; LARGE32-NEXT: bla .__get_tpointer[PR]1071; LARGE32-NEXT: lfsx f1, r3, r41072; LARGE32-NEXT: addi r1, r1, 321073; LARGE32-NEXT: lwz r0, 8(r1)1074; LARGE32-NEXT: mtlr r01075; LARGE32-NEXT: blr1076;1077; SMALL32-LABEL: load_global_float_nonzero:1078; SMALL32: # %bb.0: # %entry1079; SMALL32-NEXT: mflr r01080; SMALL32-NEXT: stwu r1, -32(r1)1081; SMALL32-NEXT: lwz r4, L..C9(r2) # target-flags(ppc-tprel) @global_float_nonzero1082; SMALL32-NEXT: stw r0, 40(r1)1083; SMALL32-NEXT: bla .__get_tpointer[PR]1084; SMALL32-NEXT: lfsx f1, r3, r41085; SMALL32-NEXT: addi r1, r1, 321086; SMALL32-NEXT: lwz r0, 8(r1)1087; SMALL32-NEXT: mtlr r01088; SMALL32-NEXT: blr1089entry:1090 %addr = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @global_float_nonzero)1091 %val = load float, ptr %addr, align 41092 ret float %val1093}1094 1095define float @load_intern_float_zero() {1096; LARGE64-LABEL: load_intern_float_zero:1097; LARGE64: # %bb.0: # %entry1098; LARGE64-NEXT: addis r3, L..C10@u(r2)1099; LARGE64-NEXT: ld r3, L..C10@l(r3)1100; LARGE64-NEXT: lfsx f1, r13, r31101; LARGE64-NEXT: blr1102;1103; SMALL64-LABEL: load_intern_float_zero:1104; SMALL64: # %bb.0: # %entry1105; SMALL64-NEXT: ld r3, L..C10(r2) # target-flags(ppc-tprel) @intern_float_zero1106; SMALL64-NEXT: lfsx f1, r13, r31107; SMALL64-NEXT: blr1108;1109; LARGE32-LABEL: load_intern_float_zero:1110; LARGE32: # %bb.0: # %entry1111; LARGE32-NEXT: mflr r01112; LARGE32-NEXT: stwu r1, -32(r1)1113; LARGE32-NEXT: stw r0, 40(r1)1114; LARGE32-NEXT: addis r3, L..C10@u(r2)1115; LARGE32-NEXT: lwz r4, L..C10@l(r3)1116; LARGE32-NEXT: bla .__get_tpointer[PR]1117; LARGE32-NEXT: lfsx f1, r3, r41118; LARGE32-NEXT: addi r1, r1, 321119; LARGE32-NEXT: lwz r0, 8(r1)1120; LARGE32-NEXT: mtlr r01121; LARGE32-NEXT: blr1122;1123; SMALL32-LABEL: load_intern_float_zero:1124; SMALL32: # %bb.0: # %entry1125; SMALL32-NEXT: mflr r01126; SMALL32-NEXT: stwu r1, -32(r1)1127; SMALL32-NEXT: lwz r4, L..C10(r2) # target-flags(ppc-tprel) @intern_float_zero1128; SMALL32-NEXT: stw r0, 40(r1)1129; SMALL32-NEXT: bla .__get_tpointer[PR]1130; SMALL32-NEXT: lfsx f1, r3, r41131; SMALL32-NEXT: addi r1, r1, 321132; SMALL32-NEXT: lwz r0, 8(r1)1133; SMALL32-NEXT: mtlr r01134; SMALL32-NEXT: blr1135entry:1136 %addr = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @intern_float_zero)1137 %val = load float, ptr %addr, align 41138 ret float %val1139}1140 1141define float @load_intern_float_nonzero() {1142; LARGE64-LABEL: load_intern_float_nonzero:1143; LARGE64: # %bb.0: # %entry1144; LARGE64-NEXT: addis r3, L..C11@u(r2)1145; LARGE64-NEXT: ld r3, L..C11@l(r3)1146; LARGE64-NEXT: lfsx f1, r13, r31147; LARGE64-NEXT: blr1148;1149; SMALL64-LABEL: load_intern_float_nonzero:1150; SMALL64: # %bb.0: # %entry1151; SMALL64-NEXT: ld r3, L..C11(r2) # target-flags(ppc-tprel) @intern_float_nonzero1152; SMALL64-NEXT: lfsx f1, r13, r31153; SMALL64-NEXT: blr1154;1155; LARGE32-LABEL: load_intern_float_nonzero:1156; LARGE32: # %bb.0: # %entry1157; LARGE32-NEXT: mflr r01158; LARGE32-NEXT: stwu r1, -32(r1)1159; LARGE32-NEXT: stw r0, 40(r1)1160; LARGE32-NEXT: addis r3, L..C11@u(r2)1161; LARGE32-NEXT: lwz r4, L..C11@l(r3)1162; LARGE32-NEXT: bla .__get_tpointer[PR]1163; LARGE32-NEXT: lfsx f1, r3, r41164; LARGE32-NEXT: addi r1, r1, 321165; LARGE32-NEXT: lwz r0, 8(r1)1166; LARGE32-NEXT: mtlr r01167; LARGE32-NEXT: blr1168;1169; SMALL32-LABEL: load_intern_float_nonzero:1170; SMALL32: # %bb.0: # %entry1171; SMALL32-NEXT: mflr r01172; SMALL32-NEXT: stwu r1, -32(r1)1173; SMALL32-NEXT: lwz r4, L..C11(r2) # target-flags(ppc-tprel) @intern_float_nonzero1174; SMALL32-NEXT: stw r0, 40(r1)1175; SMALL32-NEXT: bla .__get_tpointer[PR]1176; SMALL32-NEXT: lfsx f1, r3, r41177; SMALL32-NEXT: addi r1, r1, 321178; SMALL32-NEXT: lwz r0, 8(r1)1179; SMALL32-NEXT: mtlr r01180; SMALL32-NEXT: blr1181entry:1182 %addr = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @intern_float_nonzero)1183 %val = load float, ptr %addr, align 41184 ret float %val1185}1186 1187define void @store_global_double_zero(double noundef %i) {1188; LARGE64-LABEL: store_global_double_zero:1189; LARGE64: # %bb.0: # %entry1190; LARGE64-NEXT: addis r3, L..C12@u(r2)1191; LARGE64-NEXT: ld r3, L..C12@l(r3)1192; LARGE64-NEXT: stfdx f1, r13, r31193; LARGE64-NEXT: blr1194;1195; SMALL64-LABEL: store_global_double_zero:1196; SMALL64: # %bb.0: # %entry1197; SMALL64-NEXT: ld r3, L..C12(r2) # target-flags(ppc-tprel) @global_double_zero1198; SMALL64-NEXT: stfdx f1, r13, r31199; SMALL64-NEXT: blr1200;1201; LARGE32-LABEL: store_global_double_zero:1202; LARGE32: # %bb.0: # %entry1203; LARGE32-NEXT: mflr r01204; LARGE32-NEXT: stwu r1, -32(r1)1205; LARGE32-NEXT: stw r0, 40(r1)1206; LARGE32-NEXT: addis r3, L..C12@u(r2)1207; LARGE32-NEXT: lwz r4, L..C12@l(r3)1208; LARGE32-NEXT: bla .__get_tpointer[PR]1209; LARGE32-NEXT: stfdx f1, r3, r41210; LARGE32-NEXT: addi r1, r1, 321211; LARGE32-NEXT: lwz r0, 8(r1)1212; LARGE32-NEXT: mtlr r01213; LARGE32-NEXT: blr1214;1215; SMALL32-LABEL: store_global_double_zero:1216; SMALL32: # %bb.0: # %entry1217; SMALL32-NEXT: mflr r01218; SMALL32-NEXT: stwu r1, -32(r1)1219; SMALL32-NEXT: lwz r4, L..C12(r2) # target-flags(ppc-tprel) @global_double_zero1220; SMALL32-NEXT: bla .__get_tpointer[PR]1221; SMALL32-NEXT: stw r0, 40(r1)1222; SMALL32-NEXT: stfdx f1, r3, r41223; SMALL32-NEXT: addi r1, r1, 321224; SMALL32-NEXT: lwz r0, 8(r1)1225; SMALL32-NEXT: mtlr r01226; SMALL32-NEXT: blr1227entry:1228 %addr = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @global_double_zero)1229 store double %i, ptr %addr, align 81230 ret void1231}1232 1233define void @store_global_double_nonzero(double noundef %i) {1234; LARGE64-LABEL: store_global_double_nonzero:1235; LARGE64: # %bb.0: # %entry1236; LARGE64-NEXT: addis r3, L..C13@u(r2)1237; LARGE64-NEXT: ld r3, L..C13@l(r3)1238; LARGE64-NEXT: stfdx f1, r13, r31239; LARGE64-NEXT: blr1240;1241; SMALL64-LABEL: store_global_double_nonzero:1242; SMALL64: # %bb.0: # %entry1243; SMALL64-NEXT: ld r3, L..C13(r2) # target-flags(ppc-tprel) @global_double_nonzero1244; SMALL64-NEXT: stfdx f1, r13, r31245; SMALL64-NEXT: blr1246;1247; LARGE32-LABEL: store_global_double_nonzero:1248; LARGE32: # %bb.0: # %entry1249; LARGE32-NEXT: mflr r01250; LARGE32-NEXT: stwu r1, -32(r1)1251; LARGE32-NEXT: stw r0, 40(r1)1252; LARGE32-NEXT: addis r3, L..C13@u(r2)1253; LARGE32-NEXT: lwz r4, L..C13@l(r3)1254; LARGE32-NEXT: bla .__get_tpointer[PR]1255; LARGE32-NEXT: stfdx f1, r3, r41256; LARGE32-NEXT: addi r1, r1, 321257; LARGE32-NEXT: lwz r0, 8(r1)1258; LARGE32-NEXT: mtlr r01259; LARGE32-NEXT: blr1260;1261; SMALL32-LABEL: store_global_double_nonzero:1262; SMALL32: # %bb.0: # %entry1263; SMALL32-NEXT: mflr r01264; SMALL32-NEXT: stwu r1, -32(r1)1265; SMALL32-NEXT: lwz r4, L..C13(r2) # target-flags(ppc-tprel) @global_double_nonzero1266; SMALL32-NEXT: bla .__get_tpointer[PR]1267; SMALL32-NEXT: stw r0, 40(r1)1268; SMALL32-NEXT: stfdx f1, r3, r41269; SMALL32-NEXT: addi r1, r1, 321270; SMALL32-NEXT: lwz r0, 8(r1)1271; SMALL32-NEXT: mtlr r01272; SMALL32-NEXT: blr1273entry:1274 %addr = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @global_double_nonzero)1275 store double %i, ptr %addr, align 81276 ret void1277}1278 1279define void @store_intern_double_zero(double noundef %i) {1280; LARGE64-LABEL: store_intern_double_zero:1281; LARGE64: # %bb.0: # %entry1282; LARGE64-NEXT: addis r3, L..C14@u(r2)1283; LARGE64-NEXT: ld r3, L..C14@l(r3)1284; LARGE64-NEXT: stfdx f1, r13, r31285; LARGE64-NEXT: blr1286;1287; SMALL64-LABEL: store_intern_double_zero:1288; SMALL64: # %bb.0: # %entry1289; SMALL64-NEXT: ld r3, L..C14(r2) # target-flags(ppc-tprel) @intern_double_zero1290; SMALL64-NEXT: stfdx f1, r13, r31291; SMALL64-NEXT: blr1292;1293; LARGE32-LABEL: store_intern_double_zero:1294; LARGE32: # %bb.0: # %entry1295; LARGE32-NEXT: mflr r01296; LARGE32-NEXT: stwu r1, -32(r1)1297; LARGE32-NEXT: stw r0, 40(r1)1298; LARGE32-NEXT: addis r3, L..C14@u(r2)1299; LARGE32-NEXT: lwz r4, L..C14@l(r3)1300; LARGE32-NEXT: bla .__get_tpointer[PR]1301; LARGE32-NEXT: stfdx f1, r3, r41302; LARGE32-NEXT: addi r1, r1, 321303; LARGE32-NEXT: lwz r0, 8(r1)1304; LARGE32-NEXT: mtlr r01305; LARGE32-NEXT: blr1306;1307; SMALL32-LABEL: store_intern_double_zero:1308; SMALL32: # %bb.0: # %entry1309; SMALL32-NEXT: mflr r01310; SMALL32-NEXT: stwu r1, -32(r1)1311; SMALL32-NEXT: lwz r4, L..C14(r2) # target-flags(ppc-tprel) @intern_double_zero1312; SMALL32-NEXT: bla .__get_tpointer[PR]1313; SMALL32-NEXT: stw r0, 40(r1)1314; SMALL32-NEXT: stfdx f1, r3, r41315; SMALL32-NEXT: addi r1, r1, 321316; SMALL32-NEXT: lwz r0, 8(r1)1317; SMALL32-NEXT: mtlr r01318; SMALL32-NEXT: blr1319entry:1320 %addr = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @intern_double_zero)1321 store double %i, ptr %addr, align 81322 ret void1323}1324 1325define void @store_intern_double_nonzero(double noundef %i) {1326; LARGE64-LABEL: store_intern_double_nonzero:1327; LARGE64: # %bb.0: # %entry1328; LARGE64-NEXT: addis r3, L..C15@u(r2)1329; LARGE64-NEXT: ld r3, L..C15@l(r3)1330; LARGE64-NEXT: stfdx f1, r13, r31331; LARGE64-NEXT: blr1332;1333; SMALL64-LABEL: store_intern_double_nonzero:1334; SMALL64: # %bb.0: # %entry1335; SMALL64-NEXT: ld r3, L..C15(r2) # target-flags(ppc-tprel) @intern_double_nonzero1336; SMALL64-NEXT: stfdx f1, r13, r31337; SMALL64-NEXT: blr1338;1339; LARGE32-LABEL: store_intern_double_nonzero:1340; LARGE32: # %bb.0: # %entry1341; LARGE32-NEXT: mflr r01342; LARGE32-NEXT: stwu r1, -32(r1)1343; LARGE32-NEXT: stw r0, 40(r1)1344; LARGE32-NEXT: addis r3, L..C15@u(r2)1345; LARGE32-NEXT: lwz r4, L..C15@l(r3)1346; LARGE32-NEXT: bla .__get_tpointer[PR]1347; LARGE32-NEXT: stfdx f1, r3, r41348; LARGE32-NEXT: addi r1, r1, 321349; LARGE32-NEXT: lwz r0, 8(r1)1350; LARGE32-NEXT: mtlr r01351; LARGE32-NEXT: blr1352;1353; SMALL32-LABEL: store_intern_double_nonzero:1354; SMALL32: # %bb.0: # %entry1355; SMALL32-NEXT: mflr r01356; SMALL32-NEXT: stwu r1, -32(r1)1357; SMALL32-NEXT: lwz r4, L..C15(r2) # target-flags(ppc-tprel) @intern_double_nonzero1358; SMALL32-NEXT: bla .__get_tpointer[PR]1359; SMALL32-NEXT: stw r0, 40(r1)1360; SMALL32-NEXT: stfdx f1, r3, r41361; SMALL32-NEXT: addi r1, r1, 321362; SMALL32-NEXT: lwz r0, 8(r1)1363; SMALL32-NEXT: mtlr r01364; SMALL32-NEXT: blr1365entry:1366 %addr = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @intern_double_nonzero)1367 store double %i, ptr %addr, align 81368 ret void1369}1370 1371define double @load_global_double_zero() {1372; LARGE64-LABEL: load_global_double_zero:1373; LARGE64: # %bb.0: # %entry1374; LARGE64-NEXT: addis r3, L..C12@u(r2)1375; LARGE64-NEXT: ld r3, L..C12@l(r3)1376; LARGE64-NEXT: lfdx f1, r13, r31377; LARGE64-NEXT: blr1378;1379; SMALL64-LABEL: load_global_double_zero:1380; SMALL64: # %bb.0: # %entry1381; SMALL64-NEXT: ld r3, L..C12(r2) # target-flags(ppc-tprel) @global_double_zero1382; SMALL64-NEXT: lfdx f1, r13, r31383; SMALL64-NEXT: blr1384;1385; LARGE32-LABEL: load_global_double_zero:1386; LARGE32: # %bb.0: # %entry1387; LARGE32-NEXT: mflr r01388; LARGE32-NEXT: stwu r1, -32(r1)1389; LARGE32-NEXT: stw r0, 40(r1)1390; LARGE32-NEXT: addis r3, L..C12@u(r2)1391; LARGE32-NEXT: lwz r4, L..C12@l(r3)1392; LARGE32-NEXT: bla .__get_tpointer[PR]1393; LARGE32-NEXT: lfdx f1, r3, r41394; LARGE32-NEXT: addi r1, r1, 321395; LARGE32-NEXT: lwz r0, 8(r1)1396; LARGE32-NEXT: mtlr r01397; LARGE32-NEXT: blr1398;1399; SMALL32-LABEL: load_global_double_zero:1400; SMALL32: # %bb.0: # %entry1401; SMALL32-NEXT: mflr r01402; SMALL32-NEXT: stwu r1, -32(r1)1403; SMALL32-NEXT: lwz r4, L..C12(r2) # target-flags(ppc-tprel) @global_double_zero1404; SMALL32-NEXT: stw r0, 40(r1)1405; SMALL32-NEXT: bla .__get_tpointer[PR]1406; SMALL32-NEXT: lfdx f1, r3, r41407; SMALL32-NEXT: addi r1, r1, 321408; SMALL32-NEXT: lwz r0, 8(r1)1409; SMALL32-NEXT: mtlr r01410; SMALL32-NEXT: blr1411entry:1412 %addr = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @global_double_zero)1413 %val = load double, ptr %addr, align 81414 ret double %val1415}1416 1417define double @load_global_double_nonzero() {1418; LARGE64-LABEL: load_global_double_nonzero:1419; LARGE64: # %bb.0: # %entry1420; LARGE64-NEXT: addis r3, L..C13@u(r2)1421; LARGE64-NEXT: ld r3, L..C13@l(r3)1422; LARGE64-NEXT: lfdx f1, r13, r31423; LARGE64-NEXT: blr1424;1425; SMALL64-LABEL: load_global_double_nonzero:1426; SMALL64: # %bb.0: # %entry1427; SMALL64-NEXT: ld r3, L..C13(r2) # target-flags(ppc-tprel) @global_double_nonzero1428; SMALL64-NEXT: lfdx f1, r13, r31429; SMALL64-NEXT: blr1430;1431; LARGE32-LABEL: load_global_double_nonzero:1432; LARGE32: # %bb.0: # %entry1433; LARGE32-NEXT: mflr r01434; LARGE32-NEXT: stwu r1, -32(r1)1435; LARGE32-NEXT: stw r0, 40(r1)1436; LARGE32-NEXT: addis r3, L..C13@u(r2)1437; LARGE32-NEXT: lwz r4, L..C13@l(r3)1438; LARGE32-NEXT: bla .__get_tpointer[PR]1439; LARGE32-NEXT: lfdx f1, r3, r41440; LARGE32-NEXT: addi r1, r1, 321441; LARGE32-NEXT: lwz r0, 8(r1)1442; LARGE32-NEXT: mtlr r01443; LARGE32-NEXT: blr1444;1445; SMALL32-LABEL: load_global_double_nonzero:1446; SMALL32: # %bb.0: # %entry1447; SMALL32-NEXT: mflr r01448; SMALL32-NEXT: stwu r1, -32(r1)1449; SMALL32-NEXT: lwz r4, L..C13(r2) # target-flags(ppc-tprel) @global_double_nonzero1450; SMALL32-NEXT: stw r0, 40(r1)1451; SMALL32-NEXT: bla .__get_tpointer[PR]1452; SMALL32-NEXT: lfdx f1, r3, r41453; SMALL32-NEXT: addi r1, r1, 321454; SMALL32-NEXT: lwz r0, 8(r1)1455; SMALL32-NEXT: mtlr r01456; SMALL32-NEXT: blr1457entry:1458 %addr = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @global_double_nonzero)1459 %val = load double, ptr %addr, align 81460 ret double %val1461}1462 1463define double @load_intern_double_zero() {1464; LARGE64-LABEL: load_intern_double_zero:1465; LARGE64: # %bb.0: # %entry1466; LARGE64-NEXT: addis r3, L..C14@u(r2)1467; LARGE64-NEXT: ld r3, L..C14@l(r3)1468; LARGE64-NEXT: lfdx f1, r13, r31469; LARGE64-NEXT: blr1470;1471; SMALL64-LABEL: load_intern_double_zero:1472; SMALL64: # %bb.0: # %entry1473; SMALL64-NEXT: ld r3, L..C14(r2) # target-flags(ppc-tprel) @intern_double_zero1474; SMALL64-NEXT: lfdx f1, r13, r31475; SMALL64-NEXT: blr1476;1477; LARGE32-LABEL: load_intern_double_zero:1478; LARGE32: # %bb.0: # %entry1479; LARGE32-NEXT: mflr r01480; LARGE32-NEXT: stwu r1, -32(r1)1481; LARGE32-NEXT: stw r0, 40(r1)1482; LARGE32-NEXT: addis r3, L..C14@u(r2)1483; LARGE32-NEXT: lwz r4, L..C14@l(r3)1484; LARGE32-NEXT: bla .__get_tpointer[PR]1485; LARGE32-NEXT: lfdx f1, r3, r41486; LARGE32-NEXT: addi r1, r1, 321487; LARGE32-NEXT: lwz r0, 8(r1)1488; LARGE32-NEXT: mtlr r01489; LARGE32-NEXT: blr1490;1491; SMALL32-LABEL: load_intern_double_zero:1492; SMALL32: # %bb.0: # %entry1493; SMALL32-NEXT: mflr r01494; SMALL32-NEXT: stwu r1, -32(r1)1495; SMALL32-NEXT: lwz r4, L..C14(r2) # target-flags(ppc-tprel) @intern_double_zero1496; SMALL32-NEXT: stw r0, 40(r1)1497; SMALL32-NEXT: bla .__get_tpointer[PR]1498; SMALL32-NEXT: lfdx f1, r3, r41499; SMALL32-NEXT: addi r1, r1, 321500; SMALL32-NEXT: lwz r0, 8(r1)1501; SMALL32-NEXT: mtlr r01502; SMALL32-NEXT: blr1503entry:1504 %addr = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @intern_double_zero)1505 %val = load double, ptr %addr, align 81506 ret double %val1507}1508 1509define double @load_intern_double_nonzero() {1510; LARGE64-LABEL: load_intern_double_nonzero:1511; LARGE64: # %bb.0: # %entry1512; LARGE64-NEXT: addis r3, L..C15@u(r2)1513; LARGE64-NEXT: ld r3, L..C15@l(r3)1514; LARGE64-NEXT: lfdx f1, r13, r31515; LARGE64-NEXT: blr1516;1517; SMALL64-LABEL: load_intern_double_nonzero:1518; SMALL64: # %bb.0: # %entry1519; SMALL64-NEXT: ld r3, L..C15(r2) # target-flags(ppc-tprel) @intern_double_nonzero1520; SMALL64-NEXT: lfdx f1, r13, r31521; SMALL64-NEXT: blr1522;1523; LARGE32-LABEL: load_intern_double_nonzero:1524; LARGE32: # %bb.0: # %entry1525; LARGE32-NEXT: mflr r01526; LARGE32-NEXT: stwu r1, -32(r1)1527; LARGE32-NEXT: stw r0, 40(r1)1528; LARGE32-NEXT: addis r3, L..C15@u(r2)1529; LARGE32-NEXT: lwz r4, L..C15@l(r3)1530; LARGE32-NEXT: bla .__get_tpointer[PR]1531; LARGE32-NEXT: lfdx f1, r3, r41532; LARGE32-NEXT: addi r1, r1, 321533; LARGE32-NEXT: lwz r0, 8(r1)1534; LARGE32-NEXT: mtlr r01535; LARGE32-NEXT: blr1536;1537; SMALL32-LABEL: load_intern_double_nonzero:1538; SMALL32: # %bb.0: # %entry1539; SMALL32-NEXT: mflr r01540; SMALL32-NEXT: stwu r1, -32(r1)1541; SMALL32-NEXT: lwz r4, L..C15(r2) # target-flags(ppc-tprel) @intern_double_nonzero1542; SMALL32-NEXT: stw r0, 40(r1)1543; SMALL32-NEXT: bla .__get_tpointer[PR]1544; SMALL32-NEXT: lfdx f1, r3, r41545; SMALL32-NEXT: addi r1, r1, 321546; SMALL32-NEXT: lwz r0, 8(r1)1547; SMALL32-NEXT: mtlr r01548; SMALL32-NEXT: blr1549entry:1550 %addr = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @intern_double_nonzero)1551 %val = load double, ptr %addr, align 81552 ret double %val1553}1554 1555declare nonnull ptr @llvm.threadlocal.address.p0(ptr nonnull)1556 1557; Lines below check if the symbols have correct suffix for TLS model, not1558; generated by test update script, but kept well after updates.1559 1560; LARGE64: L..C0:1561; LARGE64-NEXT: .tc global_int_zero[TE],global_int_zero[TL]@ie1562; LARGE64-NEXT: L..C1:1563; LARGE64-NEXT: .tc global_int_nonzero[TE],global_int_nonzero[TL]@ie1564; LARGE64-NEXT: L..C2:1565; LARGE64-NEXT: .tc intern_int_zero[TE],intern_int_zero[UL]@ie1566; LARGE64-NEXT: L..C3:1567; LARGE64-NEXT: .tc intern_int_nonzero[TE],intern_int_nonzero[TL]@ie1568; LARGE64-NEXT: L..C4:1569; LARGE64-NEXT: .tc global_long_zero[TE],global_long_zero[TL]@ie1570; LARGE64-NEXT: L..C5:1571; LARGE64-NEXT: .tc global_long_nonzero[TE],global_long_nonzero[TL]@ie1572; LARGE64-NEXT: L..C6:1573; LARGE64-NEXT: .tc intern_long_zero[TE],intern_long_zero[UL]@ie1574; LARGE64-NEXT: L..C7:1575; LARGE64-NEXT: .tc intern_long_nonzero[TE],intern_long_nonzero[TL]@ie1576; LARGE64-NEXT: L..C8:1577; LARGE64-NEXT: .tc global_float_zero[TE],global_float_zero[TL]@ie1578; LARGE64-NEXT: L..C9:1579; LARGE64-NEXT: .tc global_float_nonzero[TE],global_float_nonzero[TL]@ie1580; LARGE64-NEXT: L..C10:1581; LARGE64-NEXT: .tc intern_float_zero[TE],intern_float_zero[UL]@ie1582; LARGE64-NEXT: L..C11:1583; LARGE64-NEXT: .tc intern_float_nonzero[TE],intern_float_nonzero[TL]@ie1584; LARGE64-NEXT: L..C12:1585; LARGE64-NEXT: .tc global_double_zero[TE],global_double_zero[TL]@ie1586; LARGE64-NEXT: L..C13:1587; LARGE64-NEXT: .tc global_double_nonzero[TE],global_double_nonzero[TL]@ie1588; LARGE64-NEXT: L..C14:1589; LARGE64-NEXT: .tc intern_double_zero[TE],intern_double_zero[UL]@ie1590; LARGE64-NEXT: L..C15:1591; LARGE64-NEXT: .tc intern_double_nonzero[TE],intern_double_nonzero[TL]@ie1592 1593; SMALL64: L..C0:1594; SMALL64-NEXT: .tc global_int_zero[TC],global_int_zero[TL]@ie1595; SMALL64-NEXT: L..C1:1596; SMALL64-NEXT: .tc global_int_nonzero[TC],global_int_nonzero[TL]@ie1597; SMALL64-NEXT: L..C2:1598; SMALL64-NEXT: .tc intern_int_zero[TC],intern_int_zero[UL]@ie1599; SMALL64-NEXT: L..C3:1600; SMALL64-NEXT: .tc intern_int_nonzero[TC],intern_int_nonzero[TL]@ie1601; SMALL64-NEXT: L..C4:1602; SMALL64-NEXT: .tc global_long_zero[TC],global_long_zero[TL]@ie1603; SMALL64-NEXT: L..C5:1604; SMALL64-NEXT: .tc global_long_nonzero[TC],global_long_nonzero[TL]@ie1605; SMALL64-NEXT: L..C6:1606; SMALL64-NEXT: .tc intern_long_zero[TC],intern_long_zero[UL]@ie1607; SMALL64-NEXT: L..C7:1608; SMALL64-NEXT: .tc intern_long_nonzero[TC],intern_long_nonzero[TL]@ie1609; SMALL64-NEXT: L..C8:1610; SMALL64-NEXT: .tc global_float_zero[TC],global_float_zero[TL]@ie1611; SMALL64-NEXT: L..C9:1612; SMALL64-NEXT: .tc global_float_nonzero[TC],global_float_nonzero[TL]@ie1613; SMALL64-NEXT: L..C10:1614; SMALL64-NEXT: .tc intern_float_zero[TC],intern_float_zero[UL]@ie1615; SMALL64-NEXT: L..C11:1616; SMALL64-NEXT: .tc intern_float_nonzero[TC],intern_float_nonzero[TL]@ie1617; SMALL64-NEXT: L..C12:1618; SMALL64-NEXT: .tc global_double_zero[TC],global_double_zero[TL]@ie1619; SMALL64-NEXT: L..C13:1620; SMALL64-NEXT: .tc global_double_nonzero[TC],global_double_nonzero[TL]@ie1621; SMALL64-NEXT: L..C14:1622; SMALL64-NEXT: .tc intern_double_zero[TC],intern_double_zero[UL]@ie1623; SMALL64-NEXT: L..C15:1624; SMALL64-NEXT: .tc intern_double_nonzero[TC],intern_double_nonzero[TL]@ie1625 1626; LARGE32: L..C0:1627; LARGE32-NEXT: .tc global_int_zero[TE],global_int_zero[TL]@ie1628; LARGE32-NEXT: L..C1:1629; LARGE32-NEXT: .tc global_int_nonzero[TE],global_int_nonzero[TL]@ie1630; LARGE32-NEXT: L..C2:1631; LARGE32-NEXT: .tc intern_int_zero[TE],intern_int_zero[UL]@ie1632; LARGE32-NEXT: L..C3:1633; LARGE32-NEXT: .tc intern_int_nonzero[TE],intern_int_nonzero[TL]@ie1634; LARGE32-NEXT: L..C4:1635; LARGE32-NEXT: .tc global_long_zero[TE],global_long_zero[TL]@ie1636; LARGE32-NEXT: L..C5:1637; LARGE32-NEXT: .tc global_long_nonzero[TE],global_long_nonzero[TL]@ie1638; LARGE32-NEXT: L..C6:1639; LARGE32-NEXT: .tc intern_long_zero[TE],intern_long_zero[UL]@ie1640; LARGE32-NEXT: L..C7:1641; LARGE32-NEXT: .tc intern_long_nonzero[TE],intern_long_nonzero[TL]@ie1642; LARGE32-NEXT: L..C8:1643; LARGE32-NEXT: .tc global_float_zero[TE],global_float_zero[TL]@ie1644; LARGE32-NEXT: L..C9:1645; LARGE32-NEXT: .tc global_float_nonzero[TE],global_float_nonzero[TL]@ie1646; LARGE32-NEXT: L..C10:1647; LARGE32-NEXT: .tc intern_float_zero[TE],intern_float_zero[UL]@ie1648; LARGE32-NEXT: L..C11:1649; LARGE32-NEXT: .tc intern_float_nonzero[TE],intern_float_nonzero[TL]@ie1650; LARGE32-NEXT: L..C12:1651; LARGE32-NEXT: .tc global_double_zero[TE],global_double_zero[TL]@ie1652; LARGE32-NEXT: L..C13:1653; LARGE32-NEXT: .tc global_double_nonzero[TE],global_double_nonzero[TL]@ie1654; LARGE32-NEXT: L..C14:1655; LARGE32-NEXT: .tc intern_double_zero[TE],intern_double_zero[UL]@ie1656; LARGE32-NEXT: L..C15:1657; LARGE32-NEXT: .tc intern_double_nonzero[TE],intern_double_nonzero[TL]@ie1658 1659; SMALL32: L..C0:1660; SMALL32-NEXT: .tc global_int_zero[TC],global_int_zero[TL]@ie1661; SMALL32-NEXT: L..C1:1662; SMALL32-NEXT: .tc global_int_nonzero[TC],global_int_nonzero[TL]@ie1663; SMALL32-NEXT: L..C2:1664; SMALL32-NEXT: .tc intern_int_zero[TC],intern_int_zero[UL]@ie1665; SMALL32-NEXT: L..C3:1666; SMALL32-NEXT: .tc intern_int_nonzero[TC],intern_int_nonzero[TL]@ie1667; SMALL32-NEXT: L..C4:1668; SMALL32-NEXT: .tc global_long_zero[TC],global_long_zero[TL]@ie1669; SMALL32-NEXT: L..C5:1670; SMALL32-NEXT: .tc global_long_nonzero[TC],global_long_nonzero[TL]@ie1671; SMALL32-NEXT: L..C6:1672; SMALL32-NEXT: .tc intern_long_zero[TC],intern_long_zero[UL]@ie1673; SMALL32-NEXT: L..C7:1674; SMALL32-NEXT: .tc intern_long_nonzero[TC],intern_long_nonzero[TL]@ie1675; SMALL32-NEXT: L..C8:1676; SMALL32-NEXT: .tc global_float_zero[TC],global_float_zero[TL]@ie1677; SMALL32-NEXT: L..C9:1678; SMALL32-NEXT: .tc global_float_nonzero[TC],global_float_nonzero[TL]@ie1679; SMALL32-NEXT: L..C10:1680; SMALL32-NEXT: .tc intern_float_zero[TC],intern_float_zero[UL]@ie1681; SMALL32-NEXT: L..C11:1682; SMALL32-NEXT: .tc intern_float_nonzero[TC],intern_float_nonzero[TL]@ie1683; SMALL32-NEXT: L..C12:1684; SMALL32-NEXT: .tc global_double_zero[TC],global_double_zero[TL]@ie1685; SMALL32-NEXT: L..C13:1686; SMALL32-NEXT: .tc global_double_nonzero[TC],global_double_nonzero[TL]@ie1687; SMALL32-NEXT: L..C14:1688; SMALL32-NEXT: .tc intern_double_zero[TC],intern_double_zero[UL]@ie1689; SMALL32-NEXT: L..C15:1690; SMALL32-NEXT: .tc intern_double_nonzero[TC],intern_double_nonzero[TL]@ie1691