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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=+altivec \3; RUN: -vec-extabi -mtriple powerpc-ibm-aix-xcoff < %s | \4; RUN: FileCheck %s --check-prefixes=32BIT,LITERAL5 6; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=+altivec \7; RUN: -vec-extabi -mtriple powerpc64-ibm-aix-xcoff < %s | \8; RUN: FileCheck %s --check-prefixes=64BIT,LITERAL9 10define dso_local i32 @vec_caller() {11; LITERAL: L..CPI0_0:12; LITERAL-NEXT: .vbyte 4, 5313; LITERAL-NEXT: .vbyte 4, 5414; LITERAL-NEXT: .vbyte 4, 5515; LITERAL-NEXT: .vbyte 4, 5616; LITERAL-NEXT: L..CPI0_1:17; LITERAL-NEXT: .vbyte 4, 4918; LITERAL-NEXT: .vbyte 4, 5019; LITERAL-NEXT: .vbyte 4, 5120; LITERAL-NEXT: .vbyte 4, 5221 22; 32BIT-LABEL: vec_caller:23; 32BIT: # %bb.0: # %entry24; 32BIT-NEXT: mflr 025; 32BIT-NEXT: stwu 1, -64(1)26; 32BIT-NEXT: lwz 3, L..C0(2) # %const.027; 32BIT-NEXT: stw 0, 72(1)28; 32BIT-NEXT: xxlxor 34, 34, 3429; 32BIT-NEXT: xxlxor 35, 35, 3530; 32BIT-NEXT: lxvw4x 0, 0, 331; 32BIT-NEXT: lwz 3, L..C1(2) # %const.132; 32BIT-NEXT: xxlxor 36, 36, 3633; 32BIT-NEXT: xxlxor 37, 37, 3734; 32BIT-NEXT: lxvw4x 1, 0, 335; 32BIT-NEXT: li 3, 4836; 32BIT-NEXT: xxlxor 38, 38, 3837; 32BIT-NEXT: xxlxor 39, 39, 3938; 32BIT-NEXT: xxlxor 40, 40, 4039; 32BIT-NEXT: stxvw4x 0, 1, 340; 32BIT-NEXT: li 3, 3241; 32BIT-NEXT: xxlxor 41, 41, 4142; 32BIT-NEXT: xxlxor 42, 42, 4243; 32BIT-NEXT: stxvw4x 1, 1, 344; 32BIT-NEXT: xxlxor 43, 43, 4345; 32BIT-NEXT: xxlxor 44, 44, 4446; 32BIT-NEXT: xxlxor 45, 45, 4547; 32BIT-NEXT: bl .vec_callee_stack[PR]48; 32BIT-NEXT: nop49; 32BIT-NEXT: addi 1, 1, 6450; 32BIT-NEXT: lwz 0, 8(1)51; 32BIT-NEXT: mtlr 052; 32BIT-NEXT: blr53;54; 64BIT-LABEL: vec_caller:55; 64BIT: # %bb.0: # %entry56; 64BIT-NEXT: mflr 057; 64BIT-NEXT: stdu 1, -112(1)58; 64BIT-NEXT: ld 3, L..C0(2) # %const.059; 64BIT-NEXT: std 0, 128(1)60; 64BIT-NEXT: xxlxor 34, 34, 3461; 64BIT-NEXT: xxlxor 35, 35, 3562; 64BIT-NEXT: lxvw4x 0, 0, 363; 64BIT-NEXT: ld 3, L..C1(2) # %const.164; 64BIT-NEXT: xxlxor 36, 36, 3665; 64BIT-NEXT: xxlxor 37, 37, 3766; 64BIT-NEXT: lxvw4x 1, 0, 367; 64BIT-NEXT: li 3, 6468; 64BIT-NEXT: xxlxor 38, 38, 3869; 64BIT-NEXT: xxlxor 39, 39, 3970; 64BIT-NEXT: xxlxor 40, 40, 4071; 64BIT-NEXT: stxvw4x 0, 1, 372; 64BIT-NEXT: li 3, 4873; 64BIT-NEXT: xxlxor 41, 41, 4174; 64BIT-NEXT: xxlxor 42, 42, 4275; 64BIT-NEXT: stxvw4x 1, 1, 376; 64BIT-NEXT: xxlxor 43, 43, 4377; 64BIT-NEXT: xxlxor 44, 44, 4478; 64BIT-NEXT: xxlxor 45, 45, 4579; 64BIT-NEXT: bl .vec_callee_stack[PR]80; 64BIT-NEXT: nop81; 64BIT-NEXT: addi 1, 1, 11282; 64BIT-NEXT: ld 0, 16(1)83; 64BIT-NEXT: mtlr 084; 64BIT-NEXT: blr85 86; LITERAL: .toc87; LITERAL: L..C0:88; LITERAL-NEXT: .tc L..CPI0_0[TC],L..CPI0_089; LITERAL-NEXT: L..C1:90; LITERAL-NEXT: .tc L..CPI0_1[TC],L..CPI0_191 92entry:93 %call = call i32 @vec_callee_stack(<4 x i32> <i32 0, i32 0, i32 0, i32 0>, <4 x i32> <i32 0, i32 0, i32 0, i32 0>, <4 x i32> <i32 0, i32 0, i32 0, i32 0>, <4 x i32> <i32 0, i32 0, i32 0, i32 0>, <4 x i32> <i32 0, i32 0, i32 0, i32 0>, <4 x i32> <i32 0, i32 0, i32 0, i32 0>, <4 x i32> <i32 0, i32 0, i32 0, i32 0>, <4 x i32> <i32 0, i32 0, i32 0, i32 0>, <4 x i32> <i32 0, i32 0, i32 0, i32 0>, <4 x i32> <i32 0, i32 0, i32 0, i32 0>, <4 x i32> <i32 0, i32 0, i32 0, i32 0>, <4 x i32> <i32 0, i32 0, i32 0, i32 0>, <4 x i32> <i32 49, i32 50, i32 51, i32 52>, <4 x i32> <i32 53, i32 54, i32 55, i32 56>)94 ret i32 %call95}96 97declare i32 @vec_callee_stack(...)98