89 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -mcpu=pwr7 \3; RUN: -verify-machineinstrs -O2 -mattr=vsx < %s | \4; RUN: FileCheck %s --check-prefix=CHECK-AIX5; RUN: llc -mtriple powerpc64le-unknown-linux-gnu -mcpu=pwr8 \6; RUN: -verify-machineinstrs -O2 -mattr=vsx < %s | \7; RUN: FileCheck %s8 9define void @test_aix_splatimm(i32 %arg, i32 %arg1, i32 %arg2) {10; CHECK-AIX-LABEL: test_aix_splatimm:11; CHECK-AIX: # %bb.0: # %bb12; CHECK-AIX-NEXT: bclr 12, 20, 013; CHECK-AIX-NEXT: # %bb.1: # %bb314; CHECK-AIX-NEXT: slwi 3, 3, 815; CHECK-AIX-NEXT: neg 3, 316; CHECK-AIX-NEXT: lwz 6, 0(3)17; CHECK-AIX-NEXT: sldi 3, 3, 4818; CHECK-AIX-NEXT: std 3, -16(1)19; CHECK-AIX-NEXT: std 3, -8(1)20; CHECK-AIX-NEXT: addi 3, 1, -1621; CHECK-AIX-NEXT: lxvw4x 34, 0, 322; CHECK-AIX-NEXT: srwi 3, 4, 1623; CHECK-AIX-NEXT: srwi 4, 5, 1624; CHECK-AIX-NEXT: mullw 3, 4, 325; CHECK-AIX-NEXT: srwi 4, 6, 126; CHECK-AIX-NEXT: mullw 3, 3, 427; CHECK-AIX-NEXT: li 4, 028; CHECK-AIX-NEXT: neg 3, 329; CHECK-AIX-NEXT: sldi 3, 3, 4830; CHECK-AIX-NEXT: vsplth 2, 2, 031; CHECK-AIX-NEXT: stxvw4x 34, 0, 432; CHECK-AIX-NEXT: std 3, -32(1)33; CHECK-AIX-NEXT: std 3, -24(1)34; CHECK-AIX-NEXT: addi 3, 1, -3235; CHECK-AIX-NEXT: lxvw4x 34, 0, 336; CHECK-AIX-NEXT: vsplth 2, 2, 037; CHECK-AIX-NEXT: stxvw4x 34, 0, 338;39; CHECK-LABEL: test_aix_splatimm:40; CHECK: # %bb.0: # %bb41; CHECK-NEXT: bclr 12, 20, 042; CHECK-NEXT: # %bb.1: # %bb343; CHECK-NEXT: slwi 3, 3, 844; CHECK-NEXT: srwi 4, 4, 1645; CHECK-NEXT: neg 3, 346; CHECK-NEXT: srwi 5, 5, 1647; CHECK-NEXT: mullw 4, 5, 448; CHECK-NEXT: lwz 5, 0(3)49; CHECK-NEXT: mtvsrd 34, 350; CHECK-NEXT: li 3, 051; CHECK-NEXT: srwi 5, 5, 152; CHECK-NEXT: mullw 4, 4, 553; CHECK-NEXT: neg 4, 454; CHECK-NEXT: mtvsrd 35, 455; CHECK-NEXT: vsplth 2, 2, 356; CHECK-NEXT: stxvd2x 34, 0, 357; CHECK-NEXT: vsplth 3, 3, 358; CHECK-NEXT: stxvd2x 35, 0, 359bb:60 br i1 undef, label %bb22, label %bb361 62bb3: ; preds = %bb63 %i = insertelement <8 x i16> undef, i16 0, i32 064 %i4 = trunc i32 %arg to i1665 %i5 = mul i16 %i4, -25666 %i6 = insertelement <8 x i16> %i, i16 %i5, i32 167 %i7 = ashr i32 %arg1, 1668 %i8 = ashr i32 %arg2, 1669 %i9 = mul nsw i32 %i8, %i770 %i10 = insertelement <8 x i16> %i6, i16 0, i32 271 %i11 = insertelement <8 x i16> %i10, i16 0, i32 372 %i12 = load i32, ptr undef, align 473 %i13 = ashr i32 %i12, 174 %i14 = mul i32 %i9, %i1375 %i15 = trunc i32 %i14 to i1676 %i16 = sub i16 0, %i1577 %i17 = insertelement <8 x i16> %i11, i16 %i16, i32 478 %i18 = insertelement <8 x i16> %i17, i16 0, i32 579 %i19 = bitcast <8 x i16> %i18 to <16 x i8>80 %i20 = shufflevector <16 x i8> %i19, <16 x i8> undef, <16 x i32> <i32 2, i32 3, i32 2, i32 3, i32 2, i32 3, i32 2, i32 3, i32 2, i32 3, i32 2, i32 3, i32 2, i32 3, i32 2, i32 3>81 store <16 x i8> %i20, ptr null, align 1682 %i21 = shufflevector <16 x i8> %i19, <16 x i8> undef, <16 x i32> <i32 8, i32 9, i32 8, i32 9, i32 8, i32 9, i32 8, i32 9, i32 8, i32 9, i32 8, i32 9, i32 8, i32 9, i32 8, i32 9>83 store <16 x i8> %i21, ptr undef, align 1684 unreachable85 86bb22: ; preds = %bb87 ret void88}89