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1; RUN: llc -verify-machineinstrs < %s -mcpu=pwr8 | FileCheck %s2 3target datalayout = "e-m:e-i64:64-n32:64"4target triple = "powerpc64le-unknown-linux-gnu"5 6; Function Attrs: nounwind7; Check that we accept 'U' and 'X' constraints.8; Generated from following C code:9;10; void foo (int result, char *addr) {11; __asm__ __volatile__ (12; "ld%U1%X1 %0,%1\n"13; "cmpw %0,%0\n"14; "bne- 1f\n"15; "1: isync\n"16; : "=r" (result)17; : "m"(*addr) : "memory", "cr0");18; }19 20define void @foo(i32 signext %result, ptr %addr) #0 {21 22; CHECK-LABEL: @foo23; CHECK: ld [[REG:[0-9]+]], 0(4)24; CHECK: cmpw [[REG]], [[REG]]25; CHECK: bne- 0, .Ltmp[[TMP:[0-9]+]]26; CHECK: .Ltmp[[TMP]]:27; CHECK: isync28 29entry:30 %result.addr = alloca i32, align 431 %addr.addr = alloca ptr, align 832 store i32 %result, ptr %result.addr, align 433 store ptr %addr, ptr %addr.addr, align 834 %0 = load ptr, ptr %addr.addr, align 835 %1 = call i32 asm sideeffect "ld${1:U}${1:X} $0,$1\0Acmpw $0,$0\0Abne- 1f\0A1: isync\0A", "=r,*m,~{memory},~{cr0}"(ptr elementtype(i8) %0) #1, !srcloc !036 store i32 %1, ptr %result.addr, align 437 ret void38}39 40; Function Attrs: nounwind41; Check that we accept the 'd' constraint.42; Generated from the following C code:43; int foo(double x) {44; int64_t result;45; __asm__ __volatile__("fctid %0, %1"46; : "=d"(result)47; : "d"(x)48; : /* No clobbers */);49; return result;50; }51define signext i32 @bar(double %x) #0 {52 53; CHECK-LABEL: @bar54; CHECK: fctid 0, 155entry:56 %x.addr = alloca double, align 857 %result = alloca i64, align 858 store double %x, ptr %x.addr, align 859 %0 = load double, ptr %x.addr, align 860 %1 = call i64 asm sideeffect "fctid $0, $1", "=d,d"(double %0) #1, !srcloc !161 store i64 %1, ptr %result, align 862 %2 = load i64, ptr %result, align 863 %conv = trunc i64 %2 to i3264 ret i32 %conv65}66 67 68attributes #0 = { nounwind "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="ppc64le" "target-features"="+altivec,+bpermd,+crypto,+direct-move,+extdiv,+power8-vector,+vsx" "use-soft-float"="false" }69 70attributes #1 = { nounwind }71 72!0 = !{i32 67, i32 91, i32 110, i32 126}73!1 = !{i32 84}74