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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mcpu=ppc -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s3 4define i8 @atomicrmw_usub_cond_i8(ptr %ptr, i8 %val) {5; CHECK-LABEL: atomicrmw_usub_cond_i8:6; CHECK: # %bb.0:7; CHECK-NEXT: sync8; CHECK-NEXT: rldicr 5, 3, 0, 619; CHECK-NEXT: not 3, 310; CHECK-NEXT: li 6, 25511; CHECK-NEXT: lwz 8, 0(5)12; CHECK-NEXT: rlwinm 3, 3, 3, 27, 2813; CHECK-NEXT: slw 6, 6, 314; CHECK-NEXT: not 6, 615; CHECK-NEXT: clrlwi 7, 4, 2416; CHECK-NEXT: .LBB0_1: # %atomicrmw.start17; CHECK-NEXT: # =>This Loop Header: Depth=118; CHECK-NEXT: # Child Loop BB0_4 Depth 219; CHECK-NEXT: srw 9, 8, 320; CHECK-NEXT: clrlwi 10, 9, 2421; CHECK-NEXT: cmplw 10, 722; CHECK-NEXT: blt 0, .LBB0_323; CHECK-NEXT: # %bb.2:24; CHECK-NEXT: sub 9, 9, 425; CHECK-NEXT: .LBB0_3: # %atomicrmw.start26; CHECK-NEXT: #27; CHECK-NEXT: clrlwi 9, 9, 2428; CHECK-NEXT: slw 9, 9, 329; CHECK-NEXT: and 10, 8, 630; CHECK-NEXT: or 10, 10, 931; CHECK-NEXT: .LBB0_4: # %cmpxchg.start32; CHECK-NEXT: # Parent Loop BB0_1 Depth=133; CHECK-NEXT: # => This Inner Loop Header: Depth=234; CHECK-NEXT: lwarx 9, 0, 535; CHECK-NEXT: cmplw 9, 836; CHECK-NEXT: bne- 0, .LBB0_737; CHECK-NEXT: # %bb.5: # %cmpxchg.fencedstore38; CHECK-NEXT: #39; CHECK-NEXT: stwcx. 10, 0, 540; CHECK-NEXT: creqv 20, 20, 2041; CHECK-NEXT: bne- 0, .LBB0_442; CHECK-NEXT: # %bb.6: # %cmpxchg.end43; CHECK-NEXT: #44; CHECK-NEXT: mr 8, 945; CHECK-NEXT: bc 4, 20, .LBB0_146; CHECK-NEXT: b .LBB0_847; CHECK-NEXT: .LBB0_7: # %cmpxchg.nostore48; CHECK-NEXT: #49; CHECK-NEXT: mr 8, 950; CHECK-NEXT: b .LBB0_151; CHECK-NEXT: .LBB0_8: # %atomicrmw.end52; CHECK-NEXT: srw 3, 9, 353; CHECK-NEXT: lwsync54; CHECK-NEXT: blr55 %result = atomicrmw usub_cond ptr %ptr, i8 %val seq_cst56 ret i8 %result57}58 59define i16 @atomicrmw_usub_cond_i16(ptr %ptr, i16 %val) {60; CHECK-LABEL: atomicrmw_usub_cond_i16:61; CHECK: # %bb.0:62; CHECK-NEXT: sync63; CHECK-NEXT: rldicr 5, 3, 0, 6164; CHECK-NEXT: clrlwi 3, 3, 3065; CHECK-NEXT: lis 6, 066; CHECK-NEXT: xori 3, 3, 267; CHECK-NEXT: lwz 8, 0(5)68; CHECK-NEXT: ori 6, 6, 6553569; CHECK-NEXT: slwi 3, 3, 370; CHECK-NEXT: slw 6, 6, 371; CHECK-NEXT: not 6, 672; CHECK-NEXT: clrlwi 7, 4, 1673; CHECK-NEXT: .LBB1_1: # %atomicrmw.start74; CHECK-NEXT: # =>This Loop Header: Depth=175; CHECK-NEXT: # Child Loop BB1_4 Depth 276; CHECK-NEXT: srw 9, 8, 377; CHECK-NEXT: clrlwi 10, 9, 1678; CHECK-NEXT: cmplw 10, 779; CHECK-NEXT: blt 0, .LBB1_380; CHECK-NEXT: # %bb.2:81; CHECK-NEXT: sub 9, 9, 482; CHECK-NEXT: .LBB1_3: # %atomicrmw.start83; CHECK-NEXT: #84; CHECK-NEXT: clrlwi 9, 9, 1685; CHECK-NEXT: slw 9, 9, 386; CHECK-NEXT: and 10, 8, 687; CHECK-NEXT: or 10, 10, 988; CHECK-NEXT: .LBB1_4: # %cmpxchg.start89; CHECK-NEXT: # Parent Loop BB1_1 Depth=190; CHECK-NEXT: # => This Inner Loop Header: Depth=291; CHECK-NEXT: lwarx 9, 0, 592; CHECK-NEXT: cmplw 9, 893; CHECK-NEXT: bne- 0, .LBB1_794; CHECK-NEXT: # %bb.5: # %cmpxchg.fencedstore95; CHECK-NEXT: #96; CHECK-NEXT: stwcx. 10, 0, 597; CHECK-NEXT: creqv 20, 20, 2098; CHECK-NEXT: bne- 0, .LBB1_499; CHECK-NEXT: # %bb.6: # %cmpxchg.end100; CHECK-NEXT: #101; CHECK-NEXT: mr 8, 9102; CHECK-NEXT: bc 4, 20, .LBB1_1103; CHECK-NEXT: b .LBB1_8104; CHECK-NEXT: .LBB1_7: # %cmpxchg.nostore105; CHECK-NEXT: #106; CHECK-NEXT: mr 8, 9107; CHECK-NEXT: b .LBB1_1108; CHECK-NEXT: .LBB1_8: # %atomicrmw.end109; CHECK-NEXT: srw 3, 9, 3110; CHECK-NEXT: lwsync111; CHECK-NEXT: blr112 %result = atomicrmw usub_cond ptr %ptr, i16 %val seq_cst113 ret i16 %result114}115 116define i32 @atomicrmw_usub_cond_i32(ptr %ptr, i32 %val) {117; CHECK-LABEL: atomicrmw_usub_cond_i32:118; CHECK: # %bb.0:119; CHECK-NEXT: sync120; CHECK-NEXT: lwz 6, 0(3)121; CHECK-NEXT: .LBB2_1: # %atomicrmw.start122; CHECK-NEXT: # =>This Loop Header: Depth=1123; CHECK-NEXT: # Child Loop BB2_4 Depth 2124; CHECK-NEXT: cmplw 6, 4125; CHECK-NEXT: bge 0, .LBB2_3126; CHECK-NEXT: # %bb.2: # %atomicrmw.start127; CHECK-NEXT: #128; CHECK-NEXT: mr 7, 6129; CHECK-NEXT: b .LBB2_4130; CHECK-NEXT: .LBB2_3:131; CHECK-NEXT: sub 7, 6, 4132; CHECK-NEXT: .LBB2_4: # %cmpxchg.start133; CHECK-NEXT: # Parent Loop BB2_1 Depth=1134; CHECK-NEXT: # => This Inner Loop Header: Depth=2135; CHECK-NEXT: lwarx 5, 0, 3136; CHECK-NEXT: cmplw 5, 6137; CHECK-NEXT: bne- 0, .LBB2_7138; CHECK-NEXT: # %bb.5: # %cmpxchg.fencedstore139; CHECK-NEXT: #140; CHECK-NEXT: stwcx. 7, 0, 3141; CHECK-NEXT: creqv 20, 20, 20142; CHECK-NEXT: bne- 0, .LBB2_4143; CHECK-NEXT: # %bb.6: # %cmpxchg.end144; CHECK-NEXT: #145; CHECK-NEXT: mr 6, 5146; CHECK-NEXT: bc 4, 20, .LBB2_1147; CHECK-NEXT: b .LBB2_8148; CHECK-NEXT: .LBB2_7: # %cmpxchg.nostore149; CHECK-NEXT: #150; CHECK-NEXT: mr 6, 5151; CHECK-NEXT: b .LBB2_1152; CHECK-NEXT: .LBB2_8: # %atomicrmw.end153; CHECK-NEXT: mr 3, 5154; CHECK-NEXT: lwsync155; CHECK-NEXT: blr156 %result = atomicrmw usub_cond ptr %ptr, i32 %val seq_cst157 ret i32 %result158}159 160define i64 @atomicrmw_usub_cond_i64(ptr %ptr, i64 %val) {161; CHECK-LABEL: atomicrmw_usub_cond_i64:162; CHECK: # %bb.0:163; CHECK-NEXT: sync164; CHECK-NEXT: ld 6, 0(3)165; CHECK-NEXT: .LBB3_1: # %atomicrmw.start166; CHECK-NEXT: # =>This Loop Header: Depth=1167; CHECK-NEXT: # Child Loop BB3_4 Depth 2168; CHECK-NEXT: cmpld 6, 4169; CHECK-NEXT: bge 0, .LBB3_3170; CHECK-NEXT: # %bb.2: # %atomicrmw.start171; CHECK-NEXT: #172; CHECK-NEXT: mr 7, 6173; CHECK-NEXT: b .LBB3_4174; CHECK-NEXT: .LBB3_3:175; CHECK-NEXT: sub 7, 6, 4176; CHECK-NEXT: .LBB3_4: # %cmpxchg.start177; CHECK-NEXT: # Parent Loop BB3_1 Depth=1178; CHECK-NEXT: # => This Inner Loop Header: Depth=2179; CHECK-NEXT: ldarx 5, 0, 3180; CHECK-NEXT: cmpld 5, 6181; CHECK-NEXT: bne- 0, .LBB3_7182; CHECK-NEXT: # %bb.5: # %cmpxchg.fencedstore183; CHECK-NEXT: #184; CHECK-NEXT: stdcx. 7, 0, 3185; CHECK-NEXT: creqv 20, 20, 20186; CHECK-NEXT: bne- 0, .LBB3_4187; CHECK-NEXT: # %bb.6: # %cmpxchg.end188; CHECK-NEXT: #189; CHECK-NEXT: mr 6, 5190; CHECK-NEXT: bc 4, 20, .LBB3_1191; CHECK-NEXT: b .LBB3_8192; CHECK-NEXT: .LBB3_7: # %cmpxchg.nostore193; CHECK-NEXT: #194; CHECK-NEXT: mr 6, 5195; CHECK-NEXT: b .LBB3_1196; CHECK-NEXT: .LBB3_8: # %atomicrmw.end197; CHECK-NEXT: mr 3, 5198; CHECK-NEXT: lwsync199; CHECK-NEXT: blr200 %result = atomicrmw usub_cond ptr %ptr, i64 %val seq_cst201 ret i64 %result202}203 204define i8 @atomicrmw_usub_sat_i8(ptr %ptr, i8 %val) {205; CHECK-LABEL: atomicrmw_usub_sat_i8:206; CHECK: # %bb.0:207; CHECK-NEXT: sync208; CHECK-NEXT: rldicr 5, 3, 0, 61209; CHECK-NEXT: not 3, 3210; CHECK-NEXT: li 6, 255211; CHECK-NEXT: lwz 7, 0(5)212; CHECK-NEXT: rlwinm 3, 3, 3, 27, 28213; CHECK-NEXT: slw 6, 6, 3214; CHECK-NEXT: not 6, 6215; CHECK-NEXT: clrlwi 4, 4, 24216; CHECK-NEXT: .LBB4_1: # %atomicrmw.start217; CHECK-NEXT: # =>This Loop Header: Depth=1218; CHECK-NEXT: # Child Loop BB4_4 Depth 2219; CHECK-NEXT: srw 8, 7, 3220; CHECK-NEXT: clrlwi 9, 8, 24221; CHECK-NEXT: sub 8, 9, 4222; CHECK-NEXT: cmplw 8, 9223; CHECK-NEXT: li 9, 0224; CHECK-NEXT: bgt 0, .LBB4_3225; CHECK-NEXT: # %bb.2: # %atomicrmw.start226; CHECK-NEXT: #227; CHECK-NEXT: mr 9, 8228; CHECK-NEXT: .LBB4_3: # %atomicrmw.start229; CHECK-NEXT: #230; CHECK-NEXT: slw 8, 9, 3231; CHECK-NEXT: and 9, 7, 6232; CHECK-NEXT: or 9, 9, 8233; CHECK-NEXT: .LBB4_4: # %cmpxchg.start234; CHECK-NEXT: # Parent Loop BB4_1 Depth=1235; CHECK-NEXT: # => This Inner Loop Header: Depth=2236; CHECK-NEXT: lwarx 8, 0, 5237; CHECK-NEXT: cmplw 8, 7238; CHECK-NEXT: bne- 0, .LBB4_7239; CHECK-NEXT: # %bb.5: # %cmpxchg.fencedstore240; CHECK-NEXT: #241; CHECK-NEXT: stwcx. 9, 0, 5242; CHECK-NEXT: creqv 20, 20, 20243; CHECK-NEXT: bne- 0, .LBB4_4244; CHECK-NEXT: # %bb.6: # %cmpxchg.end245; CHECK-NEXT: #246; CHECK-NEXT: mr 7, 8247; CHECK-NEXT: bc 4, 20, .LBB4_1248; CHECK-NEXT: b .LBB4_8249; CHECK-NEXT: .LBB4_7: # %cmpxchg.nostore250; CHECK-NEXT: #251; CHECK-NEXT: mr 7, 8252; CHECK-NEXT: b .LBB4_1253; CHECK-NEXT: .LBB4_8: # %atomicrmw.end254; CHECK-NEXT: srw 3, 8, 3255; CHECK-NEXT: lwsync256; CHECK-NEXT: blr257 %result = atomicrmw usub_sat ptr %ptr, i8 %val seq_cst258 ret i8 %result259}260 261define i16 @atomicrmw_usub_sat_i16(ptr %ptr, i16 %val) {262; CHECK-LABEL: atomicrmw_usub_sat_i16:263; CHECK: # %bb.0:264; CHECK-NEXT: sync265; CHECK-NEXT: rldicr 5, 3, 0, 61266; CHECK-NEXT: clrlwi 3, 3, 30267; CHECK-NEXT: lis 6, 0268; CHECK-NEXT: xori 3, 3, 2269; CHECK-NEXT: lwz 7, 0(5)270; CHECK-NEXT: ori 6, 6, 65535271; CHECK-NEXT: slwi 3, 3, 3272; CHECK-NEXT: slw 6, 6, 3273; CHECK-NEXT: not 6, 6274; CHECK-NEXT: clrlwi 4, 4, 16275; CHECK-NEXT: .LBB5_1: # %atomicrmw.start276; CHECK-NEXT: # =>This Loop Header: Depth=1277; CHECK-NEXT: # Child Loop BB5_4 Depth 2278; CHECK-NEXT: srw 8, 7, 3279; CHECK-NEXT: clrlwi 9, 8, 16280; CHECK-NEXT: sub 8, 9, 4281; CHECK-NEXT: cmplw 8, 9282; CHECK-NEXT: li 9, 0283; CHECK-NEXT: bgt 0, .LBB5_3284; CHECK-NEXT: # %bb.2: # %atomicrmw.start285; CHECK-NEXT: #286; CHECK-NEXT: mr 9, 8287; CHECK-NEXT: .LBB5_3: # %atomicrmw.start288; CHECK-NEXT: #289; CHECK-NEXT: slw 8, 9, 3290; CHECK-NEXT: and 9, 7, 6291; CHECK-NEXT: or 9, 9, 8292; CHECK-NEXT: .LBB5_4: # %cmpxchg.start293; CHECK-NEXT: # Parent Loop BB5_1 Depth=1294; CHECK-NEXT: # => This Inner Loop Header: Depth=2295; CHECK-NEXT: lwarx 8, 0, 5296; CHECK-NEXT: cmplw 8, 7297; CHECK-NEXT: bne- 0, .LBB5_7298; CHECK-NEXT: # %bb.5: # %cmpxchg.fencedstore299; CHECK-NEXT: #300; CHECK-NEXT: stwcx. 9, 0, 5301; CHECK-NEXT: creqv 20, 20, 20302; CHECK-NEXT: bne- 0, .LBB5_4303; CHECK-NEXT: # %bb.6: # %cmpxchg.end304; CHECK-NEXT: #305; CHECK-NEXT: mr 7, 8306; CHECK-NEXT: bc 4, 20, .LBB5_1307; CHECK-NEXT: b .LBB5_8308; CHECK-NEXT: .LBB5_7: # %cmpxchg.nostore309; CHECK-NEXT: #310; CHECK-NEXT: mr 7, 8311; CHECK-NEXT: b .LBB5_1312; CHECK-NEXT: .LBB5_8: # %atomicrmw.end313; CHECK-NEXT: srw 3, 8, 3314; CHECK-NEXT: lwsync315; CHECK-NEXT: blr316 %result = atomicrmw usub_sat ptr %ptr, i16 %val seq_cst317 ret i16 %result318}319 320define i32 @atomicrmw_usub_sat_i32(ptr %ptr, i32 %val) {321; CHECK-LABEL: atomicrmw_usub_sat_i32:322; CHECK: # %bb.0:323; CHECK-NEXT: sync324; CHECK-NEXT: lwz 6, 0(3)325; CHECK-NEXT: .LBB6_1: # %atomicrmw.start326; CHECK-NEXT: # =>This Loop Header: Depth=1327; CHECK-NEXT: # Child Loop BB6_3 Depth 2328; CHECK-NEXT: sub 5, 6, 4329; CHECK-NEXT: cmplw 5, 6330; CHECK-NEXT: li 7, 0331; CHECK-NEXT: bgt 0, .LBB6_3332; CHECK-NEXT: # %bb.2: # %atomicrmw.start333; CHECK-NEXT: #334; CHECK-NEXT: mr 7, 5335; CHECK-NEXT: .LBB6_3: # %cmpxchg.start336; CHECK-NEXT: # Parent Loop BB6_1 Depth=1337; CHECK-NEXT: # => This Inner Loop Header: Depth=2338; CHECK-NEXT: lwarx 5, 0, 3339; CHECK-NEXT: cmplw 5, 6340; CHECK-NEXT: bne- 0, .LBB6_6341; CHECK-NEXT: # %bb.4: # %cmpxchg.fencedstore342; CHECK-NEXT: #343; CHECK-NEXT: stwcx. 7, 0, 3344; CHECK-NEXT: creqv 20, 20, 20345; CHECK-NEXT: bne- 0, .LBB6_3346; CHECK-NEXT: # %bb.5: # %cmpxchg.end347; CHECK-NEXT: #348; CHECK-NEXT: mr 6, 5349; CHECK-NEXT: bc 4, 20, .LBB6_1350; CHECK-NEXT: b .LBB6_7351; CHECK-NEXT: .LBB6_6: # %cmpxchg.nostore352; CHECK-NEXT: #353; CHECK-NEXT: mr 6, 5354; CHECK-NEXT: b .LBB6_1355; CHECK-NEXT: .LBB6_7: # %atomicrmw.end356; CHECK-NEXT: mr 3, 5357; CHECK-NEXT: lwsync358; CHECK-NEXT: blr359 %result = atomicrmw usub_sat ptr %ptr, i32 %val seq_cst360 ret i32 %result361}362 363define i64 @atomicrmw_usub_sat_i64(ptr %ptr, i64 %val) {364; CHECK-LABEL: atomicrmw_usub_sat_i64:365; CHECK: # %bb.0:366; CHECK-NEXT: sync367; CHECK-NEXT: ld 6, 0(3)368; CHECK-NEXT: .LBB7_1: # %atomicrmw.start369; CHECK-NEXT: # =>This Loop Header: Depth=1370; CHECK-NEXT: # Child Loop BB7_3 Depth 2371; CHECK-NEXT: subc 5, 6, 4372; CHECK-NEXT: li 7, 0373; CHECK-NEXT: addze. 8, 7374; CHECK-NEXT: beq 0, .LBB7_3375; CHECK-NEXT: # %bb.2: # %atomicrmw.start376; CHECK-NEXT: #377; CHECK-NEXT: mr 7, 5378; CHECK-NEXT: .LBB7_3: # %cmpxchg.start379; CHECK-NEXT: # Parent Loop BB7_1 Depth=1380; CHECK-NEXT: # => This Inner Loop Header: Depth=2381; CHECK-NEXT: ldarx 5, 0, 3382; CHECK-NEXT: cmpld 5, 6383; CHECK-NEXT: bne- 0, .LBB7_6384; CHECK-NEXT: # %bb.4: # %cmpxchg.fencedstore385; CHECK-NEXT: #386; CHECK-NEXT: stdcx. 7, 0, 3387; CHECK-NEXT: creqv 20, 20, 20388; CHECK-NEXT: bne- 0, .LBB7_3389; CHECK-NEXT: # %bb.5: # %cmpxchg.end390; CHECK-NEXT: #391; CHECK-NEXT: mr 6, 5392; CHECK-NEXT: bc 4, 20, .LBB7_1393; CHECK-NEXT: b .LBB7_7394; CHECK-NEXT: .LBB7_6: # %cmpxchg.nostore395; CHECK-NEXT: #396; CHECK-NEXT: mr 6, 5397; CHECK-NEXT: b .LBB7_1398; CHECK-NEXT: .LBB7_7: # %atomicrmw.end399; CHECK-NEXT: mr 3, 5400; CHECK-NEXT: lwsync401; CHECK-NEXT: blr402 %result = atomicrmw usub_sat ptr %ptr, i64 %val seq_cst403 ret i64 %result404}405