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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mcpu=ppc -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s3 4define i8 @atomicrmw_uinc_wrap_i8(ptr %ptr, i8 %val) {5; CHECK-LABEL: atomicrmw_uinc_wrap_i8:6; CHECK:       # %bb.0:7; CHECK-NEXT:    sync8; CHECK-NEXT:    rldicr 5, 3, 0, 619; CHECK-NEXT:    not 3, 310; CHECK-NEXT:    li 6, 25511; CHECK-NEXT:    lwz 7, 0(5)12; CHECK-NEXT:    rlwinm 3, 3, 3, 27, 2813; CHECK-NEXT:    slw 6, 6, 314; CHECK-NEXT:    not 6, 615; CHECK-NEXT:    clrlwi 4, 4, 2416; CHECK-NEXT:  .LBB0_1: # %atomicrmw.start17; CHECK-NEXT:    # =>This Loop Header: Depth=118; CHECK-NEXT:    # Child Loop BB0_4 Depth 219; CHECK-NEXT:    srw 8, 7, 320; CHECK-NEXT:    clrlwi 9, 8, 2421; CHECK-NEXT:    cmplw 9, 422; CHECK-NEXT:    li 9, 023; CHECK-NEXT:    bge 0, .LBB0_324; CHECK-NEXT:  # %bb.2: # %atomicrmw.start25; CHECK-NEXT:    #26; CHECK-NEXT:    addi 9, 8, 127; CHECK-NEXT:  .LBB0_3: # %atomicrmw.start28; CHECK-NEXT:    #29; CHECK-NEXT:    clrlwi 8, 9, 2430; CHECK-NEXT:    slw 8, 8, 331; CHECK-NEXT:    and 9, 7, 632; CHECK-NEXT:    or 9, 9, 833; CHECK-NEXT:  .LBB0_4: # %cmpxchg.start34; CHECK-NEXT:    # Parent Loop BB0_1 Depth=135; CHECK-NEXT:    # => This Inner Loop Header: Depth=236; CHECK-NEXT:    lwarx 8, 0, 537; CHECK-NEXT:    cmplw 8, 738; CHECK-NEXT:    bne- 0, .LBB0_739; CHECK-NEXT:  # %bb.5: # %cmpxchg.fencedstore40; CHECK-NEXT:    #41; CHECK-NEXT:    stwcx. 9, 0, 542; CHECK-NEXT:    creqv 20, 20, 2043; CHECK-NEXT:    bne- 0, .LBB0_444; CHECK-NEXT:  # %bb.6: # %cmpxchg.end45; CHECK-NEXT:    #46; CHECK-NEXT:    mr 7, 847; CHECK-NEXT:    bc 4, 20, .LBB0_148; CHECK-NEXT:    b .LBB0_849; CHECK-NEXT:  .LBB0_7: # %cmpxchg.nostore50; CHECK-NEXT:    #51; CHECK-NEXT:    mr 7, 852; CHECK-NEXT:    b .LBB0_153; CHECK-NEXT:  .LBB0_8: # %atomicrmw.end54; CHECK-NEXT:    srw 3, 8, 355; CHECK-NEXT:    lwsync56; CHECK-NEXT:    blr57  %result = atomicrmw uinc_wrap ptr %ptr, i8 %val seq_cst58  ret i8 %result59}60 61define i16 @atomicrmw_uinc_wrap_i16(ptr %ptr, i16 %val) {62; CHECK-LABEL: atomicrmw_uinc_wrap_i16:63; CHECK:       # %bb.0:64; CHECK-NEXT:    sync65; CHECK-NEXT:    rldicr 5, 3, 0, 6166; CHECK-NEXT:    clrlwi 3, 3, 3067; CHECK-NEXT:    lis 6, 068; CHECK-NEXT:    xori 3, 3, 269; CHECK-NEXT:    lwz 7, 0(5)70; CHECK-NEXT:    ori 6, 6, 6553571; CHECK-NEXT:    slwi 3, 3, 372; CHECK-NEXT:    slw 6, 6, 373; CHECK-NEXT:    not 6, 674; CHECK-NEXT:    clrlwi 4, 4, 1675; CHECK-NEXT:  .LBB1_1: # %atomicrmw.start76; CHECK-NEXT:    # =>This Loop Header: Depth=177; CHECK-NEXT:    # Child Loop BB1_4 Depth 278; CHECK-NEXT:    srw 8, 7, 379; CHECK-NEXT:    clrlwi 9, 8, 1680; CHECK-NEXT:    cmplw 9, 481; CHECK-NEXT:    li 9, 082; CHECK-NEXT:    bge 0, .LBB1_383; CHECK-NEXT:  # %bb.2: # %atomicrmw.start84; CHECK-NEXT:    #85; CHECK-NEXT:    addi 9, 8, 186; CHECK-NEXT:  .LBB1_3: # %atomicrmw.start87; CHECK-NEXT:    #88; CHECK-NEXT:    clrlwi 8, 9, 1689; CHECK-NEXT:    slw 8, 8, 390; CHECK-NEXT:    and 9, 7, 691; CHECK-NEXT:    or 9, 9, 892; CHECK-NEXT:  .LBB1_4: # %cmpxchg.start93; CHECK-NEXT:    # Parent Loop BB1_1 Depth=194; CHECK-NEXT:    # => This Inner Loop Header: Depth=295; CHECK-NEXT:    lwarx 8, 0, 596; CHECK-NEXT:    cmplw 8, 797; CHECK-NEXT:    bne- 0, .LBB1_798; CHECK-NEXT:  # %bb.5: # %cmpxchg.fencedstore99; CHECK-NEXT:    #100; CHECK-NEXT:    stwcx. 9, 0, 5101; CHECK-NEXT:    creqv 20, 20, 20102; CHECK-NEXT:    bne- 0, .LBB1_4103; CHECK-NEXT:  # %bb.6: # %cmpxchg.end104; CHECK-NEXT:    #105; CHECK-NEXT:    mr 7, 8106; CHECK-NEXT:    bc 4, 20, .LBB1_1107; CHECK-NEXT:    b .LBB1_8108; CHECK-NEXT:  .LBB1_7: # %cmpxchg.nostore109; CHECK-NEXT:    #110; CHECK-NEXT:    mr 7, 8111; CHECK-NEXT:    b .LBB1_1112; CHECK-NEXT:  .LBB1_8: # %atomicrmw.end113; CHECK-NEXT:    srw 3, 8, 3114; CHECK-NEXT:    lwsync115; CHECK-NEXT:    blr116  %result = atomicrmw uinc_wrap ptr %ptr, i16 %val seq_cst117  ret i16 %result118}119 120define i32 @atomicrmw_uinc_wrap_i32(ptr %ptr, i32 %val) {121; CHECK-LABEL: atomicrmw_uinc_wrap_i32:122; CHECK:       # %bb.0:123; CHECK-NEXT:    sync124; CHECK-NEXT:    lwz 6, 0(3)125; CHECK-NEXT:  .LBB2_1: # %atomicrmw.start126; CHECK-NEXT:    # =>This Loop Header: Depth=1127; CHECK-NEXT:    # Child Loop BB2_3 Depth 2128; CHECK-NEXT:    cmplw 6, 4129; CHECK-NEXT:    li 7, 0130; CHECK-NEXT:    bge 0, .LBB2_3131; CHECK-NEXT:  # %bb.2: # %atomicrmw.start132; CHECK-NEXT:    #133; CHECK-NEXT:    addi 7, 6, 1134; CHECK-NEXT:  .LBB2_3: # %cmpxchg.start135; CHECK-NEXT:    # Parent Loop BB2_1 Depth=1136; CHECK-NEXT:    # => This Inner Loop Header: Depth=2137; CHECK-NEXT:    lwarx 5, 0, 3138; CHECK-NEXT:    cmplw 5, 6139; CHECK-NEXT:    bne- 0, .LBB2_6140; CHECK-NEXT:  # %bb.4: # %cmpxchg.fencedstore141; CHECK-NEXT:    #142; CHECK-NEXT:    stwcx. 7, 0, 3143; CHECK-NEXT:    creqv 20, 20, 20144; CHECK-NEXT:    bne- 0, .LBB2_3145; CHECK-NEXT:  # %bb.5: # %cmpxchg.end146; CHECK-NEXT:    #147; CHECK-NEXT:    mr 6, 5148; CHECK-NEXT:    bc 4, 20, .LBB2_1149; CHECK-NEXT:    b .LBB2_7150; CHECK-NEXT:  .LBB2_6: # %cmpxchg.nostore151; CHECK-NEXT:    #152; CHECK-NEXT:    mr 6, 5153; CHECK-NEXT:    b .LBB2_1154; CHECK-NEXT:  .LBB2_7: # %atomicrmw.end155; CHECK-NEXT:    mr 3, 5156; CHECK-NEXT:    lwsync157; CHECK-NEXT:    blr158  %result = atomicrmw uinc_wrap ptr %ptr, i32 %val seq_cst159  ret i32 %result160}161 162define i64 @atomicrmw_uinc_wrap_i64(ptr %ptr, i64 %val) {163; CHECK-LABEL: atomicrmw_uinc_wrap_i64:164; CHECK:       # %bb.0:165; CHECK-NEXT:    sync166; CHECK-NEXT:    ld 6, 0(3)167; CHECK-NEXT:  .LBB3_1: # %atomicrmw.start168; CHECK-NEXT:    # =>This Loop Header: Depth=1169; CHECK-NEXT:    # Child Loop BB3_3 Depth 2170; CHECK-NEXT:    cmpld 6, 4171; CHECK-NEXT:    li 7, 0172; CHECK-NEXT:    bge 0, .LBB3_3173; CHECK-NEXT:  # %bb.2: # %atomicrmw.start174; CHECK-NEXT:    #175; CHECK-NEXT:    addi 7, 6, 1176; CHECK-NEXT:  .LBB3_3: # %cmpxchg.start177; CHECK-NEXT:    # Parent Loop BB3_1 Depth=1178; CHECK-NEXT:    # => This Inner Loop Header: Depth=2179; CHECK-NEXT:    ldarx 5, 0, 3180; CHECK-NEXT:    cmpld 5, 6181; CHECK-NEXT:    bne- 0, .LBB3_6182; CHECK-NEXT:  # %bb.4: # %cmpxchg.fencedstore183; CHECK-NEXT:    #184; CHECK-NEXT:    stdcx. 7, 0, 3185; CHECK-NEXT:    creqv 20, 20, 20186; CHECK-NEXT:    bne- 0, .LBB3_3187; CHECK-NEXT:  # %bb.5: # %cmpxchg.end188; CHECK-NEXT:    #189; CHECK-NEXT:    mr 6, 5190; CHECK-NEXT:    bc 4, 20, .LBB3_1191; CHECK-NEXT:    b .LBB3_7192; CHECK-NEXT:  .LBB3_6: # %cmpxchg.nostore193; CHECK-NEXT:    #194; CHECK-NEXT:    mr 6, 5195; CHECK-NEXT:    b .LBB3_1196; CHECK-NEXT:  .LBB3_7: # %atomicrmw.end197; CHECK-NEXT:    mr 3, 5198; CHECK-NEXT:    lwsync199; CHECK-NEXT:    blr200  %result = atomicrmw uinc_wrap ptr %ptr, i64 %val seq_cst201  ret i64 %result202}203 204define i8 @atomicrmw_udec_wrap_i8(ptr %ptr, i8 %val) {205; CHECK-LABEL: atomicrmw_udec_wrap_i8:206; CHECK:       # %bb.0:207; CHECK-NEXT:    sync208; CHECK-NEXT:    rldicr 5, 3, 0, 61209; CHECK-NEXT:    not 3, 3210; CHECK-NEXT:    li 6, 255211; CHECK-NEXT:    lwz 8, 0(5)212; CHECK-NEXT:    rlwinm 3, 3, 3, 27, 28213; CHECK-NEXT:    slw 6, 6, 3214; CHECK-NEXT:    not 6, 6215; CHECK-NEXT:    clrlwi 7, 4, 24216; CHECK-NEXT:  .LBB4_1: # %atomicrmw.start217; CHECK-NEXT:    # =>This Loop Header: Depth=1218; CHECK-NEXT:    # Child Loop BB4_4 Depth 2219; CHECK-NEXT:    srw 9, 8, 3220; CHECK-NEXT:    andi. 10, 9, 255221; CHECK-NEXT:    cmplw 1, 10, 7222; CHECK-NEXT:    cror 20, 2, 5223; CHECK-NEXT:    mr 10, 4224; CHECK-NEXT:    bc 12, 20, .LBB4_3225; CHECK-NEXT:  # %bb.2: # %atomicrmw.start226; CHECK-NEXT:    #227; CHECK-NEXT:    addi 10, 9, -1228; CHECK-NEXT:  .LBB4_3: # %atomicrmw.start229; CHECK-NEXT:    #230; CHECK-NEXT:    clrlwi 9, 10, 24231; CHECK-NEXT:    slw 9, 9, 3232; CHECK-NEXT:    and 10, 8, 6233; CHECK-NEXT:    or 10, 10, 9234; CHECK-NEXT:  .LBB4_4: # %cmpxchg.start235; CHECK-NEXT:    # Parent Loop BB4_1 Depth=1236; CHECK-NEXT:    # => This Inner Loop Header: Depth=2237; CHECK-NEXT:    lwarx 9, 0, 5238; CHECK-NEXT:    cmplw 9, 8239; CHECK-NEXT:    bne- 0, .LBB4_7240; CHECK-NEXT:  # %bb.5: # %cmpxchg.fencedstore241; CHECK-NEXT:    #242; CHECK-NEXT:    stwcx. 10, 0, 5243; CHECK-NEXT:    creqv 20, 20, 20244; CHECK-NEXT:    bne- 0, .LBB4_4245; CHECK-NEXT:  # %bb.6: # %cmpxchg.end246; CHECK-NEXT:    #247; CHECK-NEXT:    mr 8, 9248; CHECK-NEXT:    bc 4, 20, .LBB4_1249; CHECK-NEXT:    b .LBB4_8250; CHECK-NEXT:  .LBB4_7: # %cmpxchg.nostore251; CHECK-NEXT:    #252; CHECK-NEXT:    mr 8, 9253; CHECK-NEXT:    b .LBB4_1254; CHECK-NEXT:  .LBB4_8: # %atomicrmw.end255; CHECK-NEXT:    srw 3, 9, 3256; CHECK-NEXT:    lwsync257; CHECK-NEXT:    blr258  %result = atomicrmw udec_wrap ptr %ptr, i8 %val seq_cst259  ret i8 %result260}261 262define i16 @atomicrmw_udec_wrap_i16(ptr %ptr, i16 %val) {263; CHECK-LABEL: atomicrmw_udec_wrap_i16:264; CHECK:       # %bb.0:265; CHECK-NEXT:    sync266; CHECK-NEXT:    rldicr 5, 3, 0, 61267; CHECK-NEXT:    clrlwi 3, 3, 30268; CHECK-NEXT:    lis 6, 0269; CHECK-NEXT:    xori 3, 3, 2270; CHECK-NEXT:    lwz 8, 0(5)271; CHECK-NEXT:    ori 6, 6, 65535272; CHECK-NEXT:    slwi 3, 3, 3273; CHECK-NEXT:    slw 6, 6, 3274; CHECK-NEXT:    not 6, 6275; CHECK-NEXT:    clrlwi 7, 4, 16276; CHECK-NEXT:  .LBB5_1: # %atomicrmw.start277; CHECK-NEXT:    # =>This Loop Header: Depth=1278; CHECK-NEXT:    # Child Loop BB5_4 Depth 2279; CHECK-NEXT:    srw 9, 8, 3280; CHECK-NEXT:    andi. 10, 9, 65535281; CHECK-NEXT:    cmplw 1, 10, 7282; CHECK-NEXT:    cror 20, 2, 5283; CHECK-NEXT:    mr 10, 4284; CHECK-NEXT:    bc 12, 20, .LBB5_3285; CHECK-NEXT:  # %bb.2: # %atomicrmw.start286; CHECK-NEXT:    #287; CHECK-NEXT:    addi 10, 9, -1288; CHECK-NEXT:  .LBB5_3: # %atomicrmw.start289; CHECK-NEXT:    #290; CHECK-NEXT:    clrlwi 9, 10, 16291; CHECK-NEXT:    slw 9, 9, 3292; CHECK-NEXT:    and 10, 8, 6293; CHECK-NEXT:    or 10, 10, 9294; CHECK-NEXT:  .LBB5_4: # %cmpxchg.start295; CHECK-NEXT:    # Parent Loop BB5_1 Depth=1296; CHECK-NEXT:    # => This Inner Loop Header: Depth=2297; CHECK-NEXT:    lwarx 9, 0, 5298; CHECK-NEXT:    cmplw 9, 8299; CHECK-NEXT:    bne- 0, .LBB5_7300; CHECK-NEXT:  # %bb.5: # %cmpxchg.fencedstore301; CHECK-NEXT:    #302; CHECK-NEXT:    stwcx. 10, 0, 5303; CHECK-NEXT:    creqv 20, 20, 20304; CHECK-NEXT:    bne- 0, .LBB5_4305; CHECK-NEXT:  # %bb.6: # %cmpxchg.end306; CHECK-NEXT:    #307; CHECK-NEXT:    mr 8, 9308; CHECK-NEXT:    bc 4, 20, .LBB5_1309; CHECK-NEXT:    b .LBB5_8310; CHECK-NEXT:  .LBB5_7: # %cmpxchg.nostore311; CHECK-NEXT:    #312; CHECK-NEXT:    mr 8, 9313; CHECK-NEXT:    b .LBB5_1314; CHECK-NEXT:  .LBB5_8: # %atomicrmw.end315; CHECK-NEXT:    srw 3, 9, 3316; CHECK-NEXT:    lwsync317; CHECK-NEXT:    blr318  %result = atomicrmw udec_wrap ptr %ptr, i16 %val seq_cst319  ret i16 %result320}321 322define i32 @atomicrmw_udec_wrap_i32(ptr %ptr, i32 %val) {323; CHECK-LABEL: atomicrmw_udec_wrap_i32:324; CHECK:       # %bb.0:325; CHECK-NEXT:    sync326; CHECK-NEXT:    lwz 6, 0(3)327; CHECK-NEXT:  .LBB6_1: # %atomicrmw.start328; CHECK-NEXT:    # =>This Loop Header: Depth=1329; CHECK-NEXT:    # Child Loop BB6_4 Depth 2330; CHECK-NEXT:    cmpwi 6, 0331; CHECK-NEXT:    mr 7, 4332; CHECK-NEXT:    bc 12, 2, .LBB6_4333; CHECK-NEXT:  # %bb.2: # %atomicrmw.start334; CHECK-NEXT:    #335; CHECK-NEXT:    cmplw 6, 4336; CHECK-NEXT:    mr 7, 4337; CHECK-NEXT:    bc 12, 1, .LBB6_4338; CHECK-NEXT:  # %bb.3: # %atomicrmw.start339; CHECK-NEXT:    #340; CHECK-NEXT:    addi 7, 6, -1341; CHECK-NEXT:  .LBB6_4: # %cmpxchg.start342; CHECK-NEXT:    # Parent Loop BB6_1 Depth=1343; CHECK-NEXT:    # => This Inner Loop Header: Depth=2344; CHECK-NEXT:    lwarx 5, 0, 3345; CHECK-NEXT:    cmplw 5, 6346; CHECK-NEXT:    bne- 0, .LBB6_7347; CHECK-NEXT:  # %bb.5: # %cmpxchg.fencedstore348; CHECK-NEXT:    #349; CHECK-NEXT:    stwcx. 7, 0, 3350; CHECK-NEXT:    creqv 20, 20, 20351; CHECK-NEXT:    bne- 0, .LBB6_4352; CHECK-NEXT:  # %bb.6: # %cmpxchg.end353; CHECK-NEXT:    #354; CHECK-NEXT:    mr 6, 5355; CHECK-NEXT:    bc 4, 20, .LBB6_1356; CHECK-NEXT:    b .LBB6_8357; CHECK-NEXT:  .LBB6_7: # %cmpxchg.nostore358; CHECK-NEXT:    #359; CHECK-NEXT:    mr 6, 5360; CHECK-NEXT:    b .LBB6_1361; CHECK-NEXT:  .LBB6_8: # %atomicrmw.end362; CHECK-NEXT:    mr 3, 5363; CHECK-NEXT:    lwsync364; CHECK-NEXT:    blr365  %result = atomicrmw udec_wrap ptr %ptr, i32 %val seq_cst366  ret i32 %result367}368 369define i64 @atomicrmw_udec_wrap_i64(ptr %ptr, i64 %val) {370; CHECK-LABEL: atomicrmw_udec_wrap_i64:371; CHECK:       # %bb.0:372; CHECK-NEXT:    sync373; CHECK-NEXT:    ld 6, 0(3)374; CHECK-NEXT:  .LBB7_1: # %atomicrmw.start375; CHECK-NEXT:    # =>This Loop Header: Depth=1376; CHECK-NEXT:    # Child Loop BB7_4 Depth 2377; CHECK-NEXT:    cmpdi 6, 0378; CHECK-NEXT:    mr 7, 4379; CHECK-NEXT:    bc 12, 2, .LBB7_4380; CHECK-NEXT:  # %bb.2: # %atomicrmw.start381; CHECK-NEXT:    #382; CHECK-NEXT:    cmpld 6, 4383; CHECK-NEXT:    mr 7, 4384; CHECK-NEXT:    bc 12, 1, .LBB7_4385; CHECK-NEXT:  # %bb.3: # %atomicrmw.start386; CHECK-NEXT:    #387; CHECK-NEXT:    addi 7, 6, -1388; CHECK-NEXT:  .LBB7_4: # %cmpxchg.start389; CHECK-NEXT:    # Parent Loop BB7_1 Depth=1390; CHECK-NEXT:    # => This Inner Loop Header: Depth=2391; CHECK-NEXT:    ldarx 5, 0, 3392; CHECK-NEXT:    cmpld 5, 6393; CHECK-NEXT:    bne- 0, .LBB7_7394; CHECK-NEXT:  # %bb.5: # %cmpxchg.fencedstore395; CHECK-NEXT:    #396; CHECK-NEXT:    stdcx. 7, 0, 3397; CHECK-NEXT:    creqv 20, 20, 20398; CHECK-NEXT:    bne- 0, .LBB7_4399; CHECK-NEXT:  # %bb.6: # %cmpxchg.end400; CHECK-NEXT:    #401; CHECK-NEXT:    mr 6, 5402; CHECK-NEXT:    bc 4, 20, .LBB7_1403; CHECK-NEXT:    b .LBB7_8404; CHECK-NEXT:  .LBB7_7: # %cmpxchg.nostore405; CHECK-NEXT:    #406; CHECK-NEXT:    mr 6, 5407; CHECK-NEXT:    b .LBB7_1408; CHECK-NEXT:  .LBB7_8: # %atomicrmw.end409; CHECK-NEXT:    mr 3, 5410; CHECK-NEXT:    lwsync411; CHECK-NEXT:    blr412  %result = atomicrmw udec_wrap ptr %ptr, i64 %val seq_cst413  ret i64 %result414}415