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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-unknown-linux-gnu -verify-machineinstrs -ppc-asm-full-reg-names | FileCheck %s --check-prefix=CHECK --check-prefix=PPC323; This is already checked for in Atomics-64.ll4; RUN: llc -verify-machineinstrs < %s -mcpu=ppc -mtriple=powerpc64-unknown-linux-gnu -ppc-asm-full-reg-names | FileCheck %s --check-prefix=CHECK --check-prefix=PPC645 6; FIXME: we don't currently check for the operations themselves with CHECK-NEXT,7; because they are implemented in a very messy way with lwarx/stwcx.8; It should be fixed soon in another patch.9 10; We first check loads, for all sizes from i8 to i64.11; We also vary orderings to check for barriers.12define i8 @load_i8_unordered(ptr %mem) {13; CHECK-LABEL: load_i8_unordered:14; CHECK: # %bb.0:15; CHECK-NEXT: lbz r3, 0(r3)16; CHECK-NEXT: blr17 %val = load atomic i8, ptr %mem unordered, align 118 ret i8 %val19}20define i16 @load_i16_monotonic(ptr %mem) {21; CHECK-LABEL: load_i16_monotonic:22; CHECK: # %bb.0:23; CHECK-NEXT: lhz r3, 0(r3)24; CHECK-NEXT: blr25 %val = load atomic i16, ptr %mem monotonic, align 226 ret i16 %val27}28define i32 @load_i32_acquire(ptr %mem) {29; PPC32-LABEL: load_i32_acquire:30; PPC32: # %bb.0:31; PPC32-NEXT: lwz r3, 0(r3)32; PPC32-NEXT: cmpw cr7, r3, r333; PPC32-NEXT: bne- cr7, .+434; PPC32-NEXT: isync35; PPC32-NEXT: blr36;37; PPC64-LABEL: load_i32_acquire:38; PPC64: # %bb.0:39; PPC64-NEXT: lwz r3, 0(r3)40; PPC64-NEXT: cmpd cr7, r3, r341; PPC64-NEXT: bne- cr7, .+442; PPC64-NEXT: isync43; PPC64-NEXT: blr44 %val = load atomic i32, ptr %mem acquire, align 445; CHECK-PPC32: lwsync46; CHECK-PPC64: cmpw [[CR:cr[0-9]+]], [[VAL]], [[VAL]]47; CHECK-PPC64: bne- [[CR]], .+448; CHECK-PPC64: isync49 ret i32 %val50}51define i64 @load_i64_seq_cst(ptr %mem) {52; PPC32-LABEL: load_i64_seq_cst:53; PPC32: # %bb.0:54; PPC32-NEXT: mflr r055; PPC32-NEXT: stwu r1, -16(r1)56; PPC32-NEXT: stw r0, 20(r1)57; PPC32-NEXT: .cfi_def_cfa_offset 1658; PPC32-NEXT: .cfi_offset lr, 459; PPC32-NEXT: li r4, 560; PPC32-NEXT: bl __atomic_load_861; PPC32-NEXT: lwz r0, 20(r1)62; PPC32-NEXT: addi r1, r1, 1663; PPC32-NEXT: mtlr r064; PPC32-NEXT: blr65;66; PPC64-LABEL: load_i64_seq_cst:67; PPC64: # %bb.0:68; PPC64-NEXT: sync69; PPC64-NEXT: ld r3, 0(r3)70; PPC64-NEXT: cmpd cr7, r3, r371; PPC64-NEXT: bne- cr7, .+472; PPC64-NEXT: isync73; PPC64-NEXT: blr74 %val = load atomic i64, ptr %mem seq_cst, align 875; CHECK-PPC32: lwsync76; CHECK-PPC64: cmpw [[CR:cr[0-9]+]], [[VAL]], [[VAL]]77; CHECK-PPC64: bne- [[CR]], .+478; CHECK-PPC64: isync79 ret i64 %val80}81 82; Stores83define void @store_i8_unordered(ptr %mem) {84; CHECK-LABEL: store_i8_unordered:85; CHECK: # %bb.0:86; CHECK-NEXT: li r4, 4287; CHECK-NEXT: stb r4, 0(r3)88; CHECK-NEXT: blr89 store atomic i8 42, ptr %mem unordered, align 190 ret void91}92define void @store_i16_monotonic(ptr %mem) {93; CHECK-LABEL: store_i16_monotonic:94; CHECK: # %bb.0:95; CHECK-NEXT: li r4, 4296; CHECK-NEXT: sth r4, 0(r3)97; CHECK-NEXT: blr98 store atomic i16 42, ptr %mem monotonic, align 299 ret void100}101define void @store_i32_release(ptr %mem) {102; CHECK-LABEL: store_i32_release:103; CHECK: # %bb.0:104; CHECK-NEXT: li r4, 42105; CHECK-NEXT: lwsync106; CHECK-NEXT: stw r4, 0(r3)107; CHECK-NEXT: blr108 store atomic i32 42, ptr %mem release, align 4109 ret void110}111define void @store_i64_seq_cst(ptr %mem) {112; PPC32-LABEL: store_i64_seq_cst:113; PPC32: # %bb.0:114; PPC32-NEXT: mflr r0115; PPC32-NEXT: stwu r1, -16(r1)116; PPC32-NEXT: stw r0, 20(r1)117; PPC32-NEXT: .cfi_def_cfa_offset 16118; PPC32-NEXT: .cfi_offset lr, 4119; PPC32-NEXT: li r5, 0120; PPC32-NEXT: li r6, 42121; PPC32-NEXT: li r7, 5122; PPC32-NEXT: bl __atomic_store_8123; PPC32-NEXT: lwz r0, 20(r1)124; PPC32-NEXT: addi r1, r1, 16125; PPC32-NEXT: mtlr r0126; PPC32-NEXT: blr127;128; PPC64-LABEL: store_i64_seq_cst:129; PPC64: # %bb.0:130; PPC64-NEXT: li r4, 42131; PPC64-NEXT: sync132; PPC64-NEXT: std r4, 0(r3)133; PPC64-NEXT: blr134 store atomic i64 42, ptr %mem seq_cst, align 8135 ret void136}137 138; Atomic CmpXchg139define i8 @cas_strong_i8_sc_sc(ptr %mem) {140; PPC32-LABEL: cas_strong_i8_sc_sc:141; PPC32: # %bb.0: # %cmpxchg.start142; PPC32-NEXT: rlwinm r5, r3, 0, 0, 29143; PPC32-NEXT: lwarx r4, 0, r5144; PPC32-NEXT: not r3, r3145; PPC32-NEXT: rlwinm r3, r3, 3, 27, 28146; PPC32-NEXT: srw r6, r4, r3147; PPC32-NEXT: andi. r6, r6, 255148; PPC32-NEXT: bne- cr0, .LBB8_4149; PPC32-NEXT: # %bb.1: # %cmpxchg.fencedstore150; PPC32-NEXT: li r6, 255151; PPC32-NEXT: li r7, 1152; PPC32-NEXT: slw r6, r6, r3153; PPC32-NEXT: not r6, r6154; PPC32-NEXT: slw r7, r7, r3155; PPC32-NEXT: sync156; PPC32-NEXT: .LBB8_2: # %cmpxchg.trystore157; PPC32-NEXT: #158; PPC32-NEXT: and r8, r4, r6159; PPC32-NEXT: or r8, r8, r7160; PPC32-NEXT: stwcx. r8, 0, r5161; PPC32-NEXT: beq+ cr0, .LBB8_4162; PPC32-NEXT: # %bb.3: # %cmpxchg.releasedload163; PPC32-NEXT: #164; PPC32-NEXT: lwarx r4, 0, r5165; PPC32-NEXT: srw r8, r4, r3166; PPC32-NEXT: andi. r8, r8, 255167; PPC32-NEXT: beq+ cr0, .LBB8_2168; PPC32-NEXT: .LBB8_4: # %cmpxchg.nostore169; PPC32-NEXT: srw r3, r4, r3170; PPC32-NEXT: lwsync171; PPC32-NEXT: blr172;173; PPC64-LABEL: cas_strong_i8_sc_sc:174; PPC64: # %bb.0: # %cmpxchg.start175; PPC64-NEXT: rldicr r5, r3, 0, 61176; PPC64-NEXT: not r3, r3177; PPC64-NEXT: lwarx r4, 0, r5178; PPC64-NEXT: rlwinm r3, r3, 3, 27, 28179; PPC64-NEXT: srw r6, r4, r3180; PPC64-NEXT: andi. r6, r6, 255181; PPC64-NEXT: bne- cr0, .LBB8_4182; PPC64-NEXT: # %bb.1: # %cmpxchg.fencedstore183; PPC64-NEXT: li r6, 255184; PPC64-NEXT: li r7, 1185; PPC64-NEXT: slw r6, r6, r3186; PPC64-NEXT: not r6, r6187; PPC64-NEXT: slw r7, r7, r3188; PPC64-NEXT: sync189; PPC64-NEXT: .LBB8_2: # %cmpxchg.trystore190; PPC64-NEXT: #191; PPC64-NEXT: and r8, r4, r6192; PPC64-NEXT: or r8, r8, r7193; PPC64-NEXT: stwcx. r8, 0, r5194; PPC64-NEXT: beq+ cr0, .LBB8_4195; PPC64-NEXT: # %bb.3: # %cmpxchg.releasedload196; PPC64-NEXT: #197; PPC64-NEXT: lwarx r4, 0, r5198; PPC64-NEXT: srw r8, r4, r3199; PPC64-NEXT: andi. r8, r8, 255200; PPC64-NEXT: beq+ cr0, .LBB8_2201; PPC64-NEXT: .LBB8_4: # %cmpxchg.nostore202; PPC64-NEXT: srw r3, r4, r3203; PPC64-NEXT: lwsync204; PPC64-NEXT: blr205 %val = cmpxchg ptr %mem, i8 0, i8 1 seq_cst seq_cst206 %loaded = extractvalue { i8, i1} %val, 0207 ret i8 %loaded208}209define i16 @cas_weak_i16_acquire_acquire(ptr %mem) {210; PPC32-LABEL: cas_weak_i16_acquire_acquire:211; PPC32: # %bb.0: # %cmpxchg.start212; PPC32-NEXT: rlwinm r4, r3, 0, 0, 29213; PPC32-NEXT: lwarx r5, 0, r4214; PPC32-NEXT: clrlwi r3, r3, 30215; PPC32-NEXT: xori r3, r3, 2216; PPC32-NEXT: slwi r6, r3, 3217; PPC32-NEXT: srw r3, r5, r6218; PPC32-NEXT: andi. r7, r3, 65535219; PPC32-NEXT: bne- cr0, .LBB9_2220; PPC32-NEXT: # %bb.1: # %cmpxchg.fencedstore221; PPC32-NEXT: lis r7, 0222; PPC32-NEXT: ori r7, r7, 65535223; PPC32-NEXT: slw r7, r7, r6224; PPC32-NEXT: li r8, 1225; PPC32-NEXT: not r7, r7226; PPC32-NEXT: slw r6, r8, r6227; PPC32-NEXT: and r5, r5, r7228; PPC32-NEXT: or r5, r5, r6229; PPC32-NEXT: stwcx. r5, 0, r4230; PPC32-NEXT: .LBB9_2: # %cmpxchg.failure231; PPC32-NEXT: lwsync232; PPC32-NEXT: blr233;234; PPC64-LABEL: cas_weak_i16_acquire_acquire:235; PPC64: # %bb.0: # %cmpxchg.start236; PPC64-NEXT: rldicr r4, r3, 0, 61237; PPC64-NEXT: clrlwi r3, r3, 30238; PPC64-NEXT: lwarx r5, 0, r4239; PPC64-NEXT: xori r3, r3, 2240; PPC64-NEXT: slwi r6, r3, 3241; PPC64-NEXT: srw r3, r5, r6242; PPC64-NEXT: andi. r7, r3, 65535243; PPC64-NEXT: bne- cr0, .LBB9_2244; PPC64-NEXT: # %bb.1: # %cmpxchg.fencedstore245; PPC64-NEXT: lis r7, 0246; PPC64-NEXT: ori r7, r7, 65535247; PPC64-NEXT: slw r7, r7, r6248; PPC64-NEXT: li r8, 1249; PPC64-NEXT: not r7, r7250; PPC64-NEXT: slw r6, r8, r6251; PPC64-NEXT: and r5, r5, r7252; PPC64-NEXT: or r5, r5, r6253; PPC64-NEXT: stwcx. r5, 0, r4254; PPC64-NEXT: .LBB9_2: # %cmpxchg.failure255; PPC64-NEXT: lwsync256; PPC64-NEXT: blr257 %val = cmpxchg weak ptr %mem, i16 0, i16 1 acquire acquire258 %loaded = extractvalue { i16, i1} %val, 0259 ret i16 %loaded260}261define i32 @cas_strong_i32_acqrel_acquire(ptr %mem) {262; CHECK-LABEL: cas_strong_i32_acqrel_acquire:263; CHECK: # %bb.0: # %cmpxchg.start264; CHECK-NEXT: mr r4, r3265; CHECK-NEXT: lwarx r3, 0, r3266; CHECK-NEXT: cmplwi r3, 0267; CHECK-NEXT: bne- cr0, .LBB10_4268; CHECK-NEXT: # %bb.1: # %cmpxchg.fencedstore269; CHECK-NEXT: li r5, 1270; CHECK-NEXT: lwsync271; CHECK-NEXT: .LBB10_2: # %cmpxchg.trystore272; CHECK-NEXT: #273; CHECK-NEXT: stwcx. r5, 0, r4274; CHECK-NEXT: beq+ cr0, .LBB10_4275; CHECK-NEXT: # %bb.3: # %cmpxchg.releasedload276; CHECK-NEXT: #277; CHECK-NEXT: lwarx r3, 0, r4278; CHECK-NEXT: cmplwi r3, 0279; CHECK-NEXT: beq+ cr0, .LBB10_2280; CHECK-NEXT: .LBB10_4: # %cmpxchg.nostore281; CHECK-NEXT: lwsync282; CHECK-NEXT: blr283 %val = cmpxchg ptr %mem, i32 0, i32 1 acq_rel acquire284 %loaded = extractvalue { i32, i1} %val, 0285 ret i32 %loaded286}287define i64 @cas_weak_i64_release_monotonic(ptr %mem) {288; PPC32-LABEL: cas_weak_i64_release_monotonic:289; PPC32: # %bb.0:290; PPC32-NEXT: mflr r0291; PPC32-NEXT: stwu r1, -16(r1)292; PPC32-NEXT: stw r0, 20(r1)293; PPC32-NEXT: .cfi_def_cfa_offset 16294; PPC32-NEXT: .cfi_offset lr, 4295; PPC32-NEXT: li r4, 0296; PPC32-NEXT: stw r4, 12(r1)297; PPC32-NEXT: li r5, 0298; PPC32-NEXT: stw r4, 8(r1)299; PPC32-NEXT: addi r4, r1, 8300; PPC32-NEXT: li r6, 1301; PPC32-NEXT: li r7, 3302; PPC32-NEXT: li r8, 0303; PPC32-NEXT: bl __atomic_compare_exchange_8304; PPC32-NEXT: lwz r4, 12(r1)305; PPC32-NEXT: lwz r3, 8(r1)306; PPC32-NEXT: lwz r0, 20(r1)307; PPC32-NEXT: addi r1, r1, 16308; PPC32-NEXT: mtlr r0309; PPC32-NEXT: blr310;311; PPC64-LABEL: cas_weak_i64_release_monotonic:312; PPC64: # %bb.0: # %cmpxchg.start313; PPC64-NEXT: mr r4, r3314; PPC64-NEXT: ldarx r3, 0, r3315; PPC64-NEXT: cmpldi r3, 0316; PPC64-NEXT: bnelr- cr0317; PPC64-NEXT: # %bb.1: # %cmpxchg.fencedstore318; PPC64-NEXT: li r5, 1319; PPC64-NEXT: lwsync320; PPC64-NEXT: stdcx. r5, 0, r4321; PPC64-NEXT: blr322 %val = cmpxchg weak ptr %mem, i64 0, i64 1 release monotonic323 %loaded = extractvalue { i64, i1} %val, 0324 ret i64 %loaded325}326 327; AtomicRMW328define i8 @add_i8_monotonic(ptr %mem, i8 %operand) {329; PPC32-LABEL: add_i8_monotonic:330; PPC32: # %bb.0:331; PPC32-NEXT: rlwinm r7, r3, 3, 27, 28332; PPC32-NEXT: li r6, 255333; PPC32-NEXT: rlwinm r5, r3, 0, 0, 29334; PPC32-NEXT: xori r3, r7, 24335; PPC32-NEXT: slw r4, r4, r3336; PPC32-NEXT: slw r6, r6, r3337; PPC32-NEXT: .LBB12_1:338; PPC32-NEXT: lwarx r7, 0, r5339; PPC32-NEXT: add r8, r4, r7340; PPC32-NEXT: andc r9, r7, r6341; PPC32-NEXT: and r8, r8, r6342; PPC32-NEXT: or r8, r8, r9343; PPC32-NEXT: stwcx. r8, 0, r5344; PPC32-NEXT: bne- cr0, .LBB12_1345; PPC32-NEXT: # %bb.2:346; PPC32-NEXT: srw r3, r7, r3347; PPC32-NEXT: clrlwi r3, r3, 24348; PPC32-NEXT: blr349;350; PPC64-LABEL: add_i8_monotonic:351; PPC64: # %bb.0:352; PPC64-NEXT: rlwinm r7, r3, 3, 27, 28353; PPC64-NEXT: li r6, 255354; PPC64-NEXT: rldicr r5, r3, 0, 61355; PPC64-NEXT: xori r3, r7, 24356; PPC64-NEXT: slw r4, r4, r3357; PPC64-NEXT: slw r6, r6, r3358; PPC64-NEXT: .LBB12_1:359; PPC64-NEXT: lwarx r7, 0, r5360; PPC64-NEXT: add r8, r4, r7361; PPC64-NEXT: andc r9, r7, r6362; PPC64-NEXT: and r8, r8, r6363; PPC64-NEXT: or r8, r8, r9364; PPC64-NEXT: stwcx. r8, 0, r5365; PPC64-NEXT: bne- cr0, .LBB12_1366; PPC64-NEXT: # %bb.2:367; PPC64-NEXT: srw r3, r7, r3368; PPC64-NEXT: clrlwi r3, r3, 24369; PPC64-NEXT: blr370 %val = atomicrmw add ptr %mem, i8 %operand monotonic371 ret i8 %val372}373define i16 @xor_i16_seq_cst(ptr %mem, i16 %operand) {374; PPC32-LABEL: xor_i16_seq_cst:375; PPC32: # %bb.0:376; PPC32-NEXT: li r5, 0377; PPC32-NEXT: rlwinm r6, r3, 3, 27, 27378; PPC32-NEXT: ori r7, r5, 65535379; PPC32-NEXT: xori r5, r6, 16380; PPC32-NEXT: rlwinm r3, r3, 0, 0, 29381; PPC32-NEXT: slw r4, r4, r5382; PPC32-NEXT: slw r6, r7, r5383; PPC32-NEXT: sync384; PPC32-NEXT: .LBB13_1:385; PPC32-NEXT: lwarx r7, 0, r3386; PPC32-NEXT: xor r8, r4, r7387; PPC32-NEXT: andc r9, r7, r6388; PPC32-NEXT: and r8, r8, r6389; PPC32-NEXT: or r8, r8, r9390; PPC32-NEXT: stwcx. r8, 0, r3391; PPC32-NEXT: bne- cr0, .LBB13_1392; PPC32-NEXT: # %bb.2:393; PPC32-NEXT: srw r3, r7, r5394; PPC32-NEXT: clrlwi r3, r3, 16395; PPC32-NEXT: lwsync396; PPC32-NEXT: blr397;398; PPC64-LABEL: xor_i16_seq_cst:399; PPC64: # %bb.0:400; PPC64-NEXT: li r5, 0401; PPC64-NEXT: rlwinm r6, r3, 3, 27, 27402; PPC64-NEXT: ori r7, r5, 65535403; PPC64-NEXT: xori r5, r6, 16404; PPC64-NEXT: rldicr r3, r3, 0, 61405; PPC64-NEXT: slw r4, r4, r5406; PPC64-NEXT: slw r6, r7, r5407; PPC64-NEXT: sync408; PPC64-NEXT: .LBB13_1:409; PPC64-NEXT: lwarx r7, 0, r3410; PPC64-NEXT: xor r8, r4, r7411; PPC64-NEXT: andc r9, r7, r6412; PPC64-NEXT: and r8, r8, r6413; PPC64-NEXT: or r8, r8, r9414; PPC64-NEXT: stwcx. r8, 0, r3415; PPC64-NEXT: bne- cr0, .LBB13_1416; PPC64-NEXT: # %bb.2:417; PPC64-NEXT: srw r3, r7, r5418; PPC64-NEXT: clrlwi r3, r3, 16419; PPC64-NEXT: lwsync420; PPC64-NEXT: blr421 %val = atomicrmw xor ptr %mem, i16 %operand seq_cst422 ret i16 %val423}424define i32 @xchg_i32_acq_rel(ptr %mem, i32 %operand) {425; CHECK-LABEL: xchg_i32_acq_rel:426; CHECK: # %bb.0:427; CHECK-NEXT: lwsync428; CHECK-NEXT: .LBB14_1:429; CHECK-NEXT: lwarx r5, 0, r3430; CHECK-NEXT: stwcx. r4, 0, r3431; CHECK-NEXT: bne- cr0, .LBB14_1432; CHECK-NEXT: # %bb.2:433; CHECK-NEXT: mr r3, r5434; CHECK-NEXT: lwsync435; CHECK-NEXT: blr436 %val = atomicrmw xchg ptr %mem, i32 %operand acq_rel437 ret i32 %val438}439define i64 @and_i64_release(ptr %mem, i64 %operand) {440; PPC32-LABEL: and_i64_release:441; PPC32: # %bb.0:442; PPC32-NEXT: mflr r0443; PPC32-NEXT: stwu r1, -16(r1)444; PPC32-NEXT: stw r0, 20(r1)445; PPC32-NEXT: .cfi_def_cfa_offset 16446; PPC32-NEXT: .cfi_offset lr, 4447; PPC32-NEXT: li r7, 3448; PPC32-NEXT: bl __atomic_fetch_and_8449; PPC32-NEXT: lwz r0, 20(r1)450; PPC32-NEXT: addi r1, r1, 16451; PPC32-NEXT: mtlr r0452; PPC32-NEXT: blr453;454; PPC64-LABEL: and_i64_release:455; PPC64: # %bb.0:456; PPC64-NEXT: lwsync457; PPC64-NEXT: .LBB15_1:458; PPC64-NEXT: ldarx r5, 0, r3459; PPC64-NEXT: and r6, r4, r5460; PPC64-NEXT: stdcx. r6, 0, r3461; PPC64-NEXT: bne- cr0, .LBB15_1462; PPC64-NEXT: # %bb.2:463; PPC64-NEXT: mr r3, r5464; PPC64-NEXT: blr465 %val = atomicrmw and ptr %mem, i64 %operand release466 ret i64 %val467}468 469define half @load_atomic_f16__seq_cst(ptr %ptr) {470; PPC32-LABEL: load_atomic_f16__seq_cst:471; PPC32: # %bb.0:472; PPC32-NEXT: mflr r0473; PPC32-NEXT: stwu r1, -16(r1)474; PPC32-NEXT: stw r0, 20(r1)475; PPC32-NEXT: .cfi_def_cfa_offset 16476; PPC32-NEXT: .cfi_offset lr, 4477; PPC32-NEXT: sync478; PPC32-NEXT: lhz r3, 0(r3)479; PPC32-NEXT: cmpw cr7, r3, r3480; PPC32-NEXT: bne- cr7, .+4481; PPC32-NEXT: isync482; PPC32-NEXT: bl __extendhfsf2483; PPC32-NEXT: lwz r0, 20(r1)484; PPC32-NEXT: addi r1, r1, 16485; PPC32-NEXT: mtlr r0486; PPC32-NEXT: blr487;488; PPC64-LABEL: load_atomic_f16__seq_cst:489; PPC64: # %bb.0:490; PPC64-NEXT: mflr r0491; PPC64-NEXT: stdu r1, -112(r1)492; PPC64-NEXT: std r0, 128(r1)493; PPC64-NEXT: .cfi_def_cfa_offset 112494; PPC64-NEXT: .cfi_offset lr, 16495; PPC64-NEXT: sync496; PPC64-NEXT: lhz r3, 0(r3)497; PPC64-NEXT: cmpd cr7, r3, r3498; PPC64-NEXT: bne- cr7, .+4499; PPC64-NEXT: isync500; PPC64-NEXT: bl __extendhfsf2501; PPC64-NEXT: nop502; PPC64-NEXT: addi r1, r1, 112503; PPC64-NEXT: ld r0, 16(r1)504; PPC64-NEXT: mtlr r0505; PPC64-NEXT: blr506 %val = load atomic half, ptr %ptr seq_cst, align 2507 ret half %val508}509 510; FIXME: bf16_to_fp fails to select511; define bfloat @load_atomic_bf16__seq_cst(ptr %ptr) {512; %val = load atomic bfloat, ptr %ptr seq_cst, align 2513; ret bfloat %val514; }515 516define float @load_atomic_f32__seq_cst(ptr %ptr) {517; PPC32-LABEL: load_atomic_f32__seq_cst:518; PPC32: # %bb.0:519; PPC32-NEXT: stwu r1, -16(r1)520; PPC32-NEXT: .cfi_def_cfa_offset 16521; PPC32-NEXT: sync522; PPC32-NEXT: lwz r3, 0(r3)523; PPC32-NEXT: cmpw cr7, r3, r3524; PPC32-NEXT: bne- cr7, .+4525; PPC32-NEXT: isync526; PPC32-NEXT: stw r3, 12(r1)527; PPC32-NEXT: lfs f1, 12(r1)528; PPC32-NEXT: addi r1, r1, 16529; PPC32-NEXT: blr530;531; PPC64-LABEL: load_atomic_f32__seq_cst:532; PPC64: # %bb.0:533; PPC64-NEXT: sync534; PPC64-NEXT: lwz r3, 0(r3)535; PPC64-NEXT: cmpd cr7, r3, r3536; PPC64-NEXT: bne- cr7, .+4537; PPC64-NEXT: isync538; PPC64-NEXT: stw r3, -4(r1)539; PPC64-NEXT: lfs f1, -4(r1)540; PPC64-NEXT: blr541 %val = load atomic float, ptr %ptr seq_cst, align 4542 ret float %val543}544 545define double @load_atomic_f64__seq_cst(ptr %ptr) {546; PPC32-LABEL: load_atomic_f64__seq_cst:547; PPC32: # %bb.0:548; PPC32-NEXT: mflr r0549; PPC32-NEXT: stwu r1, -16(r1)550; PPC32-NEXT: stw r0, 20(r1)551; PPC32-NEXT: .cfi_def_cfa_offset 16552; PPC32-NEXT: .cfi_offset lr, 4553; PPC32-NEXT: li r4, 5554; PPC32-NEXT: bl __atomic_load_8555; PPC32-NEXT: stw r4, 12(r1)556; PPC32-NEXT: stw r3, 8(r1)557; PPC32-NEXT: lfd f1, 8(r1)558; PPC32-NEXT: lwz r0, 20(r1)559; PPC32-NEXT: addi r1, r1, 16560; PPC32-NEXT: mtlr r0561; PPC32-NEXT: blr562;563; PPC64-LABEL: load_atomic_f64__seq_cst:564; PPC64: # %bb.0:565; PPC64-NEXT: sync566; PPC64-NEXT: ld r3, 0(r3)567; PPC64-NEXT: cmpd cr7, r3, r3568; PPC64-NEXT: bne- cr7, .+4569; PPC64-NEXT: isync570; PPC64-NEXT: std r3, -8(r1)571; PPC64-NEXT: lfd f1, -8(r1)572; PPC64-NEXT: blr573 %val = load atomic double, ptr %ptr seq_cst, align 8574 ret double %val575}576 577define void @store_atomic_f16__seq_cst(ptr %ptr, half %val1) {578; PPC32-LABEL: store_atomic_f16__seq_cst:579; PPC32: # %bb.0:580; PPC32-NEXT: mflr r0581; PPC32-NEXT: stwu r1, -16(r1)582; PPC32-NEXT: stw r0, 20(r1)583; PPC32-NEXT: .cfi_def_cfa_offset 16584; PPC32-NEXT: .cfi_offset lr, 4585; PPC32-NEXT: .cfi_offset r30, -8586; PPC32-NEXT: stw r30, 8(r1) # 4-byte Folded Spill587; PPC32-NEXT: mr r30, r3588; PPC32-NEXT: bl __truncsfhf2589; PPC32-NEXT: sync590; PPC32-NEXT: sth r3, 0(r30)591; PPC32-NEXT: lwz r30, 8(r1) # 4-byte Folded Reload592; PPC32-NEXT: lwz r0, 20(r1)593; PPC32-NEXT: addi r1, r1, 16594; PPC32-NEXT: mtlr r0595; PPC32-NEXT: blr596;597; PPC64-LABEL: store_atomic_f16__seq_cst:598; PPC64: # %bb.0:599; PPC64-NEXT: mflr r0600; PPC64-NEXT: stdu r1, -128(r1)601; PPC64-NEXT: std r0, 144(r1)602; PPC64-NEXT: .cfi_def_cfa_offset 128603; PPC64-NEXT: .cfi_offset lr, 16604; PPC64-NEXT: .cfi_offset r30, -16605; PPC64-NEXT: std r30, 112(r1) # 8-byte Folded Spill606; PPC64-NEXT: mr r30, r3607; PPC64-NEXT: bl __truncsfhf2608; PPC64-NEXT: nop609; PPC64-NEXT: sync610; PPC64-NEXT: sth r3, 0(r30)611; PPC64-NEXT: ld r30, 112(r1) # 8-byte Folded Reload612; PPC64-NEXT: addi r1, r1, 128613; PPC64-NEXT: ld r0, 16(r1)614; PPC64-NEXT: mtlr r0615; PPC64-NEXT: blr616 store atomic half %val1, ptr %ptr seq_cst, align 2617 ret void618}619 620; FIXME: bf16_to_fp fails to select621; define void @store_atomic_bf16__seq_cst(ptr %ptr, bfloat %val1) {622; store atomic bfloat %val1, ptr %ptr seq_cst, align 2623; ret void624; }625 626define void @store_atomic_f32__seq_cst(ptr %ptr, float %val1) {627; PPC32-LABEL: store_atomic_f32__seq_cst:628; PPC32: # %bb.0:629; PPC32-NEXT: stwu r1, -16(r1)630; PPC32-NEXT: .cfi_def_cfa_offset 16631; PPC32-NEXT: stfs f1, 12(r1)632; PPC32-NEXT: lwz r4, 12(r1)633; PPC32-NEXT: sync634; PPC32-NEXT: stw r4, 0(r3)635; PPC32-NEXT: addi r1, r1, 16636; PPC32-NEXT: blr637;638; PPC64-LABEL: store_atomic_f32__seq_cst:639; PPC64: # %bb.0:640; PPC64-NEXT: stfs f1, -4(r1)641; PPC64-NEXT: lwz r4, -4(r1)642; PPC64-NEXT: sync643; PPC64-NEXT: stw r4, 0(r3)644; PPC64-NEXT: blr645 store atomic float %val1, ptr %ptr seq_cst, align 4646 ret void647}648 649define void @store_atomic_f64__seq_cst(ptr %ptr, double %val1) {650; PPC32-LABEL: store_atomic_f64__seq_cst:651; PPC32: # %bb.0:652; PPC32-NEXT: mflr r0653; PPC32-NEXT: stwu r1, -16(r1)654; PPC32-NEXT: stw r0, 20(r1)655; PPC32-NEXT: .cfi_def_cfa_offset 16656; PPC32-NEXT: .cfi_offset lr, 4657; PPC32-NEXT: stfd f1, 8(r1)658; PPC32-NEXT: li r7, 5659; PPC32-NEXT: lwz r5, 8(r1)660; PPC32-NEXT: lwz r6, 12(r1)661; PPC32-NEXT: bl __atomic_store_8662; PPC32-NEXT: lwz r0, 20(r1)663; PPC32-NEXT: addi r1, r1, 16664; PPC32-NEXT: mtlr r0665; PPC32-NEXT: blr666;667; PPC64-LABEL: store_atomic_f64__seq_cst:668; PPC64: # %bb.0:669; PPC64-NEXT: stfd f1, -8(r1)670; PPC64-NEXT: ld r4, -8(r1)671; PPC64-NEXT: sync672; PPC64-NEXT: std r4, 0(r3)673; PPC64-NEXT: blr674 store atomic double %val1, ptr %ptr seq_cst, align 8675 ret void676}677