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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \3; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names \4; RUN: -ppc-vsr-nums-as-vr < %s | FileCheck %s5; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \6; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names \7; RUN: -ppc-vsr-nums-as-vr < %s | FileCheck %s --check-prefix=CHECK-BE8 9; Function Attrs: nofree nounwind writeonly10define dso_local void @test50(ptr nocapture readnone %vqp, ptr nocapture readnone %vpp, <16 x i8> %vc, ptr nocapture %resp) {11; CHECK-LABEL: test50:12; CHECK: # %bb.0: # %entry13; CHECK-NEXT: xvbf16ger2 acc0, v2, v214; CHECK-NEXT: xxmfacc acc015; CHECK-NEXT: stxv vs0, 48(r7)16; CHECK-NEXT: stxv vs1, 32(r7)17; CHECK-NEXT: stxv vs2, 16(r7)18; CHECK-NEXT: stxv vs3, 0(r7)19; CHECK-NEXT: blr20;21; CHECK-BE-LABEL: test50:22; CHECK-BE: # %bb.0: # %entry23; CHECK-BE-NEXT: xvbf16ger2 acc0, v2, v224; CHECK-BE-NEXT: xxmfacc acc025; CHECK-BE-NEXT: stxv vs1, 16(r7)26; CHECK-BE-NEXT: stxv vs0, 0(r7)27; CHECK-BE-NEXT: stxv vs3, 48(r7)28; CHECK-BE-NEXT: stxv vs2, 32(r7)29; CHECK-BE-NEXT: blr30entry:31 %0 = tail call <512 x i1> @llvm.ppc.mma.xvbf16ger2(<16 x i8> %vc, <16 x i8> %vc)32 store <512 x i1> %0, ptr %resp, align 6433 ret void34}35 36; Function Attrs: nounwind readnone37declare <512 x i1> @llvm.ppc.mma.xvbf16ger2(<16 x i8>, <16 x i8>)38 39; Function Attrs: nofree nounwind writeonly40define dso_local void @test51(ptr nocapture readnone %vqp, ptr nocapture readnone %vpp, <16 x i8> %vc, ptr nocapture %resp) {41; CHECK-LABEL: test51:42; CHECK: # %bb.0: # %entry43; CHECK-NEXT: pmxvbf16ger2 acc0, v2, v2, 0, 0, 044; CHECK-NEXT: xxmfacc acc045; CHECK-NEXT: stxv vs0, 48(r7)46; CHECK-NEXT: stxv vs1, 32(r7)47; CHECK-NEXT: stxv vs2, 16(r7)48; CHECK-NEXT: stxv vs3, 0(r7)49; CHECK-NEXT: blr50;51; CHECK-BE-LABEL: test51:52; CHECK-BE: # %bb.0: # %entry53; CHECK-BE-NEXT: pmxvbf16ger2 acc0, v2, v2, 0, 0, 054; CHECK-BE-NEXT: xxmfacc acc055; CHECK-BE-NEXT: stxv vs1, 16(r7)56; CHECK-BE-NEXT: stxv vs0, 0(r7)57; CHECK-BE-NEXT: stxv vs3, 48(r7)58; CHECK-BE-NEXT: stxv vs2, 32(r7)59; CHECK-BE-NEXT: blr60entry:61 %0 = tail call <512 x i1> @llvm.ppc.mma.pmxvbf16ger2(<16 x i8> %vc, <16 x i8> %vc, i32 0, i32 0, i32 0)62 store <512 x i1> %0, ptr %resp, align 6463 ret void64}65 66; Function Attrs: nounwind readnone67declare <512 x i1> @llvm.ppc.mma.pmxvbf16ger2(<16 x i8>, <16 x i8>, i32, i32, i32)68 69; Function Attrs: nofree nounwind70define dso_local void @test52(ptr nocapture readonly %vqp, ptr nocapture readnone %vpp, <16 x i8> %vc, ptr nocapture %resp) {71; CHECK-LABEL: test52:72; CHECK: # %bb.0: # %entry73; CHECK-NEXT: lxv vs3, 0(r3)74; CHECK-NEXT: lxv vs2, 16(r3)75; CHECK-NEXT: lxv vs1, 32(r3)76; CHECK-NEXT: lxv vs0, 48(r3)77; CHECK-NEXT: xxmtacc acc078; CHECK-NEXT: xvbf16ger2pp acc0, v2, v279; CHECK-NEXT: xxmfacc acc080; CHECK-NEXT: stxv vs0, 48(r7)81; CHECK-NEXT: stxv vs1, 32(r7)82; CHECK-NEXT: stxv vs2, 16(r7)83; CHECK-NEXT: stxv vs3, 0(r7)84; CHECK-NEXT: blr85;86; CHECK-BE-LABEL: test52:87; CHECK-BE: # %bb.0: # %entry88; CHECK-BE-NEXT: lxv vs3, 48(r3)89; CHECK-BE-NEXT: lxv vs2, 32(r3)90; CHECK-BE-NEXT: lxv vs1, 16(r3)91; CHECK-BE-NEXT: lxv vs0, 0(r3)92; CHECK-BE-NEXT: xxmtacc acc093; CHECK-BE-NEXT: xvbf16ger2pp acc0, v2, v294; CHECK-BE-NEXT: xxmfacc acc095; CHECK-BE-NEXT: stxv vs1, 16(r7)96; CHECK-BE-NEXT: stxv vs0, 0(r7)97; CHECK-BE-NEXT: stxv vs3, 48(r7)98; CHECK-BE-NEXT: stxv vs2, 32(r7)99; CHECK-BE-NEXT: blr100entry:101 %0 = load <512 x i1>, ptr %vqp, align 64102 %1 = tail call <512 x i1> @llvm.ppc.mma.xvbf16ger2pp(<512 x i1> %0, <16 x i8> %vc, <16 x i8> %vc)103 store <512 x i1> %1, ptr %resp, align 64104 ret void105}106 107; Function Attrs: nounwind readnone108declare <512 x i1> @llvm.ppc.mma.xvbf16ger2pp(<512 x i1>, <16 x i8>, <16 x i8>)109 110; Function Attrs: nofree nounwind111define dso_local void @test53(ptr nocapture readonly %vqp, ptr nocapture readnone %vpp, <16 x i8> %vc, ptr nocapture %resp) {112; CHECK-LABEL: test53:113; CHECK: # %bb.0: # %entry114; CHECK-NEXT: lxv vs3, 0(r3)115; CHECK-NEXT: lxv vs2, 16(r3)116; CHECK-NEXT: lxv vs1, 32(r3)117; CHECK-NEXT: lxv vs0, 48(r3)118; CHECK-NEXT: xxmtacc acc0119; CHECK-NEXT: xvbf16ger2pn acc0, v2, v2120; CHECK-NEXT: xxmfacc acc0121; CHECK-NEXT: stxv vs0, 48(r7)122; CHECK-NEXT: stxv vs1, 32(r7)123; CHECK-NEXT: stxv vs2, 16(r7)124; CHECK-NEXT: stxv vs3, 0(r7)125; CHECK-NEXT: blr126;127; CHECK-BE-LABEL: test53:128; CHECK-BE: # %bb.0: # %entry129; CHECK-BE-NEXT: lxv vs3, 48(r3)130; CHECK-BE-NEXT: lxv vs2, 32(r3)131; CHECK-BE-NEXT: lxv vs1, 16(r3)132; CHECK-BE-NEXT: lxv vs0, 0(r3)133; CHECK-BE-NEXT: xxmtacc acc0134; CHECK-BE-NEXT: xvbf16ger2pn acc0, v2, v2135; CHECK-BE-NEXT: xxmfacc acc0136; CHECK-BE-NEXT: stxv vs1, 16(r7)137; CHECK-BE-NEXT: stxv vs0, 0(r7)138; CHECK-BE-NEXT: stxv vs3, 48(r7)139; CHECK-BE-NEXT: stxv vs2, 32(r7)140; CHECK-BE-NEXT: blr141entry:142 %0 = load <512 x i1>, ptr %vqp, align 64143 %1 = tail call <512 x i1> @llvm.ppc.mma.xvbf16ger2pn(<512 x i1> %0, <16 x i8> %vc, <16 x i8> %vc)144 store <512 x i1> %1, ptr %resp, align 64145 ret void146}147 148; Function Attrs: nounwind readnone149declare <512 x i1> @llvm.ppc.mma.xvbf16ger2pn(<512 x i1>, <16 x i8>, <16 x i8>)150 151; Function Attrs: nofree nounwind152define dso_local void @test54(ptr nocapture readonly %vqp, ptr nocapture readnone %vpp, <16 x i8> %vc, ptr nocapture %resp) {153; CHECK-LABEL: test54:154; CHECK: # %bb.0: # %entry155; CHECK-NEXT: lxv vs3, 0(r3)156; CHECK-NEXT: lxv vs2, 16(r3)157; CHECK-NEXT: lxv vs1, 32(r3)158; CHECK-NEXT: lxv vs0, 48(r3)159; CHECK-NEXT: xxmtacc acc0160; CHECK-NEXT: xvbf16ger2np acc0, v2, v2161; CHECK-NEXT: xxmfacc acc0162; CHECK-NEXT: stxv vs0, 48(r7)163; CHECK-NEXT: stxv vs1, 32(r7)164; CHECK-NEXT: stxv vs2, 16(r7)165; CHECK-NEXT: stxv vs3, 0(r7)166; CHECK-NEXT: blr167;168; CHECK-BE-LABEL: test54:169; CHECK-BE: # %bb.0: # %entry170; CHECK-BE-NEXT: lxv vs3, 48(r3)171; CHECK-BE-NEXT: lxv vs2, 32(r3)172; CHECK-BE-NEXT: lxv vs1, 16(r3)173; CHECK-BE-NEXT: lxv vs0, 0(r3)174; CHECK-BE-NEXT: xxmtacc acc0175; CHECK-BE-NEXT: xvbf16ger2np acc0, v2, v2176; CHECK-BE-NEXT: xxmfacc acc0177; CHECK-BE-NEXT: stxv vs1, 16(r7)178; CHECK-BE-NEXT: stxv vs0, 0(r7)179; CHECK-BE-NEXT: stxv vs3, 48(r7)180; CHECK-BE-NEXT: stxv vs2, 32(r7)181; CHECK-BE-NEXT: blr182entry:183 %0 = load <512 x i1>, ptr %vqp, align 64184 %1 = tail call <512 x i1> @llvm.ppc.mma.xvbf16ger2np(<512 x i1> %0, <16 x i8> %vc, <16 x i8> %vc)185 store <512 x i1> %1, ptr %resp, align 64186 ret void187}188 189; Function Attrs: nounwind readnone190declare <512 x i1> @llvm.ppc.mma.xvbf16ger2np(<512 x i1>, <16 x i8>, <16 x i8>)191 192; Function Attrs: nofree nounwind193define dso_local void @test55(ptr nocapture readonly %vqp, ptr nocapture readnone %vpp, <16 x i8> %vc, ptr nocapture %resp) {194; CHECK-LABEL: test55:195; CHECK: # %bb.0: # %entry196; CHECK-NEXT: lxv vs3, 0(r3)197; CHECK-NEXT: lxv vs2, 16(r3)198; CHECK-NEXT: lxv vs1, 32(r3)199; CHECK-NEXT: lxv vs0, 48(r3)200; CHECK-NEXT: xxmtacc acc0201; CHECK-NEXT: xvbf16ger2nn acc0, v2, v2202; CHECK-NEXT: xxmfacc acc0203; CHECK-NEXT: stxv vs0, 48(r7)204; CHECK-NEXT: stxv vs1, 32(r7)205; CHECK-NEXT: stxv vs2, 16(r7)206; CHECK-NEXT: stxv vs3, 0(r7)207; CHECK-NEXT: blr208;209; CHECK-BE-LABEL: test55:210; CHECK-BE: # %bb.0: # %entry211; CHECK-BE-NEXT: lxv vs3, 48(r3)212; CHECK-BE-NEXT: lxv vs2, 32(r3)213; CHECK-BE-NEXT: lxv vs1, 16(r3)214; CHECK-BE-NEXT: lxv vs0, 0(r3)215; CHECK-BE-NEXT: xxmtacc acc0216; CHECK-BE-NEXT: xvbf16ger2nn acc0, v2, v2217; CHECK-BE-NEXT: xxmfacc acc0218; CHECK-BE-NEXT: stxv vs1, 16(r7)219; CHECK-BE-NEXT: stxv vs0, 0(r7)220; CHECK-BE-NEXT: stxv vs3, 48(r7)221; CHECK-BE-NEXT: stxv vs2, 32(r7)222; CHECK-BE-NEXT: blr223entry:224 %0 = load <512 x i1>, ptr %vqp, align 64225 %1 = tail call <512 x i1> @llvm.ppc.mma.xvbf16ger2nn(<512 x i1> %0, <16 x i8> %vc, <16 x i8> %vc)226 store <512 x i1> %1, ptr %resp, align 64227 ret void228}229 230; Function Attrs: nounwind readnone231declare <512 x i1> @llvm.ppc.mma.xvbf16ger2nn(<512 x i1>, <16 x i8>, <16 x i8>)232 233; Function Attrs: nofree nounwind234define dso_local void @test56(ptr nocapture readonly %vqp, ptr nocapture readnone %vpp, <16 x i8> %vc, ptr nocapture %resp) {235; CHECK-LABEL: test56:236; CHECK: # %bb.0: # %entry237; CHECK-NEXT: lxv vs3, 0(r3)238; CHECK-NEXT: lxv vs2, 16(r3)239; CHECK-NEXT: lxv vs1, 32(r3)240; CHECK-NEXT: lxv vs0, 48(r3)241; CHECK-NEXT: xxmtacc acc0242; CHECK-NEXT: pmxvbf16ger2pp acc0, v2, v2, 0, 0, 0243; CHECK-NEXT: xxmfacc acc0244; CHECK-NEXT: stxv vs0, 48(r7)245; CHECK-NEXT: stxv vs1, 32(r7)246; CHECK-NEXT: stxv vs2, 16(r7)247; CHECK-NEXT: stxv vs3, 0(r7)248; CHECK-NEXT: blr249;250; CHECK-BE-LABEL: test56:251; CHECK-BE: # %bb.0: # %entry252; CHECK-BE-NEXT: lxv vs3, 48(r3)253; CHECK-BE-NEXT: lxv vs2, 32(r3)254; CHECK-BE-NEXT: lxv vs1, 16(r3)255; CHECK-BE-NEXT: lxv vs0, 0(r3)256; CHECK-BE-NEXT: xxmtacc acc0257; CHECK-BE-NEXT: pmxvbf16ger2pp acc0, v2, v2, 0, 0, 0258; CHECK-BE-NEXT: xxmfacc acc0259; CHECK-BE-NEXT: stxv vs1, 16(r7)260; CHECK-BE-NEXT: stxv vs0, 0(r7)261; CHECK-BE-NEXT: stxv vs3, 48(r7)262; CHECK-BE-NEXT: stxv vs2, 32(r7)263; CHECK-BE-NEXT: blr264entry:265 %0 = load <512 x i1>, ptr %vqp, align 64266 %1 = tail call <512 x i1> @llvm.ppc.mma.pmxvbf16ger2pp(<512 x i1> %0, <16 x i8> %vc, <16 x i8> %vc, i32 0, i32 0, i32 0)267 store <512 x i1> %1, ptr %resp, align 64268 ret void269}270 271; Function Attrs: nounwind readnone272declare <512 x i1> @llvm.ppc.mma.pmxvbf16ger2pp(<512 x i1>, <16 x i8>, <16 x i8>, i32, i32, i32)273 274; Function Attrs: nofree nounwind275define dso_local void @test57(ptr nocapture readonly %vqp, ptr nocapture readnone %vpp, <16 x i8> %vc, ptr nocapture %resp) {276; CHECK-LABEL: test57:277; CHECK: # %bb.0: # %entry278; CHECK-NEXT: lxv vs3, 0(r3)279; CHECK-NEXT: lxv vs2, 16(r3)280; CHECK-NEXT: lxv vs1, 32(r3)281; CHECK-NEXT: lxv vs0, 48(r3)282; CHECK-NEXT: xxmtacc acc0283; CHECK-NEXT: pmxvbf16ger2pn acc0, v2, v2, 0, 0, 0284; CHECK-NEXT: xxmfacc acc0285; CHECK-NEXT: stxv vs0, 48(r7)286; CHECK-NEXT: stxv vs1, 32(r7)287; CHECK-NEXT: stxv vs2, 16(r7)288; CHECK-NEXT: stxv vs3, 0(r7)289; CHECK-NEXT: blr290;291; CHECK-BE-LABEL: test57:292; CHECK-BE: # %bb.0: # %entry293; CHECK-BE-NEXT: lxv vs3, 48(r3)294; CHECK-BE-NEXT: lxv vs2, 32(r3)295; CHECK-BE-NEXT: lxv vs1, 16(r3)296; CHECK-BE-NEXT: lxv vs0, 0(r3)297; CHECK-BE-NEXT: xxmtacc acc0298; CHECK-BE-NEXT: pmxvbf16ger2pn acc0, v2, v2, 0, 0, 0299; CHECK-BE-NEXT: xxmfacc acc0300; CHECK-BE-NEXT: stxv vs1, 16(r7)301; CHECK-BE-NEXT: stxv vs0, 0(r7)302; CHECK-BE-NEXT: stxv vs3, 48(r7)303; CHECK-BE-NEXT: stxv vs2, 32(r7)304; CHECK-BE-NEXT: blr305entry:306 %0 = load <512 x i1>, ptr %vqp, align 64307 %1 = tail call <512 x i1> @llvm.ppc.mma.pmxvbf16ger2pn(<512 x i1> %0, <16 x i8> %vc, <16 x i8> %vc, i32 0, i32 0, i32 0)308 store <512 x i1> %1, ptr %resp, align 64309 ret void310}311 312; Function Attrs: nounwind readnone313declare <512 x i1> @llvm.ppc.mma.pmxvbf16ger2pn(<512 x i1>, <16 x i8>, <16 x i8>, i32, i32, i32)314 315; Function Attrs: nofree nounwind316define dso_local void @test58(ptr nocapture readonly %vqp, ptr nocapture readnone %vpp, <16 x i8> %vc, ptr nocapture %resp) {317; CHECK-LABEL: test58:318; CHECK: # %bb.0: # %entry319; CHECK-NEXT: lxv vs3, 0(r3)320; CHECK-NEXT: lxv vs2, 16(r3)321; CHECK-NEXT: lxv vs1, 32(r3)322; CHECK-NEXT: lxv vs0, 48(r3)323; CHECK-NEXT: xxmtacc acc0324; CHECK-NEXT: pmxvbf16ger2np acc0, v2, v2, 0, 0, 0325; CHECK-NEXT: xxmfacc acc0326; CHECK-NEXT: stxv vs0, 48(r7)327; CHECK-NEXT: stxv vs1, 32(r7)328; CHECK-NEXT: stxv vs2, 16(r7)329; CHECK-NEXT: stxv vs3, 0(r7)330; CHECK-NEXT: blr331;332; CHECK-BE-LABEL: test58:333; CHECK-BE: # %bb.0: # %entry334; CHECK-BE-NEXT: lxv vs3, 48(r3)335; CHECK-BE-NEXT: lxv vs2, 32(r3)336; CHECK-BE-NEXT: lxv vs1, 16(r3)337; CHECK-BE-NEXT: lxv vs0, 0(r3)338; CHECK-BE-NEXT: xxmtacc acc0339; CHECK-BE-NEXT: pmxvbf16ger2np acc0, v2, v2, 0, 0, 0340; CHECK-BE-NEXT: xxmfacc acc0341; CHECK-BE-NEXT: stxv vs1, 16(r7)342; CHECK-BE-NEXT: stxv vs0, 0(r7)343; CHECK-BE-NEXT: stxv vs3, 48(r7)344; CHECK-BE-NEXT: stxv vs2, 32(r7)345; CHECK-BE-NEXT: blr346entry:347 %0 = load <512 x i1>, ptr %vqp, align 64348 %1 = tail call <512 x i1> @llvm.ppc.mma.pmxvbf16ger2np(<512 x i1> %0, <16 x i8> %vc, <16 x i8> %vc, i32 0, i32 0, i32 0)349 store <512 x i1> %1, ptr %resp, align 64350 ret void351}352 353; Function Attrs: nounwind readnone354declare <512 x i1> @llvm.ppc.mma.pmxvbf16ger2np(<512 x i1>, <16 x i8>, <16 x i8>, i32, i32, i32)355 356; Function Attrs: nofree nounwind357define dso_local void @test59(ptr nocapture readonly %vqp, ptr nocapture readnone %vpp, <16 x i8> %vc, ptr nocapture %resp) {358; CHECK-LABEL: test59:359; CHECK: # %bb.0: # %entry360; CHECK-NEXT: lxv vs3, 0(r3)361; CHECK-NEXT: lxv vs2, 16(r3)362; CHECK-NEXT: lxv vs1, 32(r3)363; CHECK-NEXT: lxv vs0, 48(r3)364; CHECK-NEXT: xxmtacc acc0365; CHECK-NEXT: pmxvbf16ger2nn acc0, v2, v2, 0, 0, 0366; CHECK-NEXT: xxmfacc acc0367; CHECK-NEXT: stxv vs0, 48(r7)368; CHECK-NEXT: stxv vs1, 32(r7)369; CHECK-NEXT: stxv vs2, 16(r7)370; CHECK-NEXT: stxv vs3, 0(r7)371; CHECK-NEXT: blr372;373; CHECK-BE-LABEL: test59:374; CHECK-BE: # %bb.0: # %entry375; CHECK-BE-NEXT: lxv vs3, 48(r3)376; CHECK-BE-NEXT: lxv vs2, 32(r3)377; CHECK-BE-NEXT: lxv vs1, 16(r3)378; CHECK-BE-NEXT: lxv vs0, 0(r3)379; CHECK-BE-NEXT: xxmtacc acc0380; CHECK-BE-NEXT: pmxvbf16ger2nn acc0, v2, v2, 0, 0, 0381; CHECK-BE-NEXT: xxmfacc acc0382; CHECK-BE-NEXT: stxv vs1, 16(r7)383; CHECK-BE-NEXT: stxv vs0, 0(r7)384; CHECK-BE-NEXT: stxv vs3, 48(r7)385; CHECK-BE-NEXT: stxv vs2, 32(r7)386; CHECK-BE-NEXT: blr387entry:388 %0 = load <512 x i1>, ptr %vqp, align 64389 %1 = tail call <512 x i1> @llvm.ppc.mma.pmxvbf16ger2nn(<512 x i1> %0, <16 x i8> %vc, <16 x i8> %vc, i32 0, i32 0, i32 0)390 store <512 x i1> %1, ptr %resp, align 64391 ret void392}393 394; Function Attrs: nounwind readnone395declare <512 x i1> @llvm.ppc.mma.pmxvbf16ger2nn(<512 x i1>, <16 x i8>, <16 x i8>, i32, i32, i32)396 397; Function Attrs: nofree nounwind writeonly398define dso_local void @test60(ptr nocapture readnone %vqp, ptr nocapture readnone %vpp, <16 x i8> %vc, ptr nocapture %resp) {399; CHECK-LABEL: test60:400; CHECK: # %bb.0: # %entry401; CHECK-NEXT: xvcvspbf16 vs0, v2402; CHECK-NEXT: stxv vs0, 0(r7)403; CHECK-NEXT: blr404;405; CHECK-BE-LABEL: test60:406; CHECK-BE: # %bb.0: # %entry407; CHECK-BE-NEXT: xvcvspbf16 vs0, v2408; CHECK-BE-NEXT: stxv vs0, 0(r7)409; CHECK-BE-NEXT: blr410entry:411 %0 = tail call <16 x i8> @llvm.ppc.vsx.xvcvspbf16(<16 x i8> %vc)412 store <16 x i8> %0, ptr %resp, align 16413 ret void414}415 416; Function Attrs: nounwind readnone417declare <16 x i8> @llvm.ppc.vsx.xvcvspbf16(<16 x i8>)418 419; Function Attrs: nofree nounwind writeonly420define dso_local void @test61(ptr nocapture readnone %vqp, ptr nocapture readnone %vpp, <16 x i8> %vc, ptr nocapture %resp) {421; CHECK-LABEL: test61:422; CHECK: # %bb.0: # %entry423; CHECK-NEXT: xvcvbf16spn vs0, v2424; CHECK-NEXT: stxv vs0, 0(r7)425; CHECK-NEXT: blr426;427; CHECK-BE-LABEL: test61:428; CHECK-BE: # %bb.0: # %entry429; CHECK-BE-NEXT: xvcvbf16spn vs0, v2430; CHECK-BE-NEXT: stxv vs0, 0(r7)431; CHECK-BE-NEXT: blr432entry:433 %0 = tail call <16 x i8> @llvm.ppc.vsx.xvcvbf16spn(<16 x i8> %vc)434 store <16 x i8> %0, ptr %resp, align 16435 ret void436}437 438; Function Attrs: nounwind readnone439declare <16 x i8> @llvm.ppc.vsx.xvcvbf16spn(<16 x i8>)440