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1; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 < %s | FileCheck %s2; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 < %s | FileCheck %s3 4; equivalent C code5; struct s64 {6; int a:5;7; int b:16;8; long c:42;9; };10; void bitfieldinsert64(struct s *p, unsigned short v) {11; p->b = v;12; }13 14%struct.s64 = type { i64 }15 16define void @bitfieldinsert64(ptr nocapture %p, i16 zeroext %v) {17; CHECK-LABEL: @bitfieldinsert6418; CHECK: ld [[REG1:[0-9]+]], 0(3)19; CHECK-NEXT: rlwimi [[REG1]], 4, 5, 11, 2620; CHECK-NEXT: std [[REG1]], 0(3)21; CHECK-NEXT: blr22entry:23 %0 = zext i16 %v to i6424 %bf.load = load i64, ptr %p, align 825 %bf.shl = shl nuw nsw i64 %0, 526 %bf.clear = and i64 %bf.load, -209712127 %bf.set = or i64 %bf.clear, %bf.shl28 store i64 %bf.set, ptr %p, align 829 ret void30}31 32; bitfieldinsert32: Test for rlwimi33; equivalent C code34; struct s32 {35; int a:8;36; int b:16;37; int c:8;38; };39; void bitfieldinsert32(struct s32 *p, unsigned int v) {40; p->b = v;41; }42 43%struct.s32 = type { i32 }44 45define void @bitfieldinsert32(ptr nocapture %p, i32 zeroext %v) {46; CHECK-LABEL: @bitfieldinsert3247; CHECK: lwz [[REG1:[0-9]+]], 0(3)48; CHECK-NEXT: rlwimi [[REG1]], 4, 8, 8, 2349; CHECK-NEXT: stw [[REG1]], 0(3)50; CHECK-NEXT: blr51entry:52 %bf.load = load i32, ptr %p, align 453 %bf.value = shl i32 %v, 854 %bf.shl = and i32 %bf.value, 1677696055 %bf.clear = and i32 %bf.load, -1677696156 %bf.set = or i32 %bf.clear, %bf.shl57 store i32 %bf.set, ptr %p, align 458 ret void59}60 61; test cases which include ISD::TRUNCATE62; equivalent C code63; struct s64b {64; int a:4;65; int b:16;66; int c:24;67; };68; void bitfieldinsert64b(struct s64b *p, unsigned char v) {69; p->b = v;70; }71 72%struct.s64b = type { i24, i24 }73 74define void @bitfieldinsert64b(ptr nocapture %p, i8 zeroext %v) {75; CHECK-LABEL: @bitfieldinsert64b76; CHECK: lwz [[REG1:[0-9]+]], 0(3)77; CHECK-NEXT: rlwimi [[REG1]], 4, 4, 12, 2778; CHECK-NEXT: stw [[REG1]], 0(3)79; CHECK-NEXT: blr80entry:81 %conv = zext i8 %v to i3282 %bf.load = load i32, ptr %p, align 483 %bf.shl = shl nuw nsw i32 %conv, 484 %bf.clear = and i32 %bf.load, -104856185 %bf.set = or i32 %bf.clear, %bf.shl86 store i32 %bf.set, ptr %p, align 487 ret void88}89 90; equivalent C code91; struct s64c {92; int a:5;93; int b:16;94; long c:10;95; };96; void bitfieldinsert64c(struct s64c *p, unsigned short v) {97; p->b = v;98; }99 100%struct.s64c = type { i32, [4 x i8] }101 102define void @bitfieldinsert64c(ptr nocapture %p, i16 zeroext %v) {103; CHECK-LABEL: @bitfieldinsert64c104; CHECK: lwz [[REG1:[0-9]+]], 0(3)105; CHECK-NEXT: rlwimi [[REG1]], 4, 5, 11, 26106; CHECK-NEXT: stw [[REG1]], 0(3)107; CHECK-NEXT: blr108entry:109 %conv = zext i16 %v to i32110 %bf.load = load i32, ptr %p, align 8111 %bf.shl = shl nuw nsw i32 %conv, 5112 %bf.clear = and i32 %bf.load, -2097121113 %bf.set = or i32 %bf.clear, %bf.shl114 store i32 %bf.set, ptr %p, align 8115 ret void116}117