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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr9 -run-pass=machine-scheduler -o - %s | FileCheck %s3---4# Check that machine-scheduler's BotHeightReduce heuristic puts the LD 8 in5# between the final run of MULLDs and the LDXs that feed them, to try to hide6# the latency of the LDXs.7name: test8tracksRegLiveness: true9body: |10 ; CHECK-LABEL: name: test11 ; CHECK: bb.0:12 ; CHECK: successors: %bb.1(0x80000000)13 ; CHECK: liveins: $x3, $x414 ; CHECK: [[COPY:%[0-9]+]]:g8rc_and_g8rc_nox0 = COPY $x415 ; CHECK: [[COPY1:%[0-9]+]]:g8rc_and_g8rc_nox0 = COPY $x316 ; CHECK: [[ADDI8_:%[0-9]+]]:g8rc_and_g8rc_nox0 = ADDI8 [[COPY1]], 117 ; CHECK: [[CMPLDI:%[0-9]+]]:crrc = CMPLDI [[COPY]], 118 ; CHECK: [[LI8_:%[0-9]+]]:g8rc_and_g8rc_nox0 = LI8 119 ; CHECK: [[ISEL8_:%[0-9]+]]:g8rc = ISEL8 [[COPY]], [[LI8_]], [[CMPLDI]].sub_gt20 ; CHECK: MTCTR8loop [[ISEL8_]], implicit-def dead $ctr821 ; CHECK: [[LI8_1:%[0-9]+]]:g8rc = LI8 022 ; CHECK: [[LI8_2:%[0-9]+]]:g8rc = LI8 223 ; CHECK: [[LI8_3:%[0-9]+]]:g8rc = LI8 324 ; CHECK: [[LI8_4:%[0-9]+]]:g8rc = LI8 525 ; CHECK: [[LI8_5:%[0-9]+]]:g8rc = LI8 626 ; CHECK: [[LI8_6:%[0-9]+]]:g8rc = LI8 727 ; CHECK: bb.1:28 ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000)29 ; CHECK: [[LD:%[0-9]+]]:g8rc = LD 0, [[ADDI8_]] :: (load (s64))30 ; CHECK: [[LDX:%[0-9]+]]:g8rc = LDX [[ADDI8_]], [[LI8_]] :: (load (s64))31 ; CHECK: [[LDX1:%[0-9]+]]:g8rc = LDX [[ADDI8_]], [[LI8_3]] :: (load (s64))32 ; CHECK: [[LD1:%[0-9]+]]:g8rc = LD 4, [[ADDI8_]] :: (load (s64))33 ; CHECK: [[LDX2:%[0-9]+]]:g8rc = LDX [[ADDI8_]], [[LI8_4]] :: (load (s64))34 ; CHECK: [[LDX3:%[0-9]+]]:g8rc = LDX [[ADDI8_]], [[LI8_5]] :: (load (s64))35 ; CHECK: [[LDX4:%[0-9]+]]:g8rc = LDX [[ADDI8_]], [[LI8_6]] :: (load (s64))36 ; CHECK: [[LD2:%[0-9]+]]:g8rc = LD 8, [[ADDI8_]] :: (load (s64))37 ; CHECK: [[MULLD:%[0-9]+]]:g8rc = MULLD [[LDX]], [[LD]]38 ; CHECK: [[LDX5:%[0-9]+]]:g8rc = LDX [[ADDI8_]], [[LI8_2]] :: (load (s64))39 ; CHECK: [[ADDI8_1:%[0-9]+]]:g8rc = ADDI8 [[ADDI8_]], 140 ; CHECK: [[MULLD1:%[0-9]+]]:g8rc = MULLD [[MULLD]], [[LDX5]]41 ; CHECK: [[MULLD2:%[0-9]+]]:g8rc = MULLD [[MULLD1]], [[LDX1]]42 ; CHECK: [[MULLD3:%[0-9]+]]:g8rc = MULLD [[MULLD2]], [[LD1]]43 ; CHECK: [[MULLD4:%[0-9]+]]:g8rc = MULLD [[MULLD3]], [[LDX2]]44 ; CHECK: [[MULLD5:%[0-9]+]]:g8rc = MULLD [[MULLD4]], [[LDX3]]45 ; CHECK: [[MULLD6:%[0-9]+]]:g8rc = MULLD [[MULLD5]], [[LDX4]]46 ; CHECK: [[MADDLD8_:%[0-9]+]]:g8rc = MADDLD8 [[MULLD6]], [[LD2]], [[MADDLD8_]]47 ; CHECK: [[COPY2:%[0-9]+]]:g8rc_and_g8rc_nox0 = COPY [[ADDI8_1]]48 ; CHECK: BDNZ8 %bb.1, implicit-def dead $ctr8, implicit $ctr849 ; CHECK: B %bb.250 ; CHECK: bb.2:51 bb.0:52 liveins: $x3, $x453 54 %0:g8rc_and_g8rc_nox0 = COPY $x455 %1:g8rc_and_g8rc_nox0 = COPY $x356 %2:g8rc_and_g8rc_nox0 = ADDI8 %1, 157 %3:crrc = CMPLDI %0, 158 %4:g8rc_and_g8rc_nox0 = LI8 159 %5:g8rc = ISEL8 %0, %4, %3.sub_gt60 MTCTR8loop %5, implicit-def dead $ctr861 %6:g8rc = LI8 062 %7:g8rc = LI8 263 %8:g8rc = LI8 364 %9:g8rc = LI8 565 %10:g8rc = LI8 666 %11:g8rc = LI8 767 68 bb.1:69 %12:g8rc = ADDI8 %2, 170 %13:g8rc = LD 0, %2 :: (load (s64))71 %14:g8rc = LDX %2, %4 :: (load (s64))72 %16:g8rc = LDX %2, %8 :: (load (s64))73 %17:g8rc = LD 4, %2 :: (load (s64))74 %18:g8rc = LDX %2, %9 :: (load (s64))75 %19:g8rc = LDX %2, %10 :: (load (s64))76 %20:g8rc = LDX %2, %11 :: (load (s64))77 %21:g8rc = LD 8, %2 :: (load (s64))78 %22:g8rc = MULLD %14, %1379 %15:g8rc = LDX %2, %7 :: (load (s64))80 %23:g8rc = MULLD %22, %1581 %24:g8rc = MULLD %23, %1682 %25:g8rc = MULLD %24, %1783 %26:g8rc = MULLD %25, %1884 %27:g8rc = MULLD %26, %1985 %28:g8rc = MULLD %27, %2086 %6:g8rc = MADDLD8 %28, %21, %687 %2:g8rc_and_g8rc_nox0 = COPY %1288 BDNZ8 %bb.1, implicit-def dead $ctr8, implicit $ctr889 B %bb.290 91 bb.2:92...93