brintos

brintos / llvm-project-archived public Read only

0
0
Text · 4.0 KiB · 15ab8aa Raw
83 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 52; RUN: llc -stop-after=finalize-isel -verify-machineinstrs < %s | FileCheck %s3 4target datalayout = "E-m:e-p:32:32-Fn32-i64:64-n32"5target triple = "powerpc-unknown-linux-gnu"6 7@md_seq_show___trans_tmp_57 = external global i88 9define i32 @md_seq_show(i64 %0, i32 %1) #0 {10 ; CHECK-LABEL: name: md_seq_show11 ; CHECK: bb.0.entry:12 ; CHECK-NEXT:   successors: %bb.3(0x40000000), %bb.4(0x40000000)13 ; CHECK-NEXT:   liveins: $r3, $r4, $r514 ; CHECK-NEXT: {{  $}}15 ; CHECK-NEXT:   [[COPY:%[0-9]+]]:gprc = COPY $r516 ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:gprc = COPY $r417 ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:gprc = COPY $r318 ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:gprc = COPY [[COPY1]]19 ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:gprc = COPY [[COPY2]]20 ; CHECK-NEXT:   [[ADDIC:%[0-9]+]]:gprc = ADDIC [[COPY1]], 1, implicit-def $carry21 ; CHECK-NEXT:   [[CMPLWI:%[0-9]+]]:crrc = CMPLWI killed [[ADDIC]], 122 ; CHECK-NEXT:   [[LI:%[0-9]+]]:gprc_and_gprc_nor0 = LI 023 ; CHECK-NEXT:   [[LI1:%[0-9]+]]:gprc_and_gprc_nor0 = LI 124 ; CHECK-NEXT:   BCC 44, [[CMPLWI]], %bb.425 ; CHECK-NEXT: {{  $}}26 ; CHECK-NEXT: bb.3.entry:27 ; CHECK-NEXT:   successors: %bb.4(0x80000000)28 ; CHECK-NEXT:   liveins: $carry29 ; CHECK-NEXT: {{  $}}30 ; CHECK-NEXT: bb.4.entry:31 ; CHECK-NEXT:   successors: %bb.5(0x40000000), %bb.6(0x40000000)32 ; CHECK-NEXT:   liveins: $carry33 ; CHECK-NEXT: {{  $}}34 ; CHECK-NEXT:   [[PHI:%[0-9]+]]:gprc_and_gprc_nor0 = PHI [[LI]], %bb.3, [[LI1]], %bb.035 ; CHECK-NEXT:   [[ADDZE:%[0-9]+]]:gprc = ADDZE [[COPY2]], implicit-def dead $carry, implicit $carry36 ; CHECK-NEXT:   [[ADDIC1:%[0-9]+]]:gprc = ADDIC [[ADDZE]], -1, implicit-def $carry37 ; CHECK-NEXT:   [[SUBFE:%[0-9]+]]:gprc_and_gprc_nor0 = SUBFE killed [[ADDIC1]], [[ADDZE]], implicit-def dead $carry, implicit $carry38 ; CHECK-NEXT:   [[CMPLWI1:%[0-9]+]]:crrc = CMPLWI [[ADDZE]], 039 ; CHECK-NEXT:   BCC 76, [[CMPLWI1]], %bb.640 ; CHECK-NEXT: {{  $}}41 ; CHECK-NEXT: bb.5.entry:42 ; CHECK-NEXT:   successors: %bb.6(0x80000000)43 ; CHECK-NEXT: {{  $}}44 ; CHECK-NEXT: bb.6.entry:45 ; CHECK-NEXT:   successors: %bb.1(0x55555556), %bb.2(0x2aaaaaaa)46 ; CHECK-NEXT: {{  $}}47 ; CHECK-NEXT:   [[PHI1:%[0-9]+]]:gprc = PHI [[SUBFE]], %bb.5, [[PHI]], %bb.448 ; CHECK-NEXT:   [[CMPLWI2:%[0-9]+]]:crrc = CMPLWI killed [[PHI1]], 049 ; CHECK-NEXT:   BCC 68, killed [[CMPLWI2]], %bb.250 ; CHECK-NEXT:   B %bb.151 ; CHECK-NEXT: {{  $}}52 ; CHECK-NEXT: bb.1.for.cond.i.preheader:53 ; CHECK-NEXT:   [[LI2:%[0-9]+]]:gprc = LI 054 ; CHECK-NEXT:   $r3 = COPY [[LI2]]55 ; CHECK-NEXT:   BLR implicit $lr, implicit $rm, implicit $r356 ; CHECK-NEXT: {{  $}}57 ; CHECK-NEXT: bb.2.status_resync.exit:58 ; CHECK-NEXT:   [[ADDIC2:%[0-9]+]]:gprc = ADDIC [[COPY]], -1, implicit-def $carry59 ; CHECK-NEXT:   [[SUBFE1:%[0-9]+]]:gprc = SUBFE killed [[ADDIC2]], [[COPY]], implicit-def dead $carry, implicit $carry60 ; CHECK-NEXT:   [[LIS:%[0-9]+]]:gprc_and_gprc_nor0 = LIS target-flags(ppc-ha) @md_seq_show___trans_tmp_5761 ; CHECK-NEXT:   STB killed [[SUBFE1]], target-flags(ppc-lo) @md_seq_show___trans_tmp_57, killed [[LIS]] :: (store (s8) into @md_seq_show___trans_tmp_57)62 ; CHECK-NEXT:   [[LI3:%[0-9]+]]:gprc = LI 063 ; CHECK-NEXT:   $r3 = COPY [[LI3]]64 ; CHECK-NEXT:   BLR implicit $lr, implicit $rm, implicit $r365 66 entry:67   switch i64 %0, label %status_resync.exit [68     i64 -1, label %for.cond.i.preheader69     i64 0, label %for.cond.i.preheader70   ]71 72 for.cond.i.preheader: ; preds = %entry, %entry73   ret i32 074 75 status_resync.exit:                               ; preds = %entry76   %tobool = icmp ne i32 %1, 077   %storedv = zext i1 %tobool to i878   store i8 %storedv, ptr @md_seq_show___trans_tmp_57, align 179     ret i32 080}81 82attributes #0 = { "target-features"="-aix-shared-lib-tls-model-opt,-aix-small-local-dynamic-tls,-aix-small-local-exec-tls,-altivec,-bpermd,-crbits,-crypto,-direct-move,-extdiv,-htm,-isa-v206-instructions,-isa-v207-instructions,-isa-v30-instructions,-power8-vector,-power9-vector,-privileged,-quadword-atomics,-rop-protect,-spe,-vsx" }83