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1; RUN: llc -verify-machineinstrs -mcpu=g5 -mtriple=powerpc64-unknown-linux-gnu -ppc-asm-full-reg-names < %s | FileCheck %s2; Check that the peephole optimizer knows about sext and zext instructions.3; CHECK: test1sext4define i32 @test1sext(i64 %A, i64 %B, ptr %P, ptr %P2) nounwind {5 %C = add i64 %A, %B6 ; CHECK: add [[SUM:r[0-9]+]], r3, r47 %D = trunc i64 %C to i328 %E = shl i64 %C, 329 %F = ashr i64 %E, 3210 ; CHECK: extsw [[EXT:r[0-9]+]], [[SUM]]11 store volatile i64 %F, ptr %P212 ; CHECK-DAG: std [[EXT]]13 store volatile i32 %D, ptr %P14 ; Reuse low bits of extended register, don't extend live range of SUM.15 ; CHECK-DAG: stw [[SUM]]16 %R = add i32 %D, %D17 ret i32 %R18}19