409 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-unknown \3; RUN: -ppc-asm-full-reg-names < %s | FileCheck %s4; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-unknown \5; RUN: -ppc-asm-full-reg-names < %s | FileCheck %s6 7define zeroext i1 @eq1(i1 zeroext %x, i1 zeroext %y) {8; CHECK-LABEL: eq1:9; CHECK: # %bb.0:10; CHECK-NEXT: add r3, r4, r311; CHECK-NEXT: cntlzw r3, r312; CHECK-NEXT: srwi r3, r3, 513; CHECK-NEXT: blr14 %sub = sext i1 %x to i3215 %conv3 = zext i1 %y to i3216 %cmp = icmp eq i32 %sub, %conv317 ret i1 %cmp18}19 20define zeroext i8 @eq2(i8 zeroext %x, i8 zeroext %y) {21; CHECK-LABEL: eq2:22; CHECK: # %bb.0:23; CHECK-NEXT: add r3, r4, r324; CHECK-NEXT: cntlzw r3, r325; CHECK-NEXT: srwi r3, r3, 526; CHECK-NEXT: blr27 %conv = zext i8 %x to i3228 %sub = sub nsw i32 0, %conv29 %conv1 = zext i8 %y to i3230 %cmp = icmp eq i32 %sub, %conv131 %conv3 = zext i1 %cmp to i832 ret i8 %conv333}34 35define signext i16 @eq3(i16 signext %x, i16 signext %y) {36; CHECK-LABEL: eq3:37; CHECK: # %bb.0:38; CHECK-NEXT: add r3, r4, r339; CHECK-NEXT: cntlzw r3, r340; CHECK-NEXT: srwi r3, r3, 541; CHECK-NEXT: blr42 %conv = sext i16 %x to i3243 %sub = sub nsw i32 0, %conv44 %conv1 = sext i16 %y to i3245 %cmp = icmp eq i32 %sub, %conv146 %conv3 = zext i1 %cmp to i1647 ret i16 %conv348}49 50define zeroext i16 @eq4(i16 zeroext %x, i16 zeroext %y) {51; CHECK-LABEL: eq4:52; CHECK: # %bb.0:53; CHECK-NEXT: add r3, r4, r354; CHECK-NEXT: cntlzw r3, r355; CHECK-NEXT: srwi r3, r3, 556; CHECK-NEXT: blr57 %conv = zext i16 %x to i3258 %sub = sub nsw i32 0, %conv59 %conv1 = zext i16 %y to i3260 %cmp = icmp eq i32 %sub, %conv161 %conv3 = zext i1 %cmp to i1662 ret i16 %conv363}64 65define signext i32 @eq5(i32 signext %x, i32 signext %y) {66; CHECK-LABEL: eq5:67; CHECK: # %bb.0:68; CHECK-NEXT: add r3, r4, r369; CHECK-NEXT: cntlzw r3, r370; CHECK-NEXT: srwi r3, r3, 571; CHECK-NEXT: blr72 %sub = sub nsw i32 0, %x73 %cmp = icmp eq i32 %sub, %y74 %conv = zext i1 %cmp to i3275 ret i32 %conv76}77 78define zeroext i32 @eq6(i32 zeroext %x, i32 zeroext %y) {79; CHECK-LABEL: eq6:80; CHECK: # %bb.0:81; CHECK-NEXT: add r3, r4, r382; CHECK-NEXT: cntlzw r3, r383; CHECK-NEXT: srwi r3, r3, 584; CHECK-NEXT: blr85 %sub = sub i32 0, %x86 %cmp = icmp eq i32 %sub, %y87 %conv = zext i1 %cmp to i3288 ret i32 %conv89}90 91define i64 @eq7(i64 %x, i64 %y) {92; CHECK-LABEL: eq7:93; CHECK: # %bb.0:94; CHECK-NEXT: add r3, r4, r395; CHECK-NEXT: cntlzd r3, r396; CHECK-NEXT: rldicl r3, r3, 58, 6397; CHECK-NEXT: blr98 %sub = sub nsw i64 0, %x99 %cmp = icmp eq i64 %sub, %y100 %zext = zext i1 %cmp to i64101 ret i64 %zext102}103 104define zeroext i1 @eq8(i1 zeroext %x, i1 zeroext %y) {105; CHECK-LABEL: eq8:106; CHECK: # %bb.0:107; CHECK-NEXT: add r3, r4, r3108; CHECK-NEXT: cntlzw r3, r3109; CHECK-NEXT: srwi r3, r3, 5110; CHECK-NEXT: blr111 %conv = zext i1 %y to i32112 %sub = sext i1 %x to i32113 %cmp = icmp eq i32 %conv, %sub114 ret i1 %cmp115}116 117define zeroext i8 @eq9(i8 zeroext %x, i8 zeroext %y) {118; CHECK-LABEL: eq9:119; CHECK: # %bb.0:120; CHECK-NEXT: add r3, r3, r4121; CHECK-NEXT: cntlzw r3, r3122; CHECK-NEXT: srwi r3, r3, 5123; CHECK-NEXT: blr124 %conv = zext i8 %x to i32125 %conv1 = zext i8 %y to i32126 %sub = sub nsw i32 0, %conv1127 %cmp = icmp eq i32 %conv, %sub128 %conv3 = zext i1 %cmp to i8129 ret i8 %conv3130}131 132define signext i16 @eq10(i16 signext %x, i16 signext %y) {133; CHECK-LABEL: eq10:134; CHECK: # %bb.0:135; CHECK-NEXT: add r3, r3, r4136; CHECK-NEXT: cntlzw r3, r3137; CHECK-NEXT: srwi r3, r3, 5138; CHECK-NEXT: blr139 %conv = sext i16 %x to i32140 %conv1 = sext i16 %y to i32141 %sub = sub nsw i32 0, %conv1142 %cmp = icmp eq i32 %conv, %sub143 %conv3 = zext i1 %cmp to i16144 ret i16 %conv3145}146 147define zeroext i16 @eq11(i16 zeroext %x, i16 zeroext %y) {148; CHECK-LABEL: eq11:149; CHECK: # %bb.0:150; CHECK-NEXT: add r3, r3, r4151; CHECK-NEXT: cntlzw r3, r3152; CHECK-NEXT: srwi r3, r3, 5153; CHECK-NEXT: blr154 %conv = zext i16 %x to i32155 %conv1 = zext i16 %y to i32156 %sub = sub nsw i32 0, %conv1157 %cmp = icmp eq i32 %conv, %sub158 %conv3 = zext i1 %cmp to i16159 ret i16 %conv3160}161 162define signext i32 @eq12(i32 signext %x, i32 signext %y) {163; CHECK-LABEL: eq12:164; CHECK: # %bb.0:165; CHECK-NEXT: add r3, r3, r4166; CHECK-NEXT: cntlzw r3, r3167; CHECK-NEXT: srwi r3, r3, 5168; CHECK-NEXT: blr169 %sub = sub nsw i32 0, %y170 %cmp = icmp eq i32 %sub, %x171 %conv = zext i1 %cmp to i32172 ret i32 %conv173}174 175define zeroext i32 @eq13(i32 zeroext %x, i32 zeroext %y) {176; CHECK-LABEL: eq13:177; CHECK: # %bb.0:178; CHECK-NEXT: add r3, r3, r4179; CHECK-NEXT: cntlzw r3, r3180; CHECK-NEXT: srwi r3, r3, 5181; CHECK-NEXT: blr182 %sub = sub i32 0, %y183 %cmp = icmp eq i32 %sub, %x184 %conv = zext i1 %cmp to i32185 ret i32 %conv186}187 188define i64 @eq14(i64 %x, i64 %y) {189; CHECK-LABEL: eq14:190; CHECK: # %bb.0:191; CHECK-NEXT: add r3, r3, r4192; CHECK-NEXT: cntlzd r3, r3193; CHECK-NEXT: rldicl r3, r3, 58, 63194; CHECK-NEXT: blr195 %sub = sub nsw i64 0, %y196 %cmp = icmp eq i64 %sub, %x197 %conv1 = zext i1 %cmp to i64198 ret i64 %conv1199}200 201define zeroext i1 @neq1(i1 zeroext %x, i1 zeroext %y) {202; CHECK-LABEL: neq1:203; CHECK: # %bb.0:204; CHECK-NEXT: add r3, r4, r3205; CHECK-NEXT: cntlzw r3, r3206; CHECK-NEXT: srwi r3, r3, 5207; CHECK-NEXT: xori r3, r3, 1208; CHECK-NEXT: blr209 %sub = sext i1 %x to i32210 %conv3 = zext i1 %y to i32211 %cmp = icmp ne i32 %sub, %conv3212 ret i1 %cmp213}214 215define zeroext i8 @neq2(i8 zeroext %x, i8 zeroext %y) {216; CHECK-LABEL: neq2:217; CHECK: # %bb.0:218; CHECK-NEXT: add r3, r4, r3219; CHECK-NEXT: cntlzw r3, r3220; CHECK-NEXT: srwi r3, r3, 5221; CHECK-NEXT: xori r3, r3, 1222; CHECK-NEXT: blr223 %conv = zext i8 %x to i32224 %sub = sub nsw i32 0, %conv225 %conv1 = zext i8 %y to i32226 %cmp = icmp ne i32 %sub, %conv1227 %conv3 = zext i1 %cmp to i8228 ret i8 %conv3229}230 231define signext i16 @neq3(i16 signext %x, i16 signext %y) {232; CHECK-LABEL: neq3:233; CHECK: # %bb.0:234; CHECK-NEXT: add r3, r4, r3235; CHECK-NEXT: cntlzw r3, r3236; CHECK-NEXT: srwi r3, r3, 5237; CHECK-NEXT: xori r3, r3, 1238; CHECK-NEXT: blr239 %conv = sext i16 %x to i32240 %sub = sub nsw i32 0, %conv241 %conv1 = sext i16 %y to i32242 %cmp = icmp ne i32 %sub, %conv1243 %conv3 = zext i1 %cmp to i16244 ret i16 %conv3245}246 247define zeroext i16 @neq4(i16 zeroext %x, i16 zeroext %y) {248; CHECK-LABEL: neq4:249; CHECK: # %bb.0:250; CHECK-NEXT: add r3, r4, r3251; CHECK-NEXT: cntlzw r3, r3252; CHECK-NEXT: srwi r3, r3, 5253; CHECK-NEXT: xori r3, r3, 1254; CHECK-NEXT: blr255 %conv = zext i16 %x to i32256 %sub = sub nsw i32 0, %conv257 %conv1 = zext i16 %y to i32258 %cmp = icmp ne i32 %sub, %conv1259 %conv3 = zext i1 %cmp to i16260 ret i16 %conv3261}262 263define signext i32 @neq5(i32 signext %x, i32 signext %y) {264; CHECK-LABEL: neq5:265; CHECK: # %bb.0:266; CHECK-NEXT: add r3, r4, r3267; CHECK-NEXT: cntlzw r3, r3268; CHECK-NEXT: srwi r3, r3, 5269; CHECK-NEXT: xori r3, r3, 1270; CHECK-NEXT: blr271 %sub = sub nsw i32 0, %x272 %cmp = icmp ne i32 %sub, %y273 %conv = zext i1 %cmp to i32274 ret i32 %conv275}276 277define zeroext i32 @neq6(i32 zeroext %x, i32 zeroext %y) {278; CHECK-LABEL: neq6:279; CHECK: # %bb.0:280; CHECK-NEXT: add r3, r4, r3281; CHECK-NEXT: cntlzw r3, r3282; CHECK-NEXT: srwi r3, r3, 5283; CHECK-NEXT: xori r3, r3, 1284; CHECK-NEXT: blr285 %sub = sub i32 0, %x286 %cmp = icmp ne i32 %sub, %y287 %conv = zext i1 %cmp to i32288 ret i32 %conv289}290 291define i64 @neq7(i64 %x, i64 %y) {292; CHECK-LABEL: neq7:293; CHECK: # %bb.0:294; CHECK-NEXT: add r3, r4, r3295; CHECK-NEXT: addic r4, r3, -1296; CHECK-NEXT: subfe r3, r4, r3297; CHECK-NEXT: blr298 %sub = sub nsw i64 0, %x299 %cmp = icmp ne i64 %sub, %y300 %zext = zext i1 %cmp to i64301 ret i64 %zext302}303 304define zeroext i1 @neq8(i1 zeroext %x, i1 zeroext %y) {305; CHECK-LABEL: neq8:306; CHECK: # %bb.0:307; CHECK-NEXT: add r3, r4, r3308; CHECK-NEXT: cntlzw r3, r3309; CHECK-NEXT: srwi r3, r3, 5310; CHECK-NEXT: xori r3, r3, 1311; CHECK-NEXT: blr312 %conv = zext i1 %y to i32313 %sub = sext i1 %x to i32314 %cmp = icmp ne i32 %conv, %sub315 ret i1 %cmp316}317 318define zeroext i8 @neq9(i8 zeroext %x, i8 zeroext %y) {319; CHECK-LABEL: neq9:320; CHECK: # %bb.0:321; CHECK-NEXT: add r3, r4, r3322; CHECK-NEXT: cntlzw r3, r3323; CHECK-NEXT: srwi r3, r3, 5324; CHECK-NEXT: xori r3, r3, 1325; CHECK-NEXT: blr326 %conv = zext i8 %y to i32327 %conv1 = zext i8 %x to i32328 %sub = sub nsw i32 0, %conv1329 %cmp = icmp ne i32 %conv, %sub330 %conv3 = zext i1 %cmp to i8331 ret i8 %conv3332}333 334define signext i16 @neq10(i16 signext %x, i16 signext %y) {335; CHECK-LABEL: neq10:336; CHECK: # %bb.0:337; CHECK-NEXT: add r3, r4, r3338; CHECK-NEXT: cntlzw r3, r3339; CHECK-NEXT: srwi r3, r3, 5340; CHECK-NEXT: xori r3, r3, 1341; CHECK-NEXT: blr342 %conv = sext i16 %y to i32343 %conv1 = sext i16 %x to i32344 %sub = sub nsw i32 0, %conv1345 %cmp = icmp ne i32 %conv, %sub346 %conv3 = zext i1 %cmp to i16347 ret i16 %conv3348}349 350define zeroext i16 @neq11(i16 zeroext %x, i16 zeroext %y) {351; CHECK-LABEL: neq11:352; CHECK: # %bb.0: # %entry353; CHECK-NEXT: add r3, r4, r3354; CHECK-NEXT: cntlzw r3, r3355; CHECK-NEXT: srwi r3, r3, 5356; CHECK-NEXT: xori r3, r3, 1357; CHECK-NEXT: blr358entry:359 %conv = zext i16 %y to i32360 %conv1 = zext i16 %x to i32361 %sub = sub nsw i32 0, %conv1362 %cmp = icmp ne i32 %conv, %sub363 %conv3 = zext i1 %cmp to i16364 ret i16 %conv3365}366 367define signext i32 @neq12(i32 signext %x, i32 signext %y) {368; CHECK-LABEL: neq12:369; CHECK: # %bb.0: # %entry370; CHECK-NEXT: add r3, r4, r3371; CHECK-NEXT: cntlzw r3, r3372; CHECK-NEXT: srwi r3, r3, 5373; CHECK-NEXT: xori r3, r3, 1374; CHECK-NEXT: blr375entry:376 %sub = sub nsw i32 0, %x377 %cmp = icmp ne i32 %sub, %y378 %conv = zext i1 %cmp to i32379 ret i32 %conv380}381 382define zeroext i32 @neq13(i32 zeroext %x, i32 zeroext %y) {383; CHECK-LABEL: neq13:384; CHECK: # %bb.0: # %entry385; CHECK-NEXT: add r3, r4, r3386; CHECK-NEXT: cntlzw r3, r3387; CHECK-NEXT: srwi r3, r3, 5388; CHECK-NEXT: xori r3, r3, 1389; CHECK-NEXT: blr390entry:391 %sub = sub i32 0, %x392 %cmp = icmp ne i32 %sub, %y393 %conv = zext i1 %cmp to i32394 ret i32 %conv395}396 397define i64 @neq14(i64 %x, i64 %y) {398; CHECK-LABEL: neq14:399; CHECK: # %bb.0:400; CHECK-NEXT: add r3, r4, r3401; CHECK-NEXT: addic r4, r3, -1402; CHECK-NEXT: subfe r3, r4, r3403; CHECK-NEXT: blr404 %sub = sub nsw i64 0, %x405 %cmp = icmp ne i64 %y, %sub406 %zext = zext i1 %cmp to i64407 ret i64 %zext408}409