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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mtriple=powerpc64le-unknown-linux-gnu \3; RUN: -ppc-asm-full-reg-names --ppc-vsr-nums-as-vr < %s | FileCheck %s --check-prefix=POWERPC_64LE4 5; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mtriple=powerpc64-ibm-aix \6; RUN: -ppc-asm-full-reg-names --ppc-vsr-nums-as-vr < %s | FileCheck %s --check-prefix=POWERPC_647 8; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mtriple=powerpc-ibm-aix \9; RUN: -ppc-asm-full-reg-names --ppc-vsr-nums-as-vr < %s | FileCheck %s --check-prefix=POWERPC_3210 11define i32 @test_Greater_than(ptr %colauths) {12; This testcase is for the special case of zero-vector comparisons.13; Currently the generated code does a comparison (vcmpequh) and then a negation (xxlnor).14; This pattern is expected to be optimized in a future patch.15; POWERPC_64LE-LABEL: test_Greater_than:16; POWERPC_64LE: # %bb.0: # %entry17; POWERPC_64LE-NEXT: lfd f0, 0(r3)18; POWERPC_64LE-NEXT: xxlxor v3, v3, v319; POWERPC_64LE-NEXT: li r4, 020; POWERPC_64LE-NEXT: li r3, 421; POWERPC_64LE-NEXT: xxswapd v2, f022; POWERPC_64LE-NEXT: vcmpequh v2, v2, v323; POWERPC_64LE-NEXT: xxlnor v2, v2, v224; POWERPC_64LE-NEXT: vmrglh v3, v2, v225; POWERPC_64LE-NEXT: vextuwrx r4, r4, v226; POWERPC_64LE-NEXT: vextuwrx r3, r3, v327; POWERPC_64LE-NEXT: clrlwi r4, r4, 3128; POWERPC_64LE-NEXT: rlwimi r4, r3, 1, 30, 3029; POWERPC_64LE-NEXT: mfvsrwz r3, v330; POWERPC_64LE-NEXT: rlwimi r4, r3, 2, 29, 2931; POWERPC_64LE-NEXT: li r3, 1232; POWERPC_64LE-NEXT: vextuwrx r3, r3, v333; POWERPC_64LE-NEXT: rlwimi r4, r3, 3, 28, 2834; POWERPC_64LE-NEXT: stb r4, -1(r1)35; POWERPC_64LE-NEXT: lbz r3, -1(r1)36; POWERPC_64LE-NEXT: popcntd r3, r337; POWERPC_64LE-NEXT: blr38;39; POWERPC_64-LABEL: test_Greater_than:40; POWERPC_64: # %bb.0: # %entry41; POWERPC_64-NEXT: lxsd v2, 0(r3)42; POWERPC_64-NEXT: xxlxor v3, v3, v343; POWERPC_64-NEXT: li r4, 1244; POWERPC_64-NEXT: li r3, 845; POWERPC_64-NEXT: vcmpequh v2, v2, v346; POWERPC_64-NEXT: xxlnor v2, v2, v247; POWERPC_64-NEXT: vmrghh v2, v2, v248; POWERPC_64-NEXT: vextuwlx r4, r4, v249; POWERPC_64-NEXT: vextuwlx r3, r3, v250; POWERPC_64-NEXT: clrlwi r4, r4, 3151; POWERPC_64-NEXT: rlwimi r4, r3, 1, 30, 3052; POWERPC_64-NEXT: mfvsrwz r3, v253; POWERPC_64-NEXT: rlwimi r4, r3, 2, 29, 2954; POWERPC_64-NEXT: li r3, 055; POWERPC_64-NEXT: vextuwlx r3, r3, v256; POWERPC_64-NEXT: rlwimi r4, r3, 3, 28, 2857; POWERPC_64-NEXT: stb r4, -1(r1)58; POWERPC_64-NEXT: lbz r3, -1(r1)59; POWERPC_64-NEXT: popcntd r3, r360; POWERPC_64-NEXT: blr61;62; POWERPC_32-LABEL: test_Greater_than:63; POWERPC_32: # %bb.0: # %entry64; POWERPC_32-NEXT: li r4, 465; POWERPC_32-NEXT: lxvwsx vs1, 0, r366; POWERPC_32-NEXT: xxlxor v3, v3, v367; POWERPC_32-NEXT: lxvwsx vs0, r3, r468; POWERPC_32-NEXT: xxmrghw v2, vs1, vs069; POWERPC_32-NEXT: vcmpequh v2, v2, v370; POWERPC_32-NEXT: xxlnor v2, v2, v271; POWERPC_32-NEXT: vmrghh v2, v2, v272; POWERPC_32-NEXT: stxv v2, -32(r1)73; POWERPC_32-NEXT: lwz r3, -20(r1)74; POWERPC_32-NEXT: lwz r4, -24(r1)75; POWERPC_32-NEXT: clrlwi r3, r3, 3176; POWERPC_32-NEXT: rlwimi r3, r4, 1, 30, 3077; POWERPC_32-NEXT: lwz r4, -28(r1)78; POWERPC_32-NEXT: rlwimi r3, r4, 2, 29, 2979; POWERPC_32-NEXT: lwz r4, -32(r1)80; POWERPC_32-NEXT: rlwimi r3, r4, 3, 28, 2881; POWERPC_32-NEXT: popcntw r3, r382; POWERPC_32-NEXT: blr83entry:84 %0 = load <4 x i16>, ptr %colauths, align 2, !tbaa !585 %1 = icmp ne <4 x i16> %0, zeroinitializer86 %2 = bitcast <4 x i1> %1 to i487 %3 = tail call range(i4 0, 5) i4 @llvm.ctpop.i4(i4 %2)88 %4 = zext nneg i4 %3 to i3289 ret i32 %490}91 92declare i4 @llvm.ctpop.i4(i4) #193 94!5 = !{!6, !6, i64 0}95!6 = !{!"short", !7, i64 0}96!7 = !{!"omnipotent char", !8, i64 0}97!8 = !{!"Simple C/C++ TBAA"}98 99; Function to lockdown changes for floating point vector comparisons100define range(i32 0, 5) i32 @cols_needed(ptr %colauths){101; POWERPC_64LE-LABEL: cols_needed:102; POWERPC_64LE: # %bb.0: # %entry103; POWERPC_64LE-NEXT: lxv vs0, 0(r3)104; POWERPC_64LE-NEXT: xxlxor vs1, vs1, vs1105; POWERPC_64LE-NEXT: li r4, 4106; POWERPC_64LE-NEXT: li r3, 0107; POWERPC_64LE-NEXT: xvcmpeqsp vs0, vs0, vs1108; POWERPC_64LE-NEXT: xxlnor v2, vs0, vs0109; POWERPC_64LE-NEXT: vextuwrx r4, r4, v2110; POWERPC_64LE-NEXT: vextuwrx r3, r3, v2111; POWERPC_64LE-NEXT: rlwinm r4, r4, 1, 30, 30112; POWERPC_64LE-NEXT: sub r3, r4, r3113; POWERPC_64LE-NEXT: mfvsrwz r4, v2114; POWERPC_64LE-NEXT: rlwinm r4, r4, 2, 29, 29115; POWERPC_64LE-NEXT: or r3, r3, r4116; POWERPC_64LE-NEXT: li r4, 12117; POWERPC_64LE-NEXT: vextuwrx r4, r4, v2118; POWERPC_64LE-NEXT: slwi r4, r4, 3119; POWERPC_64LE-NEXT: or r3, r3, r4120; POWERPC_64LE-NEXT: clrlwi r3, r3, 28121; POWERPC_64LE-NEXT: stb r3, -1(r1)122; POWERPC_64LE-NEXT: lbz r3, -1(r1)123; POWERPC_64LE-NEXT: popcntd r3, r3124; POWERPC_64LE-NEXT: blr125;126; POWERPC_64-LABEL: cols_needed:127; POWERPC_64: # %bb.0: # %entry128; POWERPC_64-NEXT: lxv vs0, 0(r3)129; POWERPC_64-NEXT: xxlxor vs1, vs1, vs1130; POWERPC_64-NEXT: li r4, 8131; POWERPC_64-NEXT: xvcmpeqsp vs0, vs0, vs1132; POWERPC_64-NEXT: xxlnor v2, vs0, vs0133; POWERPC_64-NEXT: vextuwlx r4, r4, v2134; POWERPC_64-NEXT: mfvsrwz r3, v2135; POWERPC_64-NEXT: rlwinm r4, r4, 1, 30, 30136; POWERPC_64-NEXT: rlwimi r4, r3, 2, 29, 29137; POWERPC_64-NEXT: li r3, 0138; POWERPC_64-NEXT: vextuwlx r3, r3, v2139; POWERPC_64-NEXT: rlwimi r4, r3, 3, 0, 28140; POWERPC_64-NEXT: li r3, 12141; POWERPC_64-NEXT: vextuwlx r3, r3, v2142; POWERPC_64-NEXT: sub r3, r4, r3143; POWERPC_64-NEXT: clrlwi r3, r3, 28144; POWERPC_64-NEXT: stb r3, -1(r1)145; POWERPC_64-NEXT: lbz r3, -1(r1)146; POWERPC_64-NEXT: popcntd r3, r3147; POWERPC_64-NEXT: blr148;149; POWERPC_32-LABEL: cols_needed:150; POWERPC_32: # %bb.0: # %entry151; POWERPC_32-NEXT: lxv vs0, 0(r3)152; POWERPC_32-NEXT: xxlxor vs1, vs1, vs1153; POWERPC_32-NEXT: xvcmpeqsp vs0, vs0, vs1154; POWERPC_32-NEXT: xxlnor vs0, vs0, vs0155; POWERPC_32-NEXT: stxv vs0, -32(r1)156; POWERPC_32-NEXT: lwz r3, -24(r1)157; POWERPC_32-NEXT: lwz r4, -28(r1)158; POWERPC_32-NEXT: rlwinm r3, r3, 1, 30, 30159; POWERPC_32-NEXT: rlwimi r3, r4, 2, 29, 29160; POWERPC_32-NEXT: lwz r4, -32(r1)161; POWERPC_32-NEXT: rlwimi r3, r4, 3, 0, 28162; POWERPC_32-NEXT: lwz r4, -20(r1)163; POWERPC_32-NEXT: sub r3, r3, r4164; POWERPC_32-NEXT: clrlwi r3, r3, 28165; POWERPC_32-NEXT: popcntw r3, r3166; POWERPC_32-NEXT: blr167entry:168 %0 = load <4 x float>, ptr %colauths, align 4, !tbaa !5169 %1 = fcmp une <4 x float> %0, zeroinitializer170 %2 = bitcast <4 x i1> %1 to i4171 %3 = tail call range(i4 0, 5) i4 @llvm.ctpop.i4(i4 %2)172 %4 = zext nneg i4 %3 to i32173 ret i32 %4174}175