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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 32; RUN: llc -verify-machineinstrs -mcpu=pwr7 < %s | FileCheck %s3; RUN: llc -verify-machineinstrs -O1 -mcpu=pwr7 < %s | FileCheck %s4; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-isel < %s | FileCheck --check-prefix=CHECK-NO-ISEL %s5; RUN: llc -verify-machineinstrs -O1 -mcpu=pwr7 -mattr=-isel < %s | FileCheck --check-prefix=CHECK-NO-ISEL %s6 7target datalayout = "E-m:e-i64:64-n32:64"8target triple = "powerpc64-unknown-linux-gnu"9 10define zeroext i1 @testi1(i1 zeroext %b1, i1 zeroext %b2) #0 {11; CHECK-LABEL: testi1:12; CHECK: # %bb.0: # %entry13; CHECK-NEXT: andi. 3, 3, 114; CHECK-NEXT: crmove 20, 115; CHECK-NEXT: andi. 3, 4, 116; CHECK-NEXT: li 3, 017; CHECK-NEXT: li 4, 118; CHECK-NEXT: #APP19; CHECK-NEXT: crand 20, 20, 120; CHECK-NEXT: #NO_APP21; CHECK-NEXT: isel 3, 4, 3, 2022; CHECK-NEXT: blr23;24; CHECK-NO-ISEL-LABEL: testi1:25; CHECK-NO-ISEL: # %bb.0: # %entry26; CHECK-NO-ISEL-NEXT: andi. 3, 3, 127; CHECK-NO-ISEL-NEXT: crmove 20, 128; CHECK-NO-ISEL-NEXT: andi. 3, 4, 129; CHECK-NO-ISEL-NEXT: li 3, 130; CHECK-NO-ISEL-NEXT: #APP31; CHECK-NO-ISEL-NEXT: crand 20, 20, 132; CHECK-NO-ISEL-NEXT: #NO_APP33; CHECK-NO-ISEL-NEXT: bclr 12, 20, 034; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry35; CHECK-NO-ISEL-NEXT: li 3, 036; CHECK-NO-ISEL-NEXT: blr37entry:38 %0 = tail call i8 asm "crand $0, $1, $2", "=^wc,^wc,^wc"(i1 %b1, i1 %b2) #039 %1 = and i8 %0, 140 %tobool3 = icmp ne i8 %1, 041 ret i1 %tobool342 43}44 45define signext i32 @testi32(i32 signext %b1, i32 signext %b2) #0 {46; CHECK-LABEL: testi32:47; CHECK: # %bb.0: # %entry48; CHECK-NEXT: andi. 3, 3, 149; CHECK-NEXT: crmove 20, 150; CHECK-NEXT: andi. 3, 4, 151; CHECK-NEXT: li 3, 052; CHECK-NEXT: li 4, -153; CHECK-NEXT: #APP54; CHECK-NEXT: crand 20, 20, 155; CHECK-NEXT: #NO_APP56; CHECK-NEXT: isel 3, 4, 3, 2057; CHECK-NEXT: blr58;59; CHECK-NO-ISEL-LABEL: testi32:60; CHECK-NO-ISEL: # %bb.0: # %entry61; CHECK-NO-ISEL-NEXT: andi. 3, 3, 162; CHECK-NO-ISEL-NEXT: crmove 20, 163; CHECK-NO-ISEL-NEXT: andi. 3, 4, 164; CHECK-NO-ISEL-NEXT: li 3, -165; CHECK-NO-ISEL-NEXT: #APP66; CHECK-NO-ISEL-NEXT: crand 20, 20, 167; CHECK-NO-ISEL-NEXT: #NO_APP68; CHECK-NO-ISEL-NEXT: bclr 12, 20, 069; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry70; CHECK-NO-ISEL-NEXT: li 3, 071; CHECK-NO-ISEL-NEXT: blr72entry:73 %0 = tail call i32 asm "crand $0, $1, $2", "=^wc,^wc,^wc"(i32 %b1, i32 %b2) #074 ret i32 %075 76; The ABI sign_extend should combine with the any_extend from the asm result,77; and the result will be 0 or -1. This highlights the fact that only the first78; bit is meaningful.79}80 81define zeroext i8 @testi8(i8 zeroext %b1, i8 zeroext %b2) #0 {82; CHECK-LABEL: testi8:83; CHECK: # %bb.0: # %entry84; CHECK-NEXT: andi. 3, 3, 185; CHECK-NEXT: crmove 20, 186; CHECK-NEXT: andi. 3, 4, 187; CHECK-NEXT: li 3, 088; CHECK-NEXT: li 4, 189; CHECK-NEXT: #APP90; CHECK-NEXT: crand 20, 20, 191; CHECK-NEXT: #NO_APP92; CHECK-NEXT: isel 3, 4, 3, 2093; CHECK-NEXT: blr94;95; CHECK-NO-ISEL-LABEL: testi8:96; CHECK-NO-ISEL: # %bb.0: # %entry97; CHECK-NO-ISEL-NEXT: andi. 3, 3, 198; CHECK-NO-ISEL-NEXT: crmove 20, 199; CHECK-NO-ISEL-NEXT: andi. 3, 4, 1100; CHECK-NO-ISEL-NEXT: li 3, 1101; CHECK-NO-ISEL-NEXT: #APP102; CHECK-NO-ISEL-NEXT: crand 20, 20, 1103; CHECK-NO-ISEL-NEXT: #NO_APP104; CHECK-NO-ISEL-NEXT: bclr 12, 20, 0105; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry106; CHECK-NO-ISEL-NEXT: li 3, 0107; CHECK-NO-ISEL-NEXT: blr108entry:109 %0 = tail call i8 asm "crand $0, $1, $2", "=^wc,^wc,^wc"(i8 %b1, i8 %b2) #0110 ret i8 %0111 112}113 114attributes #0 = { nounwind "target-features"="+crbits" }115 116