324 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 42; RUN: llc -O0 -frame-pointer=all -mtriple=powerpc-unknown-linux-gnu -mcpu=g5 < %s | FileCheck %s -check-prefix=PPC323; RUN: llc -O0 -mtriple=powerpc64-unknown-linux-gnu -mcpu=g5 < %s | FileCheck %s -check-prefix=PPC644; RUN: llc -O0 -mtriple=powerpc64le-unknown-linux-gnu -verify-machineinstrs < %s | FileCheck %s -check-prefix=PPC64-ELFv25 6declare void @foo()7 8define i32 @test_cr2() nounwind uwtable {9; PPC32-LABEL: test_cr2:10; PPC32: # %bb.0: # %entry11; PPC32-NEXT: mflr 012; PPC32-NEXT: stwu 1, -32(1)13; PPC32-NEXT: stw 31, 28(1)14; PPC32-NEXT: stw 0, 36(1)15; PPC32-NEXT: .cfi_def_cfa_offset 3216; PPC32-NEXT: .cfi_offset r31, -417; PPC32-NEXT: .cfi_offset lr, 418; PPC32-NEXT: mr 31, 119; PPC32-NEXT: .cfi_def_cfa_register r3120; PPC32-NEXT: .cfi_offset cr2, -821; PPC32-NEXT: mfcr 1222; PPC32-NEXT: stw 12, 24(31)23; PPC32-NEXT: li 3, 124; PPC32-NEXT: li 4, 225; PPC32-NEXT: li 5, 326; PPC32-NEXT: li 6, 027; PPC32-NEXT: #APP28; PPC32-EMPTY:29; PPC32-NEXT: mtcr 630; PPC32-NEXT: cmpw 2, 4, 331; PPC32-NEXT: mfcr 332; PPC32-NEXT: #NO_APP33; PPC32-NEXT: stw 3, 20(31)34; PPC32-NEXT: bl foo35; PPC32-NEXT: lwz 3, 20(31)36; PPC32-NEXT: lwz 12, 24(31)37; PPC32-NEXT: mtocrf 32, 1238; PPC32-NEXT: lwz 0, 36(1)39; PPC32-NEXT: lwz 31, 28(1)40; PPC32-NEXT: addi 1, 1, 3241; PPC32-NEXT: mtlr 042; PPC32-NEXT: blr43;44; PPC64-LABEL: test_cr2:45; PPC64: # %bb.0: # %entry46; PPC64-NEXT: mflr 047; PPC64-NEXT: mfcr 1248; PPC64-NEXT: stw 12, 8(1)49; PPC64-NEXT: stdu 1, -128(1)50; PPC64-NEXT: std 0, 144(1)51; PPC64-NEXT: .cfi_def_cfa_offset 12852; PPC64-NEXT: .cfi_offset lr, 1653; PPC64-NEXT: .cfi_offset cr2, 854; PPC64-NEXT: li 3, 155; PPC64-NEXT: li 4, 256; PPC64-NEXT: li 5, 357; PPC64-NEXT: li 6, 058; PPC64-NEXT: #APP59; PPC64-EMPTY:60; PPC64-NEXT: mtcr 661; PPC64-NEXT: cmpw 2, 4, 362; PPC64-NEXT: mfcr 363; PPC64-NEXT: #NO_APP64; PPC64-NEXT: stw 3, 124(1)65; PPC64-NEXT: bl foo66; PPC64-NEXT: nop67; PPC64-NEXT: lwz 3, 124(1)68; PPC64-NEXT: addi 1, 1, 12869; PPC64-NEXT: ld 0, 16(1)70; PPC64-NEXT: lwz 12, 8(1)71; PPC64-NEXT: mtocrf 32, 1272; PPC64-NEXT: mtlr 073; PPC64-NEXT: blr74;75; PPC64-ELFv2-LABEL: test_cr2:76; PPC64-ELFv2: # %bb.0: # %entry77; PPC64-ELFv2-NEXT: mflr 078; PPC64-ELFv2-NEXT: mfocrf 12, 3279; PPC64-ELFv2-NEXT: stw 12, 8(1)80; PPC64-ELFv2-NEXT: stdu 1, -112(1)81; PPC64-ELFv2-NEXT: std 0, 128(1)82; PPC64-ELFv2-NEXT: .cfi_def_cfa_offset 11283; PPC64-ELFv2-NEXT: .cfi_offset lr, 1684; PPC64-ELFv2-NEXT: .cfi_offset cr2, 885; PPC64-ELFv2-NEXT: li 3, 186; PPC64-ELFv2-NEXT: li 4, 287; PPC64-ELFv2-NEXT: li 5, 388; PPC64-ELFv2-NEXT: li 6, 089; PPC64-ELFv2-NEXT: #APP90; PPC64-ELFv2-EMPTY:91; PPC64-ELFv2-NEXT: mtcr 692; PPC64-ELFv2-NEXT: cmpw 2, 4, 393; PPC64-ELFv2-NEXT: mfcr 394; PPC64-ELFv2-NEXT: #NO_APP95; PPC64-ELFv2-NEXT: stw 3, 108(1)96; PPC64-ELFv2-NEXT: bl foo97; PPC64-ELFv2-NEXT: nop98; PPC64-ELFv2-NEXT: lwz 3, 108(1)99; PPC64-ELFv2-NEXT: addi 1, 1, 112100; PPC64-ELFv2-NEXT: ld 0, 16(1)101; PPC64-ELFv2-NEXT: lwz 12, 8(1)102; PPC64-ELFv2-NEXT: mtocrf 32, 12103; PPC64-ELFv2-NEXT: mtlr 0104; PPC64-ELFv2-NEXT: blr105entry:106 %ret = alloca i32, align 4107 %0 = call i32 asm sideeffect "\0A\09mtcr $4\0A\09cmpw 2,$2,$1\0A\09mfcr $0", "=r,r,r,r,r,~{cr2}"(i32 1, i32 2, i32 3, i32 0) nounwind108 store i32 %0, ptr %ret, align 4109 call void @foo()110 %1 = load i32, ptr %ret, align 4111 ret i32 %1112}113 114define i32 @test_cr234() nounwind {115; PPC32-LABEL: test_cr234:116; PPC32: # %bb.0: # %entry117; PPC32-NEXT: mflr 0118; PPC32-NEXT: stwu 1, -32(1)119; PPC32-NEXT: stw 31, 28(1)120; PPC32-NEXT: stw 0, 36(1)121; PPC32-NEXT: mr 31, 1122; PPC32-NEXT: mfcr 12123; PPC32-NEXT: stw 12, 24(31)124; PPC32-NEXT: li 3, 1125; PPC32-NEXT: li 4, 2126; PPC32-NEXT: li 5, 3127; PPC32-NEXT: li 6, 0128; PPC32-NEXT: #APP129; PPC32-EMPTY:130; PPC32-NEXT: mtcr 6131; PPC32-NEXT: cmpw 2, 4, 3132; PPC32-NEXT: cmpw 3, 4, 4133; PPC32-NEXT: cmpw 4, 4, 5134; PPC32-NEXT: mfcr 3135; PPC32-NEXT: #NO_APP136; PPC32-NEXT: stw 3, 20(31)137; PPC32-NEXT: bl foo138; PPC32-NEXT: lwz 3, 20(31)139; PPC32-NEXT: lwz 12, 24(31)140; PPC32-NEXT: mtocrf 32, 12141; PPC32-NEXT: mtocrf 16, 12142; PPC32-NEXT: mtocrf 8, 12143; PPC32-NEXT: lwz 0, 36(1)144; PPC32-NEXT: lwz 31, 28(1)145; PPC32-NEXT: addi 1, 1, 32146; PPC32-NEXT: mtlr 0147; PPC32-NEXT: blr148;149; PPC64-LABEL: test_cr234:150; PPC64: # %bb.0: # %entry151; PPC64-NEXT: mflr 0152; PPC64-NEXT: mfcr 12153; PPC64-NEXT: stw 12, 8(1)154; PPC64-NEXT: stdu 1, -128(1)155; PPC64-NEXT: std 0, 144(1)156; PPC64-NEXT: li 3, 1157; PPC64-NEXT: li 4, 2158; PPC64-NEXT: li 5, 3159; PPC64-NEXT: li 6, 0160; PPC64-NEXT: #APP161; PPC64-EMPTY:162; PPC64-NEXT: mtcr 6163; PPC64-NEXT: cmpw 2, 4, 3164; PPC64-NEXT: cmpw 3, 4, 4165; PPC64-NEXT: cmpw 4, 4, 5166; PPC64-NEXT: mfcr 3167; PPC64-NEXT: #NO_APP168; PPC64-NEXT: stw 3, 124(1)169; PPC64-NEXT: bl foo170; PPC64-NEXT: nop171; PPC64-NEXT: lwz 3, 124(1)172; PPC64-NEXT: addi 1, 1, 128173; PPC64-NEXT: ld 0, 16(1)174; PPC64-NEXT: lwz 12, 8(1)175; PPC64-NEXT: mtocrf 32, 12176; PPC64-NEXT: mtocrf 16, 12177; PPC64-NEXT: mtocrf 8, 12178; PPC64-NEXT: mtlr 0179; PPC64-NEXT: blr180;181; PPC64-ELFv2-LABEL: test_cr234:182; PPC64-ELFv2: # %bb.0: # %entry183; PPC64-ELFv2-NEXT: mflr 0184; PPC64-ELFv2-NEXT: mfcr 12185; PPC64-ELFv2-NEXT: stw 12, 8(1)186; PPC64-ELFv2-NEXT: stdu 1, -112(1)187; PPC64-ELFv2-NEXT: std 0, 128(1)188; PPC64-ELFv2-NEXT: li 3, 1189; PPC64-ELFv2-NEXT: li 4, 2190; PPC64-ELFv2-NEXT: li 5, 3191; PPC64-ELFv2-NEXT: li 6, 0192; PPC64-ELFv2-NEXT: #APP193; PPC64-ELFv2-EMPTY:194; PPC64-ELFv2-NEXT: mtcr 6195; PPC64-ELFv2-NEXT: cmpw 2, 4, 3196; PPC64-ELFv2-NEXT: cmpw 3, 4, 4197; PPC64-ELFv2-NEXT: cmpw 4, 4, 5198; PPC64-ELFv2-NEXT: mfcr 3199; PPC64-ELFv2-NEXT: #NO_APP200; PPC64-ELFv2-NEXT: stw 3, 108(1)201; PPC64-ELFv2-NEXT: bl foo202; PPC64-ELFv2-NEXT: nop203; PPC64-ELFv2-NEXT: lwz 3, 108(1)204; PPC64-ELFv2-NEXT: addi 1, 1, 112205; PPC64-ELFv2-NEXT: ld 0, 16(1)206; PPC64-ELFv2-NEXT: lwz 12, 8(1)207; PPC64-ELFv2-NEXT: mtocrf 32, 12208; PPC64-ELFv2-NEXT: mtocrf 16, 12209; PPC64-ELFv2-NEXT: mtocrf 8, 12210; PPC64-ELFv2-NEXT: mtlr 0211; PPC64-ELFv2-NEXT: blr212entry:213 %ret = alloca i32, align 4214 %0 = call i32 asm sideeffect "\0A\09mtcr $4\0A\09cmpw 2,$2,$1\0A\09cmpw 3,$2,$2\0A\09cmpw 4,$2,$3\0A\09mfcr $0", "=r,r,r,r,r,~{cr2},~{cr3},~{cr4}"(i32 1, i32 2, i32 3, i32 0) nounwind215 store i32 %0, ptr %ret, align 4216 call void @foo()217 %1 = load i32, ptr %ret, align 4218 ret i32 %1219}220 221; Generate mfocrf in prologue when we need to save 1 nonvolatile CR field222define void @cloberOneNvCrField() {223; PPC32-LABEL: cloberOneNvCrField:224; PPC32: # %bb.0: # %entry225; PPC32-NEXT: stwu 1, -32(1)226; PPC32-NEXT: stw 31, 28(1)227; PPC32-NEXT: .cfi_def_cfa_offset 32228; PPC32-NEXT: .cfi_offset r31, -4229; PPC32-NEXT: mr 31, 1230; PPC32-NEXT: .cfi_def_cfa_register r31231; PPC32-NEXT: .cfi_offset cr2, -8232; PPC32-NEXT: mfcr 12233; PPC32-NEXT: stw 12, 24(31)234; PPC32-NEXT: #APP235; PPC32-NEXT: # clobbers236; PPC32-NEXT: #NO_APP237; PPC32-NEXT: lwz 12, 24(31)238; PPC32-NEXT: mtocrf 32, 12239; PPC32-NEXT: lwz 31, 28(1)240; PPC32-NEXT: addi 1, 1, 32241; PPC32-NEXT: blr242;243; PPC64-LABEL: cloberOneNvCrField:244; PPC64: # %bb.0: # %entry245; PPC64-NEXT: mfcr 12246; PPC64-NEXT: stw 12, 8(1)247; PPC64-NEXT: #APP248; PPC64-NEXT: # clobbers249; PPC64-NEXT: #NO_APP250; PPC64-NEXT: lwz 12, 8(1)251; PPC64-NEXT: mtocrf 32, 12252; PPC64-NEXT: blr253;254; PPC64-ELFv2-LABEL: cloberOneNvCrField:255; PPC64-ELFv2: # %bb.0: # %entry256; PPC64-ELFv2-NEXT: mfocrf 12, 32257; PPC64-ELFv2-NEXT: stw 12, 8(1)258; PPC64-ELFv2-NEXT: #APP259; PPC64-ELFv2-NEXT: # clobbers260; PPC64-ELFv2-NEXT: #NO_APP261; PPC64-ELFv2-NEXT: lwz 12, 8(1)262; PPC64-ELFv2-NEXT: mtocrf 32, 12263; PPC64-ELFv2-NEXT: blr264entry:265 tail call void asm sideeffect "# clobbers", "~{cr2}"()266 ret void267}268 269; Generate mfcr in prologue when we need to save all nonvolatile CR field270define void @cloberAllNvCrField() {271; PPC32-LABEL: cloberAllNvCrField:272; PPC32: # %bb.0: # %entry273; PPC32-NEXT: stwu 1, -32(1)274; PPC32-NEXT: stw 31, 28(1)275; PPC32-NEXT: .cfi_def_cfa_offset 32276; PPC32-NEXT: .cfi_offset r31, -4277; PPC32-NEXT: mr 31, 1278; PPC32-NEXT: .cfi_def_cfa_register r31279; PPC32-NEXT: .cfi_offset cr2, -8280; PPC32-NEXT: .cfi_offset cr3, -8281; PPC32-NEXT: .cfi_offset cr4, -8282; PPC32-NEXT: mfcr 12283; PPC32-NEXT: stw 12, 24(31)284; PPC32-NEXT: #APP285; PPC32-NEXT: # clobbers286; PPC32-NEXT: #NO_APP287; PPC32-NEXT: lwz 12, 24(31)288; PPC32-NEXT: mtocrf 32, 12289; PPC32-NEXT: mtocrf 16, 12290; PPC32-NEXT: mtocrf 8, 12291; PPC32-NEXT: lwz 31, 28(1)292; PPC32-NEXT: addi 1, 1, 32293; PPC32-NEXT: blr294;295; PPC64-LABEL: cloberAllNvCrField:296; PPC64: # %bb.0: # %entry297; PPC64-NEXT: mfcr 12298; PPC64-NEXT: stw 12, 8(1)299; PPC64-NEXT: #APP300; PPC64-NEXT: # clobbers301; PPC64-NEXT: #NO_APP302; PPC64-NEXT: lwz 12, 8(1)303; PPC64-NEXT: mtocrf 32, 12304; PPC64-NEXT: mtocrf 16, 12305; PPC64-NEXT: mtocrf 8, 12306; PPC64-NEXT: blr307;308; PPC64-ELFv2-LABEL: cloberAllNvCrField:309; PPC64-ELFv2: # %bb.0: # %entry310; PPC64-ELFv2-NEXT: mfcr 12311; PPC64-ELFv2-NEXT: stw 12, 8(1)312; PPC64-ELFv2-NEXT: #APP313; PPC64-ELFv2-NEXT: # clobbers314; PPC64-ELFv2-NEXT: #NO_APP315; PPC64-ELFv2-NEXT: lwz 12, 8(1)316; PPC64-ELFv2-NEXT: mtocrf 32, 12317; PPC64-ELFv2-NEXT: mtocrf 16, 12318; PPC64-ELFv2-NEXT: mtocrf 8, 12319; PPC64-ELFv2-NEXT: blr320entry:321 tail call void asm sideeffect "# clobbers", "~{cr2},~{cr3},~{cr4}"()322 ret void323}324