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1; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -verify-machineinstrs -mcpu=pwr7 < %s | FileCheck %s2 3declare float @fabsf(float)4 5declare float @fminf(float, float)6declare double @fmin(double, double)7declare float @llvm.minnum.f32(float, float)8declare double @llvm.minnum.f64(double, double)9 10declare float @fmaxf(float, float)11declare double @fmax(double, double)12declare float @llvm.maxnum.f32(float, float)13declare double @llvm.maxnum.f64(double, double)14 15declare <4 x float> @llvm.minnum.v4f32(<4 x float>, <4 x float>)16declare <4 x double> @llvm.minnum.v4f64(<4 x double>, <4 x double>)17declare <4 x float> @llvm.maxnum.v4f32(<4 x float>, <4 x float>)18declare <4 x double> @llvm.maxnum.v4f64(<4 x double>, <4 x double>)19 20define void @test1(float %f, ptr %fp) {21entry:22 br label %loop_body23 24loop_body:25 %invar_address.dim.0.01 = phi i64 [ 0, %entry ], [ %1, %loop_body ]26 %0 = call float @llvm.minnum.f32(float %f, float 1.0)27 store float %0, ptr %fp, align 428 %1 = add i64 %invar_address.dim.0.01, 129 %2 = icmp eq i64 %1, 230 br i1 %2, label %loop_exit, label %loop_body31 32loop_exit:33 ret void34}35 36; CHECK-LABEL: test1:37; CHECK-NOT: mtctr38; CHECK: xsmindp39; CHECK-NOT: xsmindp40; CHECK-NOT: mtctr41; CHECK: blr42 43define void @test1v(<4 x float> %f, ptr %fp) {44entry:45 br label %loop_body46 47loop_body:48 %invar_address.dim.0.01 = phi i64 [ 0, %entry ], [ %1, %loop_body ]49 %0 = call <4 x float> @llvm.minnum.v4f32(<4 x float> %f, <4 x float> <float 1.0, float 1.0, float 1.0, float 1.0>)50 store <4 x float> %0, ptr %fp, align 1651 %1 = add i64 %invar_address.dim.0.01, 152 %2 = icmp eq i64 %1, 453 br i1 %2, label %loop_exit, label %loop_body54 55loop_exit:56 ret void57}58 59; CHECK-LABEL: test1v:60; CHECK: xvminsp61; CHECK-NOT: xsmindp62; CHECK: mtctr63; CHECK-NOT: xsmindp64; CHECK: blr65 66define void @test1a(float %f, ptr %fp) {67entry:68 br label %loop_body69 70loop_body:71 %invar_address.dim.0.01 = phi i64 [ 0, %entry ], [ %1, %loop_body ]72 %0 = call float @fminf(float %f, float 1.0) readnone73 store float %0, ptr %fp, align 474 %1 = add i64 %invar_address.dim.0.01, 175 %2 = icmp eq i64 %1, 276 br i1 %2, label %loop_exit, label %loop_body77 78loop_exit:79 ret void80}81 82; CHECK-LABEL: test1a:83; CHECK-NOT: mtctr84; CHECK: xsmindp85; CHECK-NOT: xsmindp86; CHECK-NOT: mtctr87; CHECK: blr88 89define void @test2(float %f, ptr %fp) {90entry:91 br label %loop_body92 93loop_body:94 %invar_address.dim.0.01 = phi i64 [ 0, %entry ], [ %1, %loop_body ]95 %0 = call float @llvm.maxnum.f32(float %f, float 1.0)96 store float %0, ptr %fp, align 497 %1 = add i64 %invar_address.dim.0.01, 198 %2 = icmp eq i64 %1, 299 br i1 %2, label %loop_exit, label %loop_body100 101loop_exit:102 ret void103}104 105; CHECK-LABEL: test2:106; CHECK-NOT: mtctr107; CHECK: xsmaxdp108; CHECK-NOT: xsmaxdp109; CHECK-NOT: mtctr110; CHECK: blr111 112define void @test2v(<4 x double> %f, ptr %fp) {113entry:114 br label %loop_body115 116loop_body:117 %invar_address.dim.0.01 = phi i64 [ 0, %entry ], [ %1, %loop_body ]118 %0 = call <4 x double> @llvm.maxnum.v4f64(<4 x double> %f, <4 x double> <double 1.0, double 1.0, double 1.0, double 1.0>)119 store <4 x double> %0, ptr %fp, align 16120 %1 = add i64 %invar_address.dim.0.01, 1121 %2 = icmp eq i64 %1, 4122 br i1 %2, label %loop_exit, label %loop_body123 124loop_exit:125 ret void126}127 128; CHECK-LABEL: test2v:129; CHECK: xvmaxdp130; CHECK: xvmaxdp131; CHECK-NOT: xsmaxdp132; CHECK: mtctr133; CHECK-NOT: xsmaxdp134; CHECK: blr135 136define void @test2a(float %f, ptr %fp) {137entry:138 br label %loop_body139 140loop_body:141 %invar_address.dim.0.01 = phi i64 [ 0, %entry ], [ %1, %loop_body ]142 %0 = call float @fmaxf(float %f, float 1.0) readnone143 store float %0, ptr %fp, align 4144 %1 = add i64 %invar_address.dim.0.01, 1145 %2 = icmp eq i64 %1, 2146 br i1 %2, label %loop_exit, label %loop_body147 148loop_exit:149 ret void150}151 152; CHECK-LABEL: test2a:153; CHECK-NOT: mtctr154; CHECK: xsmaxdp155; CHECK-NOT: xsmaxdp156; CHECK-NOT: mtctr157; CHECK: blr158 159define void @test3(double %f, ptr %fp) {160entry:161 br label %loop_body162 163loop_body:164 %invar_address.dim.0.01 = phi i64 [ 0, %entry ], [ %1, %loop_body ]165 %0 = call double @llvm.minnum.f64(double %f, double 1.0)166 store double %0, ptr %fp, align 8167 %1 = add i64 %invar_address.dim.0.01, 1168 %2 = icmp eq i64 %1, 2169 br i1 %2, label %loop_exit, label %loop_body170 171loop_exit:172 ret void173}174 175; CHECK-LABEL: test3:176; CHECK-NOT: mtctr177; CHECK: xsmindp178; CHECK-NOT: xsmindp179; CHECK-NOT: mtctr180; CHECK: blr181 182define void @test3a(double %f, ptr %fp) {183entry:184 br label %loop_body185 186loop_body:187 %invar_address.dim.0.01 = phi i64 [ 0, %entry ], [ %1, %loop_body ]188 %0 = call double @fmin(double %f, double 1.0) readnone189 store double %0, ptr %fp, align 8190 %1 = add i64 %invar_address.dim.0.01, 1191 %2 = icmp eq i64 %1, 2192 br i1 %2, label %loop_exit, label %loop_body193 194loop_exit:195 ret void196}197 198; CHECK-LABEL: test3a:199; CHECK-NOT: mtctr200; CHECK: xsmindp201; CHECK-NOT: xsmindp202; CHECK-NOT: mtctr203; CHECK: blr204 205define void @test4(double %f, ptr %fp) {206entry:207 br label %loop_body208 209loop_body:210 %invar_address.dim.0.01 = phi i64 [ 0, %entry ], [ %1, %loop_body ]211 %0 = call double @llvm.maxnum.f64(double %f, double 1.0)212 store double %0, ptr %fp, align 8213 %1 = add i64 %invar_address.dim.0.01, 1214 %2 = icmp eq i64 %1, 2215 br i1 %2, label %loop_exit, label %loop_body216 217loop_exit:218 ret void219}220 221; CHECK-LABEL: test4:222; CHECK-NOT: mtctr223; CHECK: xsmaxdp224; CHECK-NOT: xsmaxdp225; CHECK-NOT: mtctr226; CHECK: blr227 228define void @test4a(double %f, ptr %fp) {229entry:230 br label %loop_body231 232loop_body:233 %invar_address.dim.0.01 = phi i64 [ 0, %entry ], [ %1, %loop_body ]234 %0 = call double @fmax(double %f, double 1.0) readnone235 store double %0, ptr %fp, align 8236 %1 = add i64 %invar_address.dim.0.01, 1237 %2 = icmp eq i64 %1, 2238 br i1 %2, label %loop_exit, label %loop_body239 240loop_exit:241 ret void242}243 244; CHECK-LABEL: test4a:245; CHECK-NOT: mtctr246; CHECK: xsmaxdp247; CHECK-NOT: xsmaxdp248; CHECK-NOT: mtctr249; CHECK: blr250 251