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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \3; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names < %s | FileCheck %s4; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \5; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names < %s | FileCheck %s \6; RUN: --check-prefix=CHECK-BE7 8; This test checks that LSR properly recognizes lxvp/stxvp as load/store9; intrinsics to avoid generating x-form instructions instead of d-forms.10 11declare <256 x i1> @llvm.ppc.vsx.lxvp(ptr)12declare void @llvm.ppc.vsx.stxvp(<256 x i1>, ptr)13define void @foo(i32 zeroext %n, ptr %ptr, ptr %ptr2) {14; CHECK-LABEL: foo:15; CHECK: # %bb.0: # %entry16; CHECK-NEXT: cmplwi r3, 017; CHECK-NEXT: beqlr cr018; CHECK-NEXT: # %bb.1: # %for.body.lr.ph19; CHECK-NEXT: addi r4, r4, 6420; CHECK-NEXT: addi r5, r5, 6421; CHECK-NEXT: mtctr r322; CHECK-NEXT: .p2align 423; CHECK-NEXT: .LBB0_2: # %for.body24; CHECK-NEXT: #25; CHECK-NEXT: lxvp vsp34, -64(r4)26; CHECK-NEXT: lxvp vsp36, -32(r4)27; CHECK-NEXT: lxvp vsp32, 0(r4)28; CHECK-NEXT: lxvp vsp38, 32(r4)29; CHECK-NEXT: addi r4, r4, 130; CHECK-NEXT: stxvp vsp34, -64(r5)31; CHECK-NEXT: stxvp vsp36, -32(r5)32; CHECK-NEXT: stxvp vsp32, 0(r5)33; CHECK-NEXT: stxvp vsp38, 32(r5)34; CHECK-NEXT: addi r5, r5, 135; CHECK-NEXT: bdnz .LBB0_236; CHECK-NEXT: # %bb.3: # %for.cond.cleanup37; CHECK-NEXT: blr38;39; CHECK-BE-LABEL: foo:40; CHECK-BE: # %bb.0: # %entry41; CHECK-BE-NEXT: cmplwi r3, 042; CHECK-BE-NEXT: beqlr cr043; CHECK-BE-NEXT: # %bb.1: # %for.body.lr.ph44; CHECK-BE-NEXT: addi r4, r4, 6445; CHECK-BE-NEXT: addi r5, r5, 6446; CHECK-BE-NEXT: mtctr r347; CHECK-BE-NEXT: .p2align 448; CHECK-BE-NEXT: .LBB0_2: # %for.body49; CHECK-BE-NEXT: #50; CHECK-BE-NEXT: lxvp vsp34, -64(r4)51; CHECK-BE-NEXT: lxvp vsp36, -32(r4)52; CHECK-BE-NEXT: lxvp vsp32, 0(r4)53; CHECK-BE-NEXT: lxvp vsp38, 32(r4)54; CHECK-BE-NEXT: addi r4, r4, 155; CHECK-BE-NEXT: stxvp vsp34, -64(r5)56; CHECK-BE-NEXT: stxvp vsp36, -32(r5)57; CHECK-BE-NEXT: stxvp vsp32, 0(r5)58; CHECK-BE-NEXT: stxvp vsp38, 32(r5)59; CHECK-BE-NEXT: addi r5, r5, 160; CHECK-BE-NEXT: bdnz .LBB0_261; CHECK-BE-NEXT: # %bb.3: # %for.cond.cleanup62; CHECK-BE-NEXT: blr63entry:64 %cmp35.not = icmp eq i32 %n, 065 br i1 %cmp35.not, label %for.cond.cleanup, label %for.body.lr.ph66 67for.body.lr.ph:68 %wide.trip.count = zext i32 %n to i6469 br label %for.body70 71for.cond.cleanup:72 ret void73 74for.body:75 %indvars.iv = phi i64 [ 0, %for.body.lr.ph ], [ %indvars.iv.next, %for.body ]76 %0 = getelementptr i8, ptr %ptr, i64 %indvars.iv77 %1 = tail call <256 x i1> @llvm.ppc.vsx.lxvp(ptr %0)78 %add2 = add nuw nsw i64 %indvars.iv, 3279 %2 = getelementptr i8, ptr %ptr, i64 %add280 %3 = tail call <256 x i1> @llvm.ppc.vsx.lxvp(ptr %2)81 %add4 = add nuw nsw i64 %indvars.iv, 6482 %4 = getelementptr i8, ptr %ptr, i64 %add483 %5 = tail call <256 x i1> @llvm.ppc.vsx.lxvp(ptr %4)84 %add6 = add nuw nsw i64 %indvars.iv, 9685 %6 = getelementptr i8, ptr %ptr, i64 %add686 %7 = tail call <256 x i1> @llvm.ppc.vsx.lxvp(ptr %6)87 %8 = getelementptr i8, ptr %ptr2, i64 %indvars.iv88 tail call void @llvm.ppc.vsx.stxvp(<256 x i1> %1, ptr %8)89 %9 = getelementptr i8, ptr %ptr2, i64 %add290 tail call void @llvm.ppc.vsx.stxvp(<256 x i1> %3, ptr %9)91 %10 = getelementptr i8, ptr %ptr2, i64 %add492 tail call void @llvm.ppc.vsx.stxvp(<256 x i1> %5, ptr %10)93 %11 = getelementptr i8, ptr %ptr2, i64 %add694 tail call void @llvm.ppc.vsx.stxvp(<256 x i1> %7, ptr %11)95 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 196 %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count97 br i1 %exitcond.not, label %for.cond.cleanup, label %for.body98}99 100