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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2target datalayout = "e-m:e-i64:64-n32:64"3target triple = "powerpc64le-unknown-linux-gnu"4; This file mainly tests the case that the two input registers of the ISEL instruction are the same register.5; The foldable ISEL in this test case is introduced at register coalescing stage.6 7; Before that stage we have:8; %vreg18<def> = ISEL8 %vreg5, %vreg2, %vreg15<undef>;9 10; At register coalescing stage, the register coalescer figures out it could remove the copy11; from %vreg2 to %vreg5, put the original value %X3 into %vreg5 directly12; erased: 336r %vreg5<def> = COPY %vreg213; updated: 288B %vreg5<def> = COPY %X3;14 15; After that we have:16; updated: 416B %vreg18<def> = ISEL8 %vreg5, %vreg5, %vreg15<undef>;17 18; RUN: llc -verify-machineinstrs -O2 -ppc-asm-full-reg-names -mcpu=pwr7 -mattr=+isel < %s | FileCheck %s --check-prefix=CHECK-GEN-ISEL-TRUE19; RUN: llc -verify-machineinstrs -O2 -ppc-asm-full-reg-names -mcpu=pwr7 -mattr=-isel < %s | FileCheck %s --implicit-check-not isel20%"struct.pov::ot_block_struct" = type { ptr, [3 x double], [3 x double], float, float, float, float, float, float, float, float, float, [3 x float], float, float, [3 x double], i16 }21%"struct.pov::ot_node_struct" = type { %"struct.pov::ot_id_struct", ptr, [8 x ptr] }22%"struct.pov::ot_id_struct" = type { i32, i32, i32, i32 }23 24define void @_ZN3pov6ot_insEPPNS_14ot_node_structEPNS_15ot_block_structEPNS_12ot_id_structE(ptr %new_block) {25; CHECK-GEN-ISEL-TRUE-LABEL: _ZN3pov6ot_insEPPNS_14ot_node_structEPNS_15ot_block_structEPNS_12ot_id_structE:26; CHECK-GEN-ISEL-TRUE: # %bb.0: # %entry27; CHECK-GEN-ISEL-TRUE-NEXT: mflr r028; CHECK-GEN-ISEL-TRUE-NEXT: .cfi_def_cfa_offset 6429; CHECK-GEN-ISEL-TRUE-NEXT: .cfi_offset lr, 1630; CHECK-GEN-ISEL-TRUE-NEXT: .cfi_offset r29, -2431; CHECK-GEN-ISEL-TRUE-NEXT: .cfi_offset r30, -1632; CHECK-GEN-ISEL-TRUE-NEXT: std r29, -24(r1) # 8-byte Folded Spill33; CHECK-GEN-ISEL-TRUE-NEXT: std r30, -16(r1) # 8-byte Folded Spill34; CHECK-GEN-ISEL-TRUE-NEXT: stdu r1, -64(r1)35; CHECK-GEN-ISEL-TRUE-NEXT: mr r30, r336; CHECK-GEN-ISEL-TRUE-NEXT: std r0, 80(r1)37; CHECK-GEN-ISEL-TRUE-NEXT: # implicit-def: $x338; CHECK-GEN-ISEL-TRUE-NEXT: # implicit-def: $r2939; CHECK-GEN-ISEL-TRUE-NEXT: b .LBB0_240; CHECK-GEN-ISEL-TRUE-NEXT: .p2align 441; CHECK-GEN-ISEL-TRUE-NEXT: .LBB0_1: # %cond.false21.i15642; CHECK-GEN-ISEL-TRUE-NEXT: #43; CHECK-GEN-ISEL-TRUE-NEXT: addi r4, r29, 144; CHECK-GEN-ISEL-TRUE-NEXT: srawi r4, r4, 145; CHECK-GEN-ISEL-TRUE-NEXT: addze r29, r446; CHECK-GEN-ISEL-TRUE-NEXT: .LBB0_2: # %while.cond1147; CHECK-GEN-ISEL-TRUE-NEXT: #48; CHECK-GEN-ISEL-TRUE-NEXT: lwz r4, 0(r3)49; CHECK-GEN-ISEL-TRUE-NEXT: cmplwi r4, 050; CHECK-GEN-ISEL-TRUE-NEXT: beq cr0, .LBB0_551; CHECK-GEN-ISEL-TRUE-NEXT: # %bb.3: # %while.body2152; CHECK-GEN-ISEL-TRUE-NEXT: #53; CHECK-GEN-ISEL-TRUE-NEXT: bl ZN3pov10pov_callocEmmPKciS1_pov54; CHECK-GEN-ISEL-TRUE-NEXT: nop55; CHECK-GEN-ISEL-TRUE-NEXT: std r3, 0(r3)56; CHECK-GEN-ISEL-TRUE-NEXT: bc 12, 4*cr5+lt, .LBB0_157; CHECK-GEN-ISEL-TRUE-NEXT: # %bb.4: # %cond.true18.i15358; CHECK-GEN-ISEL-TRUE-NEXT: #59; CHECK-GEN-ISEL-TRUE-NEXT: srwi r29, r29, 160; CHECK-GEN-ISEL-TRUE-NEXT: b .LBB0_261; CHECK-GEN-ISEL-TRUE-NEXT: .LBB0_5: # %lor.rhs62; CHECK-GEN-ISEL-TRUE-NEXT: std r30, 16(r3)63; CHECK-GEN-ISEL-TRUE-NEXT: addi r1, r1, 6464; CHECK-GEN-ISEL-TRUE-NEXT: ld r0, 16(r1)65; CHECK-GEN-ISEL-TRUE-NEXT: ld r30, -16(r1) # 8-byte Folded Reload66; CHECK-GEN-ISEL-TRUE-NEXT: ld r29, -24(r1) # 8-byte Folded Reload67; CHECK-GEN-ISEL-TRUE-NEXT: mtlr r068; CHECK-GEN-ISEL-TRUE-NEXT: blr69;70; CHECK-LABEL: _ZN3pov6ot_insEPPNS_14ot_node_structEPNS_15ot_block_structEPNS_12ot_id_structE:71; CHECK: # %bb.0: # %entry72; CHECK-NEXT: mflr r073; CHECK-NEXT: .cfi_def_cfa_offset 6474; CHECK-NEXT: .cfi_offset lr, 1675; CHECK-NEXT: .cfi_offset r29, -2476; CHECK-NEXT: .cfi_offset r30, -1677; CHECK-NEXT: std r29, -24(r1) # 8-byte Folded Spill78; CHECK-NEXT: std r30, -16(r1) # 8-byte Folded Spill79; CHECK-NEXT: stdu r1, -64(r1)80; CHECK-NEXT: mr r30, r381; CHECK-NEXT: std r0, 80(r1)82; CHECK-NEXT: # implicit-def: $x383; CHECK-NEXT: # implicit-def: $r2984; CHECK-NEXT: b .LBB0_285; CHECK-NEXT: .p2align 486; CHECK-NEXT: .LBB0_1: # %cond.false21.i15687; CHECK-NEXT: #88; CHECK-NEXT: addi r4, r29, 189; CHECK-NEXT: srawi r4, r4, 190; CHECK-NEXT: addze r29, r491; CHECK-NEXT: .LBB0_2: # %while.cond1192; CHECK-NEXT: #93; CHECK-NEXT: lwz r4, 0(r3)94; CHECK-NEXT: cmplwi r4, 095; CHECK-NEXT: beq cr0, .LBB0_596; CHECK-NEXT: # %bb.3: # %while.body2197; CHECK-NEXT: #98; CHECK-NEXT: bl ZN3pov10pov_callocEmmPKciS1_pov99; CHECK-NEXT: nop100; CHECK-NEXT: std r3, 0(r3)101; CHECK-NEXT: bc 12, 4*cr5+lt, .LBB0_1102; CHECK-NEXT: # %bb.4: # %cond.true18.i153103; CHECK-NEXT: #104; CHECK-NEXT: srwi r29, r29, 1105; CHECK-NEXT: b .LBB0_2106; CHECK-NEXT: .LBB0_5: # %lor.rhs107; CHECK-NEXT: std r30, 16(r3)108; CHECK-NEXT: addi r1, r1, 64109; CHECK-NEXT: ld r0, 16(r1)110; CHECK-NEXT: ld r30, -16(r1) # 8-byte Folded Reload111; CHECK-NEXT: ld r29, -24(r1) # 8-byte Folded Reload112; CHECK-NEXT: mtlr r0113; CHECK-NEXT: blr114entry:115 br label %while.cond11116 117while.cond11:118 %this_node.0250 = phi ptr [ undef, %entry ], [ %1, %cond.false21.i156 ], [ %1, %cond.true18.i153 ]119 %temp_id.sroa.21.1 = phi i32 [ undef, %entry ], [ %shr2039.i152, %cond.true18.i153 ], [ %div24.i155, %cond.false21.i156 ]120 %0 = load i32, ptr undef, align 4121 %cmp17 = icmp eq i32 0, %0122 br i1 %cmp17, label %lor.rhs, label %while.body21123 124lor.rhs:125 %Values = getelementptr inbounds %"struct.pov::ot_node_struct", ptr %this_node.0250, i64 0, i32 1126 store ptr %new_block, ptr %Values, align 8127 ret void128 129while.body21:130 %call.i84 = tail call ptr @ZN3pov10pov_callocEmmPKciS1_pov()131 store ptr %call.i84, ptr undef, align 8132 %1 = bitcast ptr %call.i84 to ptr133 br i1 undef, label %cond.true18.i153, label %cond.false21.i156134 135cond.true18.i153:136 %shr2039.i152 = lshr i32 %temp_id.sroa.21.1, 1137 br label %while.cond11138 139cond.false21.i156:140 %add23.i154 = add nsw i32 %temp_id.sroa.21.1, 1141 %div24.i155 = sdiv i32 %add23.i154, 2142 br label %while.cond11143}144 145declare ptr @ZN3pov10pov_callocEmmPKciS1_pov()146