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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-unknown -verify-machineinstrs \3; RUN: -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | FileCheck %s4; RUN: llc -mcpu=pwr9 -mtriple=powerpc64-unknown-unknown -verify-machineinstrs \5; RUN: -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \6; RUN: FileCheck %s --check-prefix=CHECK-BE7; RUN: llc -mcpu=pwr8 -mtriple=powerpc64le-unknown-unknown -verify-machineinstrs \8; RUN: -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | FileCheck %s \9; RUN: -check-prefix=CHECK-P810 11; Function Attrs: norecurse nounwind readnone12define i64 @getPart1(fp128 %in) local_unnamed_addr {13; CHECK-LABEL: getPart1:14; CHECK: # %bb.0: # %entry15; CHECK-NEXT: mfvsrld r3, v216; CHECK-NEXT: blr17;18; CHECK-BE-LABEL: getPart1:19; CHECK-BE: # %bb.0: # %entry20; CHECK-BE-NEXT: mfvsrld r3, v221; CHECK-BE-NEXT: blr22;23; CHECK-P8-LABEL: getPart1:24; CHECK-P8: # %bb.0: # %entry25; CHECK-P8-NEXT: xxswapd vs0, v226; CHECK-P8-NEXT: mffprd r3, f027; CHECK-P8-NEXT: blr28entry:29 %0 = bitcast fp128 %in to i12830 %a.sroa.0.0.extract.trunc = trunc i128 %0 to i6431 ret i64 %a.sroa.0.0.extract.trunc32}33 34; Function Attrs: norecurse nounwind readnone35define i64 @getPart2(fp128 %in) local_unnamed_addr {36; CHECK-LABEL: getPart2:37; CHECK: # %bb.0: # %entry38; CHECK-NEXT: mfvsrd r3, v239; CHECK-NEXT: blr40;41; CHECK-BE-LABEL: getPart2:42; CHECK-BE: # %bb.0: # %entry43; CHECK-BE-NEXT: mfvsrd r3, v244; CHECK-BE-NEXT: blr45;46; CHECK-P8-LABEL: getPart2:47; CHECK-P8: # %bb.0: # %entry48; CHECK-P8-NEXT: mfvsrd r3, v249; CHECK-P8-NEXT: blr50entry:51 %0 = bitcast fp128 %in to i12852 %a.sroa.0.8.extract.shift = lshr i128 %0, 6453 %a.sroa.0.8.extract.trunc = trunc i128 %a.sroa.0.8.extract.shift to i6454 ret i64 %a.sroa.0.8.extract.trunc55}56 57; Function Attrs: norecurse nounwind readnone58define i64 @checkBitcast(fp128 %in, <2 x i64> %in2, ptr %out) local_unnamed_addr {59; CHECK-LABEL: checkBitcast:60; CHECK: # %bb.0: # %entry61; CHECK-NEXT: mfvsrld r3, v262; CHECK-NEXT: vaddudm v2, v2, v363; CHECK-NEXT: stxv v2, 0(r7)64; CHECK-NEXT: blr65;66; CHECK-BE-LABEL: checkBitcast:67; CHECK-BE: # %bb.0: # %entry68; CHECK-BE-NEXT: mfvsrd r3, v269; CHECK-BE-NEXT: vaddudm v2, v2, v370; CHECK-BE-NEXT: stxv v2, 0(r7)71; CHECK-BE-NEXT: blr72;73; CHECK-P8-LABEL: checkBitcast:74; CHECK-P8: # %bb.0: # %entry75; CHECK-P8-NEXT: xxswapd vs0, v276; CHECK-P8-NEXT: vaddudm v2, v2, v377; CHECK-P8-NEXT: mffprd r3, f078; CHECK-P8-NEXT: xxswapd vs1, v279; CHECK-P8-NEXT: stxvd2x vs1, 0, r780; CHECK-P8-NEXT: blr81entry:82 %0 = bitcast fp128 %in to <2 x i64>83 %1 = extractelement <2 x i64> %0, i64 084 %2 = add <2 x i64> %0, %in285 store <2 x i64> %2, ptr %out, align 1686 ret i64 %187}88 89define <4 x i32> @truncBitcast(i512 %a) {90; CHECK-LABEL: truncBitcast:91; CHECK: # %bb.0: # %entry92; CHECK-NEXT: mtvsrdd v2, r4, r393; CHECK-NEXT: blr94;95; CHECK-BE-LABEL: truncBitcast:96; CHECK-BE: # %bb.0: # %entry97; CHECK-BE-NEXT: mtvsrdd v2, r9, r1098; CHECK-BE-NEXT: blr99;100; CHECK-P8-LABEL: truncBitcast:101; CHECK-P8: # %bb.0: # %entry102; CHECK-P8-NEXT: mtfprd f0, r3103; CHECK-P8-NEXT: mtfprd f1, r4104; CHECK-P8-NEXT: xxmrghd v2, vs1, vs0105; CHECK-P8-NEXT: blr106entry:107 %0 = trunc i512 %a to i128108 %1 = bitcast i128 %0 to <4 x i32>109 ret <4 x i32> %1110}111