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1; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s --check-prefix=PPC642; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -mtriple=powerpc64-ibm-aix-xcoff -mcpu=pwr7 | FileCheck %s --check-prefix=PPC643 4; Test add with non-legal types5 6define void @add_i8(i8 %a, i8 %b) nounwind {7entry:8; PPC64: add_i89 %a.addr = alloca i8, align 410 %0 = add i8 %a, %b11; PPC64: add12 store i8 %0, ptr %a.addr, align 413 ret void14}15 16define void @add_i8_imm(i8 %a) nounwind {17entry:18; PPC64: add_i8_imm19 %a.addr = alloca i8, align 420 %0 = add i8 %a, 22;21; PPC64: addi22 store i8 %0, ptr %a.addr, align 423 ret void24}25 26define void @add_i16(i16 %a, i16 %b) nounwind {27entry:28; PPC64: add_i1629 %a.addr = alloca i16, align 430 %0 = add i16 %a, %b31; PPC64: add32 store i16 %0, ptr %a.addr, align 433 ret void34}35 36define void @add_i16_imm(i16 %a, i16 %b) nounwind {37entry:38; PPC64: add_i16_imm39 %a.addr = alloca i16, align 440 %0 = add i16 %a, 243;41; PPC64: addi42 store i16 %0, ptr %a.addr, align 443 ret void44}45 46; Test or with non-legal types47 48define void @or_i8(i8 %a, i8 %b) nounwind {49entry:50; PPC64: or_i851 %a.addr = alloca i8, align 452 %0 = or i8 %a, %b53; PPC64: or54 store i8 %0, ptr %a.addr, align 455 ret void56}57 58define void @or_i8_imm(i8 %a) nounwind {59entry:60; PPC64: or_i8_imm61 %a.addr = alloca i8, align 462 %0 = or i8 %a, -13;63; PPC64: ori64 store i8 %0, ptr %a.addr, align 465 ret void66}67 68define void @or_i16(i16 %a, i16 %b) nounwind {69entry:70; PPC64: or_i1671 %a.addr = alloca i16, align 472 %0 = or i16 %a, %b73; PPC64: or74 store i16 %0, ptr %a.addr, align 475 ret void76}77 78define void @or_i16_imm(i16 %a) nounwind {79entry:80; PPC64: or_i16_imm81 %a.addr = alloca i16, align 482 %0 = or i16 %a, 273;83; PPC64: ori84 store i16 %0, ptr %a.addr, align 485 ret void86}87 88; Test sub with non-legal types89 90define void @sub_i8(i8 %a, i8 %b) nounwind {91entry:92; PPC64: sub_i893 %a.addr = alloca i8, align 494 %0 = sub i8 %a, %b95; PPC64: sub96 store i8 %0, ptr %a.addr, align 497 ret void98}99 100define void @sub_i8_imm(i8 %a) nounwind {101entry:102; PPC64: sub_i8_imm103 %a.addr = alloca i8, align 4104 %0 = sub i8 %a, 22;105; PPC64: addi106 store i8 %0, ptr %a.addr, align 4107 ret void108}109 110define void @sub_i16(i16 %a, i16 %b) nounwind {111entry:112; PPC64: sub_i16113 %a.addr = alloca i16, align 4114 %0 = sub i16 %a, %b115; PPC64: sub116 store i16 %0, ptr %a.addr, align 4117 ret void118}119 120define void @sub_i16_imm(i16 %a) nounwind {121entry:122; PPC64: sub_i16_imm123 %a.addr = alloca i16, align 4124 %0 = sub i16 %a, 247;125; PPC64: addi126 store i16 %0, ptr %a.addr, align 4127 ret void128}129 130define void @sub_i16_badimm(i16 %a) nounwind {131entry:132; PPC64: sub_i16_imm133 %a.addr = alloca i16, align 4134 %0 = sub i16 %a, -32768;135; PPC64: sub136 store i16 %0, ptr %a.addr, align 4137 ret void138}139