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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s -mtriple=powerpc64-unknown-linux -mcpu=pwr8 | FileCheck %s3; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s -mtriple=powerpc64le-unknown-linux -mcpu=pwr9 | FileCheck %s4; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s -mtriple=powerpc64le-unknown-linux -mcpu=pwr8 -mattr=-vsx | FileCheck %s -check-prefix=NOVSX5; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s -mtriple=powerpc-unknown-linux -mattr=spe | FileCheck %s -check-prefix=SPE6 7declare float @llvm.experimental.constrained.fadd.f32(float, float, metadata, metadata)8declare double @llvm.experimental.constrained.fadd.f64(double, double, metadata, metadata)9declare <4 x float> @llvm.experimental.constrained.fadd.v4f32(<4 x float>, <4 x float>, metadata, metadata)10declare <2 x double> @llvm.experimental.constrained.fadd.v2f64(<2 x double>, <2 x double>, metadata, metadata)11 12declare float @llvm.experimental.constrained.fsub.f32(float, float, metadata, metadata)13declare double @llvm.experimental.constrained.fsub.f64(double, double, metadata, metadata)14declare <4 x float> @llvm.experimental.constrained.fsub.v4f32(<4 x float>, <4 x float>, metadata, metadata)15declare <2 x double> @llvm.experimental.constrained.fsub.v2f64(<2 x double>, <2 x double>, metadata, metadata)16 17declare float @llvm.experimental.constrained.fmul.f32(float, float, metadata, metadata)18declare double @llvm.experimental.constrained.fmul.f64(double, double, metadata, metadata)19declare <4 x float> @llvm.experimental.constrained.fmul.v4f32(<4 x float>, <4 x float>, metadata, metadata)20declare <2 x double> @llvm.experimental.constrained.fmul.v2f64(<2 x double>, <2 x double>, metadata, metadata)21 22declare float @llvm.experimental.constrained.fdiv.f32(float, float, metadata, metadata)23declare double @llvm.experimental.constrained.fdiv.f64(double, double, metadata, metadata)24declare <4 x float> @llvm.experimental.constrained.fdiv.v4f32(<4 x float>, <4 x float>, metadata, metadata)25declare <2 x double> @llvm.experimental.constrained.fdiv.v2f64(<2 x double>, <2 x double>, metadata, metadata)26 27declare float @llvm.experimental.constrained.fma.f32(float, float, float, metadata, metadata)28declare double @llvm.experimental.constrained.fma.f64(double, double, double, metadata, metadata)29declare <4 x float> @llvm.experimental.constrained.fma.v4f32(<4 x float>, <4 x float>, <4 x float>, metadata, metadata)30declare <2 x double> @llvm.experimental.constrained.fma.v2f64(<2 x double>, <2 x double>, <2 x double>, metadata, metadata)31 32declare float @llvm.experimental.constrained.sqrt.f32(float, metadata, metadata)33declare double @llvm.experimental.constrained.sqrt.f64(double, metadata, metadata)34declare <4 x float> @llvm.experimental.constrained.sqrt.v4f32(<4 x float>, metadata, metadata)35declare <2 x double> @llvm.experimental.constrained.sqrt.v2f64(<2 x double>, metadata, metadata)36 37define float @fadd_f32(float %f1, float %f2) #0 {38; CHECK-LABEL: fadd_f32:39; CHECK: # %bb.0:40; CHECK-NEXT: xsaddsp f1, f1, f241; CHECK-NEXT: blr42;43; NOVSX-LABEL: fadd_f32:44; NOVSX: # %bb.0:45; NOVSX-NEXT: fadds f1, f1, f246; NOVSX-NEXT: blr47;48; SPE-LABEL: fadd_f32:49; SPE: # %bb.0:50; SPE-NEXT: efsadd r3, r3, r451; SPE-NEXT: blr52 %res = call float @llvm.experimental.constrained.fadd.f32(53 float %f1, float %f2,54 metadata !"round.dynamic",55 metadata !"fpexcept.strict") #056 ret float %res57}58 59define double @fadd_f64(double %f1, double %f2) #0 {60; CHECK-LABEL: fadd_f64:61; CHECK: # %bb.0:62; CHECK-NEXT: xsadddp f1, f1, f263; CHECK-NEXT: blr64;65; NOVSX-LABEL: fadd_f64:66; NOVSX: # %bb.0:67; NOVSX-NEXT: fadd f1, f1, f268; NOVSX-NEXT: blr69;70; SPE-LABEL: fadd_f64:71; SPE: # %bb.0:72; SPE-NEXT: evmergelo r5, r5, r673; SPE-NEXT: evmergelo r3, r3, r474; SPE-NEXT: efdadd r4, r3, r575; SPE-NEXT: evmergehi r3, r4, r476; SPE-NEXT: blr77 %res = call double @llvm.experimental.constrained.fadd.f64(78 double %f1, double %f2,79 metadata !"round.dynamic",80 metadata !"fpexcept.strict") #081 ret double %res82}83 84define <4 x float> @fadd_v4f32(<4 x float> %vf1, <4 x float> %vf2) #0 {85; CHECK-LABEL: fadd_v4f32:86; CHECK: # %bb.0:87; CHECK-NEXT: xvaddsp v2, v2, v388; CHECK-NEXT: blr89;90; NOVSX-LABEL: fadd_v4f32:91; NOVSX: # %bb.0:92; NOVSX-NEXT: addi r3, r1, -3293; NOVSX-NEXT: stvx v3, 0, r394; NOVSX-NEXT: addi r3, r1, -4895; NOVSX-NEXT: stvx v2, 0, r396; NOVSX-NEXT: addi r3, r1, -1697; NOVSX-NEXT: lfs f0, -20(r1)98; NOVSX-NEXT: lfs f1, -36(r1)99; NOVSX-NEXT: fadds f0, f1, f0100; NOVSX-NEXT: lfs f1, -40(r1)101; NOVSX-NEXT: stfs f0, -4(r1)102; NOVSX-NEXT: lfs f0, -24(r1)103; NOVSX-NEXT: fadds f0, f1, f0104; NOVSX-NEXT: lfs f1, -44(r1)105; NOVSX-NEXT: stfs f0, -8(r1)106; NOVSX-NEXT: lfs f0, -28(r1)107; NOVSX-NEXT: fadds f0, f1, f0108; NOVSX-NEXT: lfs f1, -48(r1)109; NOVSX-NEXT: stfs f0, -12(r1)110; NOVSX-NEXT: lfs f0, -32(r1)111; NOVSX-NEXT: fadds f0, f1, f0112; NOVSX-NEXT: stfs f0, -16(r1)113; NOVSX-NEXT: lvx v2, 0, r3114; NOVSX-NEXT: blr115;116; SPE-LABEL: fadd_v4f32:117; SPE: # %bb.0:118; SPE-NEXT: efsadd r6, r6, r10119; SPE-NEXT: efsadd r5, r5, r9120; SPE-NEXT: efsadd r4, r4, r8121; SPE-NEXT: efsadd r3, r3, r7122; SPE-NEXT: blr123 %res = call <4 x float> @llvm.experimental.constrained.fadd.v4f32(124 <4 x float> %vf1, <4 x float> %vf2,125 metadata !"round.dynamic",126 metadata !"fpexcept.strict") #0127 ret <4 x float> %res128}129 130define <2 x double> @fadd_v2f64(<2 x double> %vf1, <2 x double> %vf2) #0 {131; CHECK-LABEL: fadd_v2f64:132; CHECK: # %bb.0:133; CHECK-NEXT: xvadddp v2, v2, v3134; CHECK-NEXT: blr135;136; NOVSX-LABEL: fadd_v2f64:137; NOVSX: # %bb.0:138; NOVSX-NEXT: fadd f2, f2, f4139; NOVSX-NEXT: fadd f1, f1, f3140; NOVSX-NEXT: blr141;142; SPE-LABEL: fadd_v2f64:143; SPE: # %bb.0:144; SPE-NEXT: evldd r4, 8(r1)145; SPE-NEXT: evmergelo r7, r7, r8146; SPE-NEXT: evmergelo r8, r9, r10147; SPE-NEXT: li r9, 8148; SPE-NEXT: evmergelo r5, r5, r6149; SPE-NEXT: efdadd r4, r7, r4150; SPE-NEXT: evstddx r4, r3, r9151; SPE-NEXT: efdadd r4, r5, r8152; SPE-NEXT: evstdd r4, 0(r3)153; SPE-NEXT: blr154 %res = call <2 x double> @llvm.experimental.constrained.fadd.v2f64(155 <2 x double> %vf1, <2 x double> %vf2,156 metadata !"round.dynamic",157 metadata !"fpexcept.strict") #0158 ret <2 x double> %res159}160 161define float @fsub_f32(float %f1, float %f2) #0 {162; CHECK-LABEL: fsub_f32:163; CHECK: # %bb.0:164; CHECK-NEXT: xssubsp f1, f1, f2165; CHECK-NEXT: blr166;167; NOVSX-LABEL: fsub_f32:168; NOVSX: # %bb.0:169; NOVSX-NEXT: fsubs f1, f1, f2170; NOVSX-NEXT: blr171;172; SPE-LABEL: fsub_f32:173; SPE: # %bb.0:174; SPE-NEXT: efssub r3, r3, r4175; SPE-NEXT: blr176 177 %res = call float @llvm.experimental.constrained.fsub.f32(178 float %f1, float %f2,179 metadata !"round.dynamic",180 metadata !"fpexcept.strict") #0181 ret float %res;182}183 184define double @fsub_f64(double %f1, double %f2) #0 {185; CHECK-LABEL: fsub_f64:186; CHECK: # %bb.0:187; CHECK-NEXT: xssubdp f1, f1, f2188; CHECK-NEXT: blr189;190; NOVSX-LABEL: fsub_f64:191; NOVSX: # %bb.0:192; NOVSX-NEXT: fsub f1, f1, f2193; NOVSX-NEXT: blr194;195; SPE-LABEL: fsub_f64:196; SPE: # %bb.0:197; SPE-NEXT: evmergelo r5, r5, r6198; SPE-NEXT: evmergelo r3, r3, r4199; SPE-NEXT: efdsub r4, r3, r5200; SPE-NEXT: evmergehi r3, r4, r4201; SPE-NEXT: blr202 203 %res = call double @llvm.experimental.constrained.fsub.f64(204 double %f1, double %f2,205 metadata !"round.dynamic",206 metadata !"fpexcept.strict") #0207 ret double %res;208}209 210define <4 x float> @fsub_v4f32(<4 x float> %vf1, <4 x float> %vf2) #0 {211; CHECK-LABEL: fsub_v4f32:212; CHECK: # %bb.0:213; CHECK-NEXT: xvsubsp v2, v2, v3214; CHECK-NEXT: blr215;216; NOVSX-LABEL: fsub_v4f32:217; NOVSX: # %bb.0:218; NOVSX-NEXT: addi r3, r1, -32219; NOVSX-NEXT: stvx v3, 0, r3220; NOVSX-NEXT: addi r3, r1, -48221; NOVSX-NEXT: stvx v2, 0, r3222; NOVSX-NEXT: addi r3, r1, -16223; NOVSX-NEXT: lfs f0, -20(r1)224; NOVSX-NEXT: lfs f1, -36(r1)225; NOVSX-NEXT: fsubs f0, f1, f0226; NOVSX-NEXT: lfs f1, -40(r1)227; NOVSX-NEXT: stfs f0, -4(r1)228; NOVSX-NEXT: lfs f0, -24(r1)229; NOVSX-NEXT: fsubs f0, f1, f0230; NOVSX-NEXT: lfs f1, -44(r1)231; NOVSX-NEXT: stfs f0, -8(r1)232; NOVSX-NEXT: lfs f0, -28(r1)233; NOVSX-NEXT: fsubs f0, f1, f0234; NOVSX-NEXT: lfs f1, -48(r1)235; NOVSX-NEXT: stfs f0, -12(r1)236; NOVSX-NEXT: lfs f0, -32(r1)237; NOVSX-NEXT: fsubs f0, f1, f0238; NOVSX-NEXT: stfs f0, -16(r1)239; NOVSX-NEXT: lvx v2, 0, r3240; NOVSX-NEXT: blr241;242; SPE-LABEL: fsub_v4f32:243; SPE: # %bb.0:244; SPE-NEXT: efssub r6, r6, r10245; SPE-NEXT: efssub r5, r5, r9246; SPE-NEXT: efssub r4, r4, r8247; SPE-NEXT: efssub r3, r3, r7248; SPE-NEXT: blr249 %res = call <4 x float> @llvm.experimental.constrained.fsub.v4f32(250 <4 x float> %vf1, <4 x float> %vf2,251 metadata !"round.dynamic",252 metadata !"fpexcept.strict") #0253 ret <4 x float> %res;254}255 256define <2 x double> @fsub_v2f64(<2 x double> %vf1, <2 x double> %vf2) #0 {257; CHECK-LABEL: fsub_v2f64:258; CHECK: # %bb.0:259; CHECK-NEXT: xvsubdp v2, v2, v3260; CHECK-NEXT: blr261;262; NOVSX-LABEL: fsub_v2f64:263; NOVSX: # %bb.0:264; NOVSX-NEXT: fsub f2, f2, f4265; NOVSX-NEXT: fsub f1, f1, f3266; NOVSX-NEXT: blr267;268; SPE-LABEL: fsub_v2f64:269; SPE: # %bb.0:270; SPE-NEXT: evldd r4, 8(r1)271; SPE-NEXT: evmergelo r7, r7, r8272; SPE-NEXT: evmergelo r8, r9, r10273; SPE-NEXT: li r9, 8274; SPE-NEXT: evmergelo r5, r5, r6275; SPE-NEXT: efdsub r4, r7, r4276; SPE-NEXT: evstddx r4, r3, r9277; SPE-NEXT: efdsub r4, r5, r8278; SPE-NEXT: evstdd r4, 0(r3)279; SPE-NEXT: blr280 %res = call <2 x double> @llvm.experimental.constrained.fsub.v2f64(281 <2 x double> %vf1, <2 x double> %vf2,282 metadata !"round.dynamic",283 metadata !"fpexcept.strict") #0284 ret <2 x double> %res;285}286 287define float @fmul_f32(float %f1, float %f2) #0 {288; CHECK-LABEL: fmul_f32:289; CHECK: # %bb.0:290; CHECK-NEXT: xsmulsp f1, f1, f2291; CHECK-NEXT: blr292;293; NOVSX-LABEL: fmul_f32:294; NOVSX: # %bb.0:295; NOVSX-NEXT: fmuls f1, f1, f2296; NOVSX-NEXT: blr297;298; SPE-LABEL: fmul_f32:299; SPE: # %bb.0:300; SPE-NEXT: efsmul r3, r3, r4301; SPE-NEXT: blr302 303 %res = call float @llvm.experimental.constrained.fmul.f32(304 float %f1, float %f2,305 metadata !"round.dynamic",306 metadata !"fpexcept.strict") #0307 ret float %res;308}309 310define double @fmul_f64(double %f1, double %f2) #0 {311; CHECK-LABEL: fmul_f64:312; CHECK: # %bb.0:313; CHECK-NEXT: xsmuldp f1, f1, f2314; CHECK-NEXT: blr315;316; NOVSX-LABEL: fmul_f64:317; NOVSX: # %bb.0:318; NOVSX-NEXT: fmul f1, f1, f2319; NOVSX-NEXT: blr320;321; SPE-LABEL: fmul_f64:322; SPE: # %bb.0:323; SPE-NEXT: evmergelo r5, r5, r6324; SPE-NEXT: evmergelo r3, r3, r4325; SPE-NEXT: efdmul r4, r3, r5326; SPE-NEXT: evmergehi r3, r4, r4327; SPE-NEXT: blr328 329 %res = call double @llvm.experimental.constrained.fmul.f64(330 double %f1, double %f2,331 metadata !"round.dynamic",332 metadata !"fpexcept.strict") #0333 ret double %res;334}335 336define <4 x float> @fmul_v4f32(<4 x float> %vf1, <4 x float> %vf2) #0 {337; CHECK-LABEL: fmul_v4f32:338; CHECK: # %bb.0:339; CHECK-NEXT: xvmulsp v2, v2, v3340; CHECK-NEXT: blr341;342; NOVSX-LABEL: fmul_v4f32:343; NOVSX: # %bb.0:344; NOVSX-NEXT: addi r3, r1, -32345; NOVSX-NEXT: stvx v3, 0, r3346; NOVSX-NEXT: addi r3, r1, -48347; NOVSX-NEXT: stvx v2, 0, r3348; NOVSX-NEXT: addi r3, r1, -16349; NOVSX-NEXT: lfs f0, -20(r1)350; NOVSX-NEXT: lfs f1, -36(r1)351; NOVSX-NEXT: fmuls f0, f1, f0352; NOVSX-NEXT: lfs f1, -40(r1)353; NOVSX-NEXT: stfs f0, -4(r1)354; NOVSX-NEXT: lfs f0, -24(r1)355; NOVSX-NEXT: fmuls f0, f1, f0356; NOVSX-NEXT: lfs f1, -44(r1)357; NOVSX-NEXT: stfs f0, -8(r1)358; NOVSX-NEXT: lfs f0, -28(r1)359; NOVSX-NEXT: fmuls f0, f1, f0360; NOVSX-NEXT: lfs f1, -48(r1)361; NOVSX-NEXT: stfs f0, -12(r1)362; NOVSX-NEXT: lfs f0, -32(r1)363; NOVSX-NEXT: fmuls f0, f1, f0364; NOVSX-NEXT: stfs f0, -16(r1)365; NOVSX-NEXT: lvx v2, 0, r3366; NOVSX-NEXT: blr367;368; SPE-LABEL: fmul_v4f32:369; SPE: # %bb.0:370; SPE-NEXT: efsmul r6, r6, r10371; SPE-NEXT: efsmul r5, r5, r9372; SPE-NEXT: efsmul r4, r4, r8373; SPE-NEXT: efsmul r3, r3, r7374; SPE-NEXT: blr375 %res = call <4 x float> @llvm.experimental.constrained.fmul.v4f32(376 <4 x float> %vf1, <4 x float> %vf2,377 metadata !"round.dynamic",378 metadata !"fpexcept.strict") #0379 ret <4 x float> %res;380}381 382define <2 x double> @fmul_v2f64(<2 x double> %vf1, <2 x double> %vf2) #0 {383; CHECK-LABEL: fmul_v2f64:384; CHECK: # %bb.0:385; CHECK-NEXT: xvmuldp v2, v2, v3386; CHECK-NEXT: blr387;388; NOVSX-LABEL: fmul_v2f64:389; NOVSX: # %bb.0:390; NOVSX-NEXT: fmul f2, f2, f4391; NOVSX-NEXT: fmul f1, f1, f3392; NOVSX-NEXT: blr393;394; SPE-LABEL: fmul_v2f64:395; SPE: # %bb.0:396; SPE-NEXT: evldd r4, 8(r1)397; SPE-NEXT: evmergelo r7, r7, r8398; SPE-NEXT: evmergelo r8, r9, r10399; SPE-NEXT: li r9, 8400; SPE-NEXT: evmergelo r5, r5, r6401; SPE-NEXT: efdmul r4, r7, r4402; SPE-NEXT: evstddx r4, r3, r9403; SPE-NEXT: efdmul r4, r5, r8404; SPE-NEXT: evstdd r4, 0(r3)405; SPE-NEXT: blr406 %res = call <2 x double> @llvm.experimental.constrained.fmul.v2f64(407 <2 x double> %vf1, <2 x double> %vf2,408 metadata !"round.dynamic",409 metadata !"fpexcept.strict") #0410 ret <2 x double> %res;411}412 413define float @fdiv_f32(float %f1, float %f2) #0 {414; CHECK-LABEL: fdiv_f32:415; CHECK: # %bb.0:416; CHECK-NEXT: xsdivsp f1, f1, f2417; CHECK-NEXT: blr418;419; NOVSX-LABEL: fdiv_f32:420; NOVSX: # %bb.0:421; NOVSX-NEXT: fdivs f1, f1, f2422; NOVSX-NEXT: blr423;424; SPE-LABEL: fdiv_f32:425; SPE: # %bb.0:426; SPE-NEXT: efsdiv r3, r3, r4427; SPE-NEXT: blr428 429 %res = call float @llvm.experimental.constrained.fdiv.f32(430 float %f1, float %f2,431 metadata !"round.dynamic",432 metadata !"fpexcept.strict") #0433 ret float %res;434}435 436define double @fdiv_f64(double %f1, double %f2) #0 {437; CHECK-LABEL: fdiv_f64:438; CHECK: # %bb.0:439; CHECK-NEXT: xsdivdp f1, f1, f2440; CHECK-NEXT: blr441;442; NOVSX-LABEL: fdiv_f64:443; NOVSX: # %bb.0:444; NOVSX-NEXT: fdiv f1, f1, f2445; NOVSX-NEXT: blr446;447; SPE-LABEL: fdiv_f64:448; SPE: # %bb.0:449; SPE-NEXT: evmergelo r5, r5, r6450; SPE-NEXT: evmergelo r3, r3, r4451; SPE-NEXT: efddiv r4, r3, r5452; SPE-NEXT: evmergehi r3, r4, r4453; SPE-NEXT: blr454 455 %res = call double @llvm.experimental.constrained.fdiv.f64(456 double %f1, double %f2,457 metadata !"round.dynamic",458 metadata !"fpexcept.strict") #0459 ret double %res;460}461 462define <4 x float> @fdiv_v4f32(<4 x float> %vf1, <4 x float> %vf2) #0 {463; CHECK-LABEL: fdiv_v4f32:464; CHECK: # %bb.0:465; CHECK-NEXT: xvdivsp v2, v2, v3466; CHECK-NEXT: blr467;468; NOVSX-LABEL: fdiv_v4f32:469; NOVSX: # %bb.0:470; NOVSX-NEXT: addi r3, r1, -32471; NOVSX-NEXT: stvx v3, 0, r3472; NOVSX-NEXT: addi r3, r1, -48473; NOVSX-NEXT: stvx v2, 0, r3474; NOVSX-NEXT: addi r3, r1, -16475; NOVSX-NEXT: lfs f0, -20(r1)476; NOVSX-NEXT: lfs f1, -36(r1)477; NOVSX-NEXT: fdivs f0, f1, f0478; NOVSX-NEXT: lfs f1, -40(r1)479; NOVSX-NEXT: stfs f0, -4(r1)480; NOVSX-NEXT: lfs f0, -24(r1)481; NOVSX-NEXT: fdivs f0, f1, f0482; NOVSX-NEXT: lfs f1, -44(r1)483; NOVSX-NEXT: stfs f0, -8(r1)484; NOVSX-NEXT: lfs f0, -28(r1)485; NOVSX-NEXT: fdivs f0, f1, f0486; NOVSX-NEXT: lfs f1, -48(r1)487; NOVSX-NEXT: stfs f0, -12(r1)488; NOVSX-NEXT: lfs f0, -32(r1)489; NOVSX-NEXT: fdivs f0, f1, f0490; NOVSX-NEXT: stfs f0, -16(r1)491; NOVSX-NEXT: lvx v2, 0, r3492; NOVSX-NEXT: blr493;494; SPE-LABEL: fdiv_v4f32:495; SPE: # %bb.0:496; SPE-NEXT: efsdiv r6, r6, r10497; SPE-NEXT: efsdiv r5, r5, r9498; SPE-NEXT: efsdiv r4, r4, r8499; SPE-NEXT: efsdiv r3, r3, r7500; SPE-NEXT: blr501 %res = call <4 x float> @llvm.experimental.constrained.fdiv.v4f32(502 <4 x float> %vf1, <4 x float> %vf2,503 metadata !"round.dynamic",504 metadata !"fpexcept.strict") #0505 ret <4 x float> %res506}507 508define <2 x double> @fdiv_v2f64(<2 x double> %vf1, <2 x double> %vf2) #0 {509; CHECK-LABEL: fdiv_v2f64:510; CHECK: # %bb.0:511; CHECK-NEXT: xvdivdp v2, v2, v3512; CHECK-NEXT: blr513;514; NOVSX-LABEL: fdiv_v2f64:515; NOVSX: # %bb.0:516; NOVSX-NEXT: fdiv f2, f2, f4517; NOVSX-NEXT: fdiv f1, f1, f3518; NOVSX-NEXT: blr519;520; SPE-LABEL: fdiv_v2f64:521; SPE: # %bb.0:522; SPE-NEXT: evldd r4, 8(r1)523; SPE-NEXT: evmergelo r7, r7, r8524; SPE-NEXT: evmergelo r8, r9, r10525; SPE-NEXT: evmergelo r5, r5, r6526; SPE-NEXT: efddiv r4, r7, r4527; SPE-NEXT: li r7, 8528; SPE-NEXT: evstddx r4, r3, r7529; SPE-NEXT: efddiv r4, r5, r8530; SPE-NEXT: evstdd r4, 0(r3)531; SPE-NEXT: blr532 %res = call <2 x double> @llvm.experimental.constrained.fdiv.v2f64(533 <2 x double> %vf1, <2 x double> %vf2,534 metadata !"round.dynamic",535 metadata !"fpexcept.strict") #0536 ret <2 x double> %res537}538 539define double @no_fma_fold(double %f1, double %f2, double %f3) #0 {540; CHECK-LABEL: no_fma_fold:541; CHECK: # %bb.0:542; CHECK-NEXT: xsmuldp f0, f1, f2543; CHECK-NEXT: xsadddp f1, f0, f3544; CHECK-NEXT: blr545;546; NOVSX-LABEL: no_fma_fold:547; NOVSX: # %bb.0:548; NOVSX-NEXT: fmul f0, f1, f2549; NOVSX-NEXT: fadd f1, f0, f3550; NOVSX-NEXT: blr551;552; SPE-LABEL: no_fma_fold:553; SPE: # %bb.0:554; SPE-NEXT: evmergelo r7, r7, r8555; SPE-NEXT: evmergelo r5, r5, r6556; SPE-NEXT: evmergelo r3, r3, r4557; SPE-NEXT: efdmul r3, r3, r5558; SPE-NEXT: efdadd r4, r3, r7559; SPE-NEXT: evmergehi r3, r4, r4560; SPE-NEXT: blr561 %mul = call double @llvm.experimental.constrained.fmul.f64(562 double %f1, double %f2,563 metadata !"round.dynamic",564 metadata !"fpexcept.strict") #0565 %add = call double @llvm.experimental.constrained.fadd.f64(566 double %mul, double %f3,567 metadata !"round.dynamic",568 metadata !"fpexcept.strict") #0569 ret double %add570}571 572define float @fmadd_f32(float %f0, float %f1, float %f2) #0 {573; CHECK-LABEL: fmadd_f32:574; CHECK: # %bb.0:575; CHECK-NEXT: xsmaddasp f3, f1, f2576; CHECK-NEXT: fmr f1, f3577; CHECK-NEXT: blr578;579; NOVSX-LABEL: fmadd_f32:580; NOVSX: # %bb.0:581; NOVSX-NEXT: fmadds f1, f1, f2, f3582; NOVSX-NEXT: blr583;584; SPE-LABEL: fmadd_f32:585; SPE: # %bb.0:586; SPE-NEXT: mflr r0587; SPE-NEXT: stwu r1, -16(r1)588; SPE-NEXT: stw r0, 20(r1)589; SPE-NEXT: .cfi_def_cfa_offset 16590; SPE-NEXT: .cfi_offset lr, 4591; SPE-NEXT: bl fmaf592; SPE-NEXT: lwz r0, 20(r1)593; SPE-NEXT: addi r1, r1, 16594; SPE-NEXT: mtlr r0595; SPE-NEXT: blr596 %res = call float @llvm.experimental.constrained.fma.f32(597 float %f0, float %f1, float %f2,598 metadata !"round.dynamic",599 metadata !"fpexcept.strict") #0600 ret float %res601}602 603define double @fmadd_f64(double %f0, double %f1, double %f2) #0 {604; CHECK-LABEL: fmadd_f64:605; CHECK: # %bb.0:606; CHECK-NEXT: xsmaddadp f3, f1, f2607; CHECK-NEXT: fmr f1, f3608; CHECK-NEXT: blr609;610; NOVSX-LABEL: fmadd_f64:611; NOVSX: # %bb.0:612; NOVSX-NEXT: fmadd f1, f1, f2, f3613; NOVSX-NEXT: blr614;615; SPE-LABEL: fmadd_f64:616; SPE: # %bb.0:617; SPE-NEXT: mflr r0618; SPE-NEXT: stwu r1, -16(r1)619; SPE-NEXT: stw r0, 20(r1)620; SPE-NEXT: .cfi_def_cfa_offset 16621; SPE-NEXT: .cfi_offset lr, 4622; SPE-NEXT: evmergelo r8, r7, r8623; SPE-NEXT: evmergelo r6, r5, r6624; SPE-NEXT: evmergelo r4, r3, r4625; SPE-NEXT: evmergehi r3, r4, r4626; SPE-NEXT: evmergehi r5, r6, r6627; SPE-NEXT: evmergehi r7, r8, r8628; SPE-NEXT: bl fma629; SPE-NEXT: evmergelo r4, r3, r4630; SPE-NEXT: evmergehi r3, r4, r4631; SPE-NEXT: lwz r0, 20(r1)632; SPE-NEXT: addi r1, r1, 16633; SPE-NEXT: mtlr r0634; SPE-NEXT: blr635 %res = call double @llvm.experimental.constrained.fma.f64(636 double %f0, double %f1, double %f2,637 metadata !"round.dynamic",638 metadata !"fpexcept.strict") #0639 ret double %res640}641 642define <4 x float> @fmadd_v4f32(<4 x float> %vf0, <4 x float> %vf1, <4 x float> %vf2) #0 {643; CHECK-LABEL: fmadd_v4f32:644; CHECK: # %bb.0:645; CHECK-NEXT: xvmaddasp v4, v2, v3646; CHECK-NEXT: vmr v2, v4647; CHECK-NEXT: blr648;649; NOVSX-LABEL: fmadd_v4f32:650; NOVSX: # %bb.0:651; NOVSX-NEXT: addi r3, r1, -32652; NOVSX-NEXT: stvx v4, 0, r3653; NOVSX-NEXT: addi r3, r1, -48654; NOVSX-NEXT: stvx v3, 0, r3655; NOVSX-NEXT: addi r3, r1, -64656; NOVSX-NEXT: stvx v2, 0, r3657; NOVSX-NEXT: addi r3, r1, -16658; NOVSX-NEXT: lfs f0, -20(r1)659; NOVSX-NEXT: lfs f1, -36(r1)660; NOVSX-NEXT: lfs f2, -52(r1)661; NOVSX-NEXT: fmadds f0, f2, f1, f0662; NOVSX-NEXT: lfs f1, -40(r1)663; NOVSX-NEXT: lfs f2, -56(r1)664; NOVSX-NEXT: stfs f0, -4(r1)665; NOVSX-NEXT: lfs f0, -24(r1)666; NOVSX-NEXT: fmadds f0, f2, f1, f0667; NOVSX-NEXT: lfs f1, -44(r1)668; NOVSX-NEXT: lfs f2, -60(r1)669; NOVSX-NEXT: stfs f0, -8(r1)670; NOVSX-NEXT: lfs f0, -28(r1)671; NOVSX-NEXT: fmadds f0, f2, f1, f0672; NOVSX-NEXT: lfs f1, -48(r1)673; NOVSX-NEXT: lfs f2, -64(r1)674; NOVSX-NEXT: stfs f0, -12(r1)675; NOVSX-NEXT: lfs f0, -32(r1)676; NOVSX-NEXT: fmadds f0, f2, f1, f0677; NOVSX-NEXT: stfs f0, -16(r1)678; NOVSX-NEXT: lvx v2, 0, r3679; NOVSX-NEXT: blr680;681; SPE-LABEL: fmadd_v4f32:682; SPE: # %bb.0:683; SPE-NEXT: mflr r0684; SPE-NEXT: stwu r1, -64(r1)685; SPE-NEXT: stw r0, 68(r1)686; SPE-NEXT: .cfi_def_cfa_offset 64687; SPE-NEXT: .cfi_offset lr, 4688; SPE-NEXT: .cfi_offset r21, -44689; SPE-NEXT: .cfi_offset r22, -40690; SPE-NEXT: .cfi_offset r23, -36691; SPE-NEXT: .cfi_offset r24, -32692; SPE-NEXT: .cfi_offset r25, -28693; SPE-NEXT: .cfi_offset r26, -24694; SPE-NEXT: .cfi_offset r27, -20695; SPE-NEXT: .cfi_offset r28, -16696; SPE-NEXT: .cfi_offset r29, -12697; SPE-NEXT: .cfi_offset r30, -8698; SPE-NEXT: stw r27, 44(r1) # 4-byte Folded Spill699; SPE-NEXT: mr r27, r5700; SPE-NEXT: lwz r5, 84(r1)701; SPE-NEXT: stw r25, 36(r1) # 4-byte Folded Spill702; SPE-NEXT: mr r25, r3703; SPE-NEXT: stw r26, 40(r1) # 4-byte Folded Spill704; SPE-NEXT: mr r26, r4705; SPE-NEXT: mr r3, r6706; SPE-NEXT: mr r4, r10707; SPE-NEXT: stw r21, 20(r1) # 4-byte Folded Spill708; SPE-NEXT: stw r22, 24(r1) # 4-byte Folded Spill709; SPE-NEXT: stw r23, 28(r1) # 4-byte Folded Spill710; SPE-NEXT: stw r24, 32(r1) # 4-byte Folded Spill711; SPE-NEXT: stw r28, 48(r1) # 4-byte Folded Spill712; SPE-NEXT: mr r28, r7713; SPE-NEXT: stw r29, 52(r1) # 4-byte Folded Spill714; SPE-NEXT: mr r29, r8715; SPE-NEXT: stw r30, 56(r1) # 4-byte Folded Spill716; SPE-NEXT: mr r30, r9717; SPE-NEXT: lwz r24, 72(r1)718; SPE-NEXT: lwz r23, 76(r1)719; SPE-NEXT: lwz r22, 80(r1)720; SPE-NEXT: bl fmaf721; SPE-NEXT: mr r21, r3722; SPE-NEXT: mr r3, r27723; SPE-NEXT: mr r4, r30724; SPE-NEXT: mr r5, r22725; SPE-NEXT: bl fmaf726; SPE-NEXT: mr r30, r3727; SPE-NEXT: mr r3, r26728; SPE-NEXT: mr r4, r29729; SPE-NEXT: mr r5, r23730; SPE-NEXT: bl fmaf731; SPE-NEXT: mr r29, r3732; SPE-NEXT: mr r3, r25733; SPE-NEXT: mr r4, r28734; SPE-NEXT: mr r5, r24735; SPE-NEXT: bl fmaf736; SPE-NEXT: mr r4, r29737; SPE-NEXT: mr r5, r30738; SPE-NEXT: mr r6, r21739; SPE-NEXT: lwz r30, 56(r1) # 4-byte Folded Reload740; SPE-NEXT: lwz r29, 52(r1) # 4-byte Folded Reload741; SPE-NEXT: lwz r28, 48(r1) # 4-byte Folded Reload742; SPE-NEXT: lwz r27, 44(r1) # 4-byte Folded Reload743; SPE-NEXT: lwz r26, 40(r1) # 4-byte Folded Reload744; SPE-NEXT: lwz r25, 36(r1) # 4-byte Folded Reload745; SPE-NEXT: lwz r24, 32(r1) # 4-byte Folded Reload746; SPE-NEXT: lwz r23, 28(r1) # 4-byte Folded Reload747; SPE-NEXT: lwz r22, 24(r1) # 4-byte Folded Reload748; SPE-NEXT: lwz r21, 20(r1) # 4-byte Folded Reload749; SPE-NEXT: lwz r0, 68(r1)750; SPE-NEXT: addi r1, r1, 64751; SPE-NEXT: mtlr r0752; SPE-NEXT: blr753 %res = call <4 x float> @llvm.experimental.constrained.fma.v4f32(754 <4 x float> %vf0, <4 x float> %vf1, <4 x float> %vf2,755 metadata !"round.dynamic",756 metadata !"fpexcept.strict") #0757 ret <4 x float> %res758}759 760define <2 x double> @fmadd_v2f64(<2 x double> %vf0, <2 x double> %vf1, <2 x double> %vf2) #0 {761; CHECK-LABEL: fmadd_v2f64:762; CHECK: # %bb.0:763; CHECK-NEXT: xvmaddadp v4, v2, v3764; CHECK-NEXT: vmr v2, v4765; CHECK-NEXT: blr766;767; NOVSX-LABEL: fmadd_v2f64:768; NOVSX: # %bb.0:769; NOVSX-NEXT: fmadd f2, f2, f4, f6770; NOVSX-NEXT: fmadd f1, f1, f3, f5771; NOVSX-NEXT: blr772;773; SPE-LABEL: fmadd_v2f64:774; SPE: # %bb.0:775; SPE-NEXT: mflr r0776; SPE-NEXT: stwu r1, -80(r1)777; SPE-NEXT: stw r0, 84(r1)778; SPE-NEXT: .cfi_def_cfa_offset 80779; SPE-NEXT: .cfi_offset lr, 4780; SPE-NEXT: .cfi_offset r26, -64781; SPE-NEXT: .cfi_offset r27, -56782; SPE-NEXT: .cfi_offset r28, -48783; SPE-NEXT: .cfi_offset r29, -40784; SPE-NEXT: .cfi_offset r30, -8785; SPE-NEXT: evstdd r26, 16(r1) # 8-byte Folded Spill786; SPE-NEXT: evstdd r27, 24(r1) # 8-byte Folded Spill787; SPE-NEXT: evstdd r28, 32(r1) # 8-byte Folded Spill788; SPE-NEXT: evstdd r29, 40(r1) # 8-byte Folded Spill789; SPE-NEXT: stw r30, 72(r1) # 4-byte Folded Spill790; SPE-NEXT: evmergelo r27, r7, r8791; SPE-NEXT: evmergelo r9, r9, r10792; SPE-NEXT: evmergelo r4, r5, r6793; SPE-NEXT: mr r30, r3794; SPE-NEXT: evldd r8, 96(r1)795; SPE-NEXT: evmergehi r3, r4, r4796; SPE-NEXT: evmergehi r5, r9, r9797; SPE-NEXT: mr r6, r9798; SPE-NEXT: evldd r29, 104(r1)799; SPE-NEXT: evmergehi r7, r8, r8800; SPE-NEXT: evldd r28, 88(r1)801; SPE-NEXT: bl fma802; SPE-NEXT: evmergelo r26, r3, r4803; SPE-NEXT: evmergehi r3, r27, r27804; SPE-NEXT: evmergehi r5, r28, r28805; SPE-NEXT: evmergehi r7, r29, r29806; SPE-NEXT: mr r4, r27807; SPE-NEXT: mr r6, r28808; SPE-NEXT: mr r8, r29809; SPE-NEXT: bl fma810; SPE-NEXT: li r5, 8811; SPE-NEXT: evmergelo r3, r3, r4812; SPE-NEXT: evstddx r3, r30, r5813; SPE-NEXT: evstdd r26, 0(r30)814; SPE-NEXT: lwz r30, 72(r1) # 4-byte Folded Reload815; SPE-NEXT: evldd r29, 40(r1) # 8-byte Folded Reload816; SPE-NEXT: evldd r28, 32(r1) # 8-byte Folded Reload817; SPE-NEXT: evldd r27, 24(r1) # 8-byte Folded Reload818; SPE-NEXT: evldd r26, 16(r1) # 8-byte Folded Reload819; SPE-NEXT: lwz r0, 84(r1)820; SPE-NEXT: addi r1, r1, 80821; SPE-NEXT: mtlr r0822; SPE-NEXT: blr823 %res = call <2 x double> @llvm.experimental.constrained.fma.v2f64(824 <2 x double> %vf0, <2 x double> %vf1, <2 x double> %vf2,825 metadata !"round.dynamic",826 metadata !"fpexcept.strict") #0827 ret <2 x double> %res828}829 830define float @fmsub_f32(float %f0, float %f1, float %f2) #0 {831; CHECK-LABEL: fmsub_f32:832; CHECK: # %bb.0:833; CHECK-NEXT: xsmsubasp f3, f1, f2834; CHECK-NEXT: fmr f1, f3835; CHECK-NEXT: blr836;837; NOVSX-LABEL: fmsub_f32:838; NOVSX: # %bb.0:839; NOVSX-NEXT: fmsubs f1, f1, f2, f3840; NOVSX-NEXT: blr841;842; SPE-LABEL: fmsub_f32:843; SPE: # %bb.0:844; SPE-NEXT: mflr r0845; SPE-NEXT: stwu r1, -16(r1)846; SPE-NEXT: stw r0, 20(r1)847; SPE-NEXT: .cfi_def_cfa_offset 16848; SPE-NEXT: .cfi_offset lr, 4849; SPE-NEXT: efsneg r5, r5850; SPE-NEXT: bl fmaf851; SPE-NEXT: lwz r0, 20(r1)852; SPE-NEXT: addi r1, r1, 16853; SPE-NEXT: mtlr r0854; SPE-NEXT: blr855 %neg = fneg float %f2856 %res = call float @llvm.experimental.constrained.fma.f32(857 float %f0, float %f1, float %neg,858 metadata !"round.dynamic",859 metadata !"fpexcept.strict") #0860 ret float %res861}862 863define double @fmsub_f64(double %f0, double %f1, double %f2) #0 {864; CHECK-LABEL: fmsub_f64:865; CHECK: # %bb.0:866; CHECK-NEXT: xsmsubadp f3, f1, f2867; CHECK-NEXT: fmr f1, f3868; CHECK-NEXT: blr869;870; NOVSX-LABEL: fmsub_f64:871; NOVSX: # %bb.0:872; NOVSX-NEXT: fmsub f1, f1, f2, f3873; NOVSX-NEXT: blr874;875; SPE-LABEL: fmsub_f64:876; SPE: # %bb.0:877; SPE-NEXT: mflr r0878; SPE-NEXT: stwu r1, -16(r1)879; SPE-NEXT: stw r0, 20(r1)880; SPE-NEXT: .cfi_def_cfa_offset 16881; SPE-NEXT: .cfi_offset lr, 4882; SPE-NEXT: evmergelo r6, r5, r6883; SPE-NEXT: evmergelo r4, r3, r4884; SPE-NEXT: evmergelo r3, r7, r8885; SPE-NEXT: efdneg r8, r3886; SPE-NEXT: evmergehi r3, r4, r4887; SPE-NEXT: evmergehi r5, r6, r6888; SPE-NEXT: evmergehi r7, r8, r8889; SPE-NEXT: bl fma890; SPE-NEXT: evmergelo r4, r3, r4891; SPE-NEXT: evmergehi r3, r4, r4892; SPE-NEXT: lwz r0, 20(r1)893; SPE-NEXT: addi r1, r1, 16894; SPE-NEXT: mtlr r0895; SPE-NEXT: blr896 %neg = fneg double %f2897 %res = call double @llvm.experimental.constrained.fma.f64(898 double %f0, double %f1, double %neg,899 metadata !"round.dynamic",900 metadata !"fpexcept.strict") #0901 ret double %res902}903 904define <4 x float> @fmsub_v4f32(<4 x float> %vf0, <4 x float> %vf1, <4 x float> %vf2) #0 {905; CHECK-LABEL: fmsub_v4f32:906; CHECK: # %bb.0:907; CHECK-NEXT: xvmsubasp v4, v2, v3908; CHECK-NEXT: vmr v2, v4909; CHECK-NEXT: blr910;911; NOVSX-LABEL: fmsub_v4f32:912; NOVSX: # %bb.0:913; NOVSX-NEXT: vspltisb v5, -1914; NOVSX-NEXT: addi r3, r1, -48915; NOVSX-NEXT: vslw v5, v5, v5916; NOVSX-NEXT: stvx v3, 0, r3917; NOVSX-NEXT: addi r3, r1, -64918; NOVSX-NEXT: vxor v4, v4, v5919; NOVSX-NEXT: stvx v2, 0, r3920; NOVSX-NEXT: addi r3, r1, -32921; NOVSX-NEXT: stvx v4, 0, r3922; NOVSX-NEXT: addi r3, r1, -16923; NOVSX-NEXT: lfs f0, -36(r1)924; NOVSX-NEXT: lfs f1, -52(r1)925; NOVSX-NEXT: lfs f2, -20(r1)926; NOVSX-NEXT: fmadds f0, f1, f0, f2927; NOVSX-NEXT: lfs f1, -56(r1)928; NOVSX-NEXT: lfs f2, -24(r1)929; NOVSX-NEXT: stfs f0, -4(r1)930; NOVSX-NEXT: lfs f0, -40(r1)931; NOVSX-NEXT: fmadds f0, f1, f0, f2932; NOVSX-NEXT: lfs f1, -60(r1)933; NOVSX-NEXT: lfs f2, -28(r1)934; NOVSX-NEXT: stfs f0, -8(r1)935; NOVSX-NEXT: lfs f0, -44(r1)936; NOVSX-NEXT: fmadds f0, f1, f0, f2937; NOVSX-NEXT: lfs f1, -64(r1)938; NOVSX-NEXT: lfs f2, -32(r1)939; NOVSX-NEXT: stfs f0, -12(r1)940; NOVSX-NEXT: lfs f0, -48(r1)941; NOVSX-NEXT: fmadds f0, f1, f0, f2942; NOVSX-NEXT: stfs f0, -16(r1)943; NOVSX-NEXT: lvx v2, 0, r3944; NOVSX-NEXT: blr945;946; SPE-LABEL: fmsub_v4f32:947; SPE: # %bb.0:948; SPE-NEXT: mflr r0949; SPE-NEXT: stwu r1, -64(r1)950; SPE-NEXT: stw r0, 68(r1)951; SPE-NEXT: .cfi_def_cfa_offset 64952; SPE-NEXT: .cfi_offset lr, 4953; SPE-NEXT: .cfi_offset r21, -44954; SPE-NEXT: .cfi_offset r22, -40955; SPE-NEXT: .cfi_offset r23, -36956; SPE-NEXT: .cfi_offset r24, -32957; SPE-NEXT: .cfi_offset r25, -28958; SPE-NEXT: .cfi_offset r26, -24959; SPE-NEXT: .cfi_offset r27, -20960; SPE-NEXT: .cfi_offset r28, -16961; SPE-NEXT: .cfi_offset r29, -12962; SPE-NEXT: .cfi_offset r30, -8963; SPE-NEXT: stw r25, 36(r1) # 4-byte Folded Spill964; SPE-NEXT: mr r25, r3965; SPE-NEXT: stw r26, 40(r1) # 4-byte Folded Spill966; SPE-NEXT: mr r26, r4967; SPE-NEXT: stw r27, 44(r1) # 4-byte Folded Spill968; SPE-NEXT: mr r27, r5969; SPE-NEXT: stw r28, 48(r1) # 4-byte Folded Spill970; SPE-NEXT: mr r28, r7971; SPE-NEXT: lwz r3, 80(r1)972; SPE-NEXT: lwz r4, 72(r1)973; SPE-NEXT: lwz r5, 76(r1)974; SPE-NEXT: lwz r7, 84(r1)975; SPE-NEXT: stw r22, 24(r1) # 4-byte Folded Spill976; SPE-NEXT: efsneg r22, r3977; SPE-NEXT: stw r23, 28(r1) # 4-byte Folded Spill978; SPE-NEXT: efsneg r23, r5979; SPE-NEXT: stw r24, 32(r1) # 4-byte Folded Spill980; SPE-NEXT: efsneg r24, r4981; SPE-NEXT: efsneg r5, r7982; SPE-NEXT: mr r3, r6983; SPE-NEXT: mr r4, r10984; SPE-NEXT: stw r21, 20(r1) # 4-byte Folded Spill985; SPE-NEXT: stw r29, 52(r1) # 4-byte Folded Spill986; SPE-NEXT: mr r29, r8987; SPE-NEXT: stw r30, 56(r1) # 4-byte Folded Spill988; SPE-NEXT: mr r30, r9989; SPE-NEXT: bl fmaf990; SPE-NEXT: mr r21, r3991; SPE-NEXT: mr r3, r27992; SPE-NEXT: mr r4, r30993; SPE-NEXT: mr r5, r22994; SPE-NEXT: bl fmaf995; SPE-NEXT: mr r30, r3996; SPE-NEXT: mr r3, r26997; SPE-NEXT: mr r4, r29998; SPE-NEXT: mr r5, r23999; SPE-NEXT: bl fmaf1000; SPE-NEXT: mr r29, r31001; SPE-NEXT: mr r3, r251002; SPE-NEXT: mr r4, r281003; SPE-NEXT: mr r5, r241004; SPE-NEXT: bl fmaf1005; SPE-NEXT: mr r4, r291006; SPE-NEXT: mr r5, r301007; SPE-NEXT: mr r6, r211008; SPE-NEXT: lwz r30, 56(r1) # 4-byte Folded Reload1009; SPE-NEXT: lwz r29, 52(r1) # 4-byte Folded Reload1010; SPE-NEXT: lwz r28, 48(r1) # 4-byte Folded Reload1011; SPE-NEXT: lwz r27, 44(r1) # 4-byte Folded Reload1012; SPE-NEXT: lwz r26, 40(r1) # 4-byte Folded Reload1013; SPE-NEXT: lwz r25, 36(r1) # 4-byte Folded Reload1014; SPE-NEXT: lwz r24, 32(r1) # 4-byte Folded Reload1015; SPE-NEXT: lwz r23, 28(r1) # 4-byte Folded Reload1016; SPE-NEXT: lwz r22, 24(r1) # 4-byte Folded Reload1017; SPE-NEXT: lwz r21, 20(r1) # 4-byte Folded Reload1018; SPE-NEXT: lwz r0, 68(r1)1019; SPE-NEXT: addi r1, r1, 641020; SPE-NEXT: mtlr r01021; SPE-NEXT: blr1022 %neg = fneg <4 x float> %vf21023 %res = call <4 x float> @llvm.experimental.constrained.fma.v4f32(1024 <4 x float> %vf0, <4 x float> %vf1, <4 x float> %neg,1025 metadata !"round.dynamic",1026 metadata !"fpexcept.strict") #01027 ret <4 x float> %res1028}1029 1030define <2 x double> @fmsub_v2f64(<2 x double> %vf0, <2 x double> %vf1, <2 x double> %vf2) #0 {1031; CHECK-LABEL: fmsub_v2f64:1032; CHECK: # %bb.0:1033; CHECK-NEXT: xvmsubadp v4, v2, v31034; CHECK-NEXT: vmr v2, v41035; CHECK-NEXT: blr1036;1037; NOVSX-LABEL: fmsub_v2f64:1038; NOVSX: # %bb.0:1039; NOVSX-NEXT: fmsub f2, f2, f4, f61040; NOVSX-NEXT: fmsub f1, f1, f3, f51041; NOVSX-NEXT: blr1042;1043; SPE-LABEL: fmsub_v2f64:1044; SPE: # %bb.0:1045; SPE-NEXT: mflr r01046; SPE-NEXT: stwu r1, -80(r1)1047; SPE-NEXT: stw r0, 84(r1)1048; SPE-NEXT: .cfi_def_cfa_offset 801049; SPE-NEXT: .cfi_offset lr, 41050; SPE-NEXT: .cfi_offset r26, -641051; SPE-NEXT: .cfi_offset r27, -561052; SPE-NEXT: .cfi_offset r28, -481053; SPE-NEXT: .cfi_offset r29, -401054; SPE-NEXT: .cfi_offset r30, -81055; SPE-NEXT: stw r30, 72(r1) # 4-byte Folded Spill1056; SPE-NEXT: mr r30, r31057; SPE-NEXT: evldd r3, 96(r1)1058; SPE-NEXT: evldd r11, 104(r1)1059; SPE-NEXT: evstdd r26, 16(r1) # 8-byte Folded Spill1060; SPE-NEXT: evstdd r27, 24(r1) # 8-byte Folded Spill1061; SPE-NEXT: efdneg r27, r111062; SPE-NEXT: evstdd r28, 32(r1) # 8-byte Folded Spill1063; SPE-NEXT: evstdd r29, 40(r1) # 8-byte Folded Spill1064; SPE-NEXT: evmergelo r29, r7, r81065; SPE-NEXT: evmergelo r9, r9, r101066; SPE-NEXT: evmergelo r4, r5, r61067; SPE-NEXT: efdneg r8, r31068; SPE-NEXT: evmergehi r3, r4, r41069; SPE-NEXT: evmergehi r5, r9, r91070; SPE-NEXT: evmergehi r7, r8, r81071; SPE-NEXT: mr r6, r91072; SPE-NEXT: evldd r28, 88(r1)1073; SPE-NEXT: bl fma1074; SPE-NEXT: evmergelo r26, r3, r41075; SPE-NEXT: evmergehi r3, r29, r291076; SPE-NEXT: evmergehi r5, r28, r281077; SPE-NEXT: evmergehi r7, r27, r271078; SPE-NEXT: mr r4, r291079; SPE-NEXT: mr r6, r281080; SPE-NEXT: mr r8, r271081; SPE-NEXT: bl fma1082; SPE-NEXT: li r5, 81083; SPE-NEXT: evmergelo r3, r3, r41084; SPE-NEXT: evstddx r3, r30, r51085; SPE-NEXT: evstdd r26, 0(r30)1086; SPE-NEXT: lwz r30, 72(r1) # 4-byte Folded Reload1087; SPE-NEXT: evldd r29, 40(r1) # 8-byte Folded Reload1088; SPE-NEXT: evldd r28, 32(r1) # 8-byte Folded Reload1089; SPE-NEXT: evldd r27, 24(r1) # 8-byte Folded Reload1090; SPE-NEXT: evldd r26, 16(r1) # 8-byte Folded Reload1091; SPE-NEXT: lwz r0, 84(r1)1092; SPE-NEXT: addi r1, r1, 801093; SPE-NEXT: mtlr r01094; SPE-NEXT: blr1095 %neg = fneg <2 x double> %vf21096 %res = call <2 x double> @llvm.experimental.constrained.fma.v2f64(1097 <2 x double> %vf0, <2 x double> %vf1, <2 x double> %neg,1098 metadata !"round.dynamic",1099 metadata !"fpexcept.strict") #01100 ret <2 x double> %res1101}1102 1103define float @fnmadd_f32(float %f0, float %f1, float %f2) #0 {1104; CHECK-LABEL: fnmadd_f32:1105; CHECK: # %bb.0:1106; CHECK-NEXT: xsnmaddasp f3, f1, f21107; CHECK-NEXT: fmr f1, f31108; CHECK-NEXT: blr1109;1110; NOVSX-LABEL: fnmadd_f32:1111; NOVSX: # %bb.0:1112; NOVSX-NEXT: fnmadds f1, f1, f2, f31113; NOVSX-NEXT: blr1114;1115; SPE-LABEL: fnmadd_f32:1116; SPE: # %bb.0:1117; SPE-NEXT: mflr r01118; SPE-NEXT: stwu r1, -16(r1)1119; SPE-NEXT: stw r0, 20(r1)1120; SPE-NEXT: .cfi_def_cfa_offset 161121; SPE-NEXT: .cfi_offset lr, 41122; SPE-NEXT: bl fmaf1123; SPE-NEXT: efsneg r3, r31124; SPE-NEXT: lwz r0, 20(r1)1125; SPE-NEXT: addi r1, r1, 161126; SPE-NEXT: mtlr r01127; SPE-NEXT: blr1128 %fma = call float @llvm.experimental.constrained.fma.f32(1129 float %f0, float %f1, float %f2,1130 metadata !"round.dynamic",1131 metadata !"fpexcept.strict") #01132 %res = fneg float %fma1133 ret float %res1134}1135 1136define double @fnmadd_f64(double %f0, double %f1, double %f2) #0 {1137; CHECK-LABEL: fnmadd_f64:1138; CHECK: # %bb.0:1139; CHECK-NEXT: xsnmaddadp f3, f1, f21140; CHECK-NEXT: fmr f1, f31141; CHECK-NEXT: blr1142;1143; NOVSX-LABEL: fnmadd_f64:1144; NOVSX: # %bb.0:1145; NOVSX-NEXT: fnmadd f1, f1, f2, f31146; NOVSX-NEXT: blr1147;1148; SPE-LABEL: fnmadd_f64:1149; SPE: # %bb.0:1150; SPE-NEXT: mflr r01151; SPE-NEXT: stwu r1, -16(r1)1152; SPE-NEXT: stw r0, 20(r1)1153; SPE-NEXT: .cfi_def_cfa_offset 161154; SPE-NEXT: .cfi_offset lr, 41155; SPE-NEXT: evmergelo r8, r7, r81156; SPE-NEXT: evmergelo r6, r5, r61157; SPE-NEXT: evmergelo r4, r3, r41158; SPE-NEXT: evmergehi r3, r4, r41159; SPE-NEXT: evmergehi r5, r6, r61160; SPE-NEXT: evmergehi r7, r8, r81161; SPE-NEXT: bl fma1162; SPE-NEXT: evmergelo r3, r3, r41163; SPE-NEXT: efdneg r4, r31164; SPE-NEXT: evmergehi r3, r4, r41165; SPE-NEXT: lwz r0, 20(r1)1166; SPE-NEXT: addi r1, r1, 161167; SPE-NEXT: mtlr r01168; SPE-NEXT: blr1169 %fma = call double @llvm.experimental.constrained.fma.f64(1170 double %f0, double %f1, double %f2,1171 metadata !"round.dynamic",1172 metadata !"fpexcept.strict") #01173 %res = fneg double %fma1174 ret double %res1175}1176 1177define <4 x float> @fnmadd_v4f32(<4 x float> %vf0, <4 x float> %vf1, <4 x float> %vf2) #0 {1178; CHECK-LABEL: fnmadd_v4f32:1179; CHECK: # %bb.0:1180; CHECK-NEXT: xvmaddasp v4, v2, v31181; CHECK-NEXT: xvnegsp v2, v41182; CHECK-NEXT: blr1183;1184; NOVSX-LABEL: fnmadd_v4f32:1185; NOVSX: # %bb.0:1186; NOVSX-NEXT: addi r3, r1, -321187; NOVSX-NEXT: vspltisb v5, -11188; NOVSX-NEXT: stvx v4, 0, r31189; NOVSX-NEXT: addi r3, r1, -481190; NOVSX-NEXT: stvx v3, 0, r31191; NOVSX-NEXT: addi r3, r1, -641192; NOVSX-NEXT: vslw v3, v5, v51193; NOVSX-NEXT: stvx v2, 0, r31194; NOVSX-NEXT: addi r3, r1, -161195; NOVSX-NEXT: lfs f0, -20(r1)1196; NOVSX-NEXT: lfs f1, -36(r1)1197; NOVSX-NEXT: lfs f2, -52(r1)1198; NOVSX-NEXT: fmadds f0, f2, f1, f01199; NOVSX-NEXT: lfs f1, -40(r1)1200; NOVSX-NEXT: lfs f2, -56(r1)1201; NOVSX-NEXT: stfs f0, -4(r1)1202; NOVSX-NEXT: lfs f0, -24(r1)1203; NOVSX-NEXT: fmadds f0, f2, f1, f01204; NOVSX-NEXT: lfs f1, -44(r1)1205; NOVSX-NEXT: lfs f2, -60(r1)1206; NOVSX-NEXT: stfs f0, -8(r1)1207; NOVSX-NEXT: lfs f0, -28(r1)1208; NOVSX-NEXT: fmadds f0, f2, f1, f01209; NOVSX-NEXT: lfs f1, -48(r1)1210; NOVSX-NEXT: lfs f2, -64(r1)1211; NOVSX-NEXT: stfs f0, -12(r1)1212; NOVSX-NEXT: lfs f0, -32(r1)1213; NOVSX-NEXT: fmadds f0, f2, f1, f01214; NOVSX-NEXT: stfs f0, -16(r1)1215; NOVSX-NEXT: lvx v2, 0, r31216; NOVSX-NEXT: vxor v2, v2, v31217; NOVSX-NEXT: blr1218;1219; SPE-LABEL: fnmadd_v4f32:1220; SPE: # %bb.0:1221; SPE-NEXT: mflr r01222; SPE-NEXT: stwu r1, -64(r1)1223; SPE-NEXT: stw r0, 68(r1)1224; SPE-NEXT: .cfi_def_cfa_offset 641225; SPE-NEXT: .cfi_offset lr, 41226; SPE-NEXT: .cfi_offset r21, -441227; SPE-NEXT: .cfi_offset r22, -401228; SPE-NEXT: .cfi_offset r23, -361229; SPE-NEXT: .cfi_offset r24, -321230; SPE-NEXT: .cfi_offset r25, -281231; SPE-NEXT: .cfi_offset r26, -241232; SPE-NEXT: .cfi_offset r27, -201233; SPE-NEXT: .cfi_offset r28, -161234; SPE-NEXT: .cfi_offset r29, -121235; SPE-NEXT: .cfi_offset r30, -81236; SPE-NEXT: stw r27, 44(r1) # 4-byte Folded Spill1237; SPE-NEXT: mr r27, r51238; SPE-NEXT: lwz r5, 84(r1)1239; SPE-NEXT: stw r25, 36(r1) # 4-byte Folded Spill1240; SPE-NEXT: mr r25, r31241; SPE-NEXT: stw r26, 40(r1) # 4-byte Folded Spill1242; SPE-NEXT: mr r26, r41243; SPE-NEXT: mr r3, r61244; SPE-NEXT: mr r4, r101245; SPE-NEXT: stw r21, 20(r1) # 4-byte Folded Spill1246; SPE-NEXT: stw r22, 24(r1) # 4-byte Folded Spill1247; SPE-NEXT: stw r23, 28(r1) # 4-byte Folded Spill1248; SPE-NEXT: stw r24, 32(r1) # 4-byte Folded Spill1249; SPE-NEXT: stw r28, 48(r1) # 4-byte Folded Spill1250; SPE-NEXT: mr r28, r71251; SPE-NEXT: stw r29, 52(r1) # 4-byte Folded Spill1252; SPE-NEXT: mr r29, r81253; SPE-NEXT: stw r30, 56(r1) # 4-byte Folded Spill1254; SPE-NEXT: mr r30, r91255; SPE-NEXT: lwz r24, 72(r1)1256; SPE-NEXT: lwz r23, 76(r1)1257; SPE-NEXT: lwz r22, 80(r1)1258; SPE-NEXT: bl fmaf1259; SPE-NEXT: mr r21, r31260; SPE-NEXT: mr r3, r271261; SPE-NEXT: mr r4, r301262; SPE-NEXT: mr r5, r221263; SPE-NEXT: bl fmaf1264; SPE-NEXT: mr r30, r31265; SPE-NEXT: mr r3, r261266; SPE-NEXT: mr r4, r291267; SPE-NEXT: mr r5, r231268; SPE-NEXT: bl fmaf1269; SPE-NEXT: mr r29, r31270; SPE-NEXT: mr r3, r251271; SPE-NEXT: mr r4, r281272; SPE-NEXT: mr r5, r241273; SPE-NEXT: bl fmaf1274; SPE-NEXT: efsneg r4, r291275; SPE-NEXT: efsneg r5, r301276; SPE-NEXT: efsneg r3, r31277; SPE-NEXT: efsneg r6, r211278; SPE-NEXT: lwz r30, 56(r1) # 4-byte Folded Reload1279; SPE-NEXT: lwz r29, 52(r1) # 4-byte Folded Reload1280; SPE-NEXT: lwz r28, 48(r1) # 4-byte Folded Reload1281; SPE-NEXT: lwz r27, 44(r1) # 4-byte Folded Reload1282; SPE-NEXT: lwz r26, 40(r1) # 4-byte Folded Reload1283; SPE-NEXT: lwz r25, 36(r1) # 4-byte Folded Reload1284; SPE-NEXT: lwz r24, 32(r1) # 4-byte Folded Reload1285; SPE-NEXT: lwz r23, 28(r1) # 4-byte Folded Reload1286; SPE-NEXT: lwz r22, 24(r1) # 4-byte Folded Reload1287; SPE-NEXT: lwz r21, 20(r1) # 4-byte Folded Reload1288; SPE-NEXT: lwz r0, 68(r1)1289; SPE-NEXT: addi r1, r1, 641290; SPE-NEXT: mtlr r01291; SPE-NEXT: blr1292 %fma = call <4 x float> @llvm.experimental.constrained.fma.v4f32(1293 <4 x float> %vf0, <4 x float> %vf1, <4 x float> %vf2,1294 metadata !"round.dynamic",1295 metadata !"fpexcept.strict") #01296 %res = fneg <4 x float> %fma1297 ret <4 x float> %res1298}1299 1300define <2 x double> @fnmadd_v2f64(<2 x double> %vf0, <2 x double> %vf1, <2 x double> %vf2) #0 {1301; CHECK-LABEL: fnmadd_v2f64:1302; CHECK: # %bb.0:1303; CHECK-NEXT: xvnmaddadp v4, v2, v31304; CHECK-NEXT: vmr v2, v41305; CHECK-NEXT: blr1306;1307; NOVSX-LABEL: fnmadd_v2f64:1308; NOVSX: # %bb.0:1309; NOVSX-NEXT: fnmadd f2, f2, f4, f61310; NOVSX-NEXT: fnmadd f1, f1, f3, f51311; NOVSX-NEXT: blr1312;1313; SPE-LABEL: fnmadd_v2f64:1314; SPE: # %bb.0:1315; SPE-NEXT: mflr r01316; SPE-NEXT: stwu r1, -80(r1)1317; SPE-NEXT: stw r0, 84(r1)1318; SPE-NEXT: .cfi_def_cfa_offset 801319; SPE-NEXT: .cfi_offset lr, 41320; SPE-NEXT: .cfi_offset r26, -641321; SPE-NEXT: .cfi_offset r27, -561322; SPE-NEXT: .cfi_offset r28, -481323; SPE-NEXT: .cfi_offset r29, -401324; SPE-NEXT: .cfi_offset r30, -81325; SPE-NEXT: evstdd r26, 16(r1) # 8-byte Folded Spill1326; SPE-NEXT: evstdd r27, 24(r1) # 8-byte Folded Spill1327; SPE-NEXT: evstdd r28, 32(r1) # 8-byte Folded Spill1328; SPE-NEXT: evstdd r29, 40(r1) # 8-byte Folded Spill1329; SPE-NEXT: stw r30, 72(r1) # 4-byte Folded Spill1330; SPE-NEXT: evmergelo r27, r7, r81331; SPE-NEXT: evmergelo r9, r9, r101332; SPE-NEXT: evmergelo r4, r5, r61333; SPE-NEXT: mr r30, r31334; SPE-NEXT: evldd r8, 96(r1)1335; SPE-NEXT: evmergehi r3, r4, r41336; SPE-NEXT: evmergehi r5, r9, r91337; SPE-NEXT: mr r6, r91338; SPE-NEXT: evldd r29, 104(r1)1339; SPE-NEXT: evmergehi r7, r8, r81340; SPE-NEXT: evldd r28, 88(r1)1341; SPE-NEXT: bl fma1342; SPE-NEXT: evmergelo r26, r3, r41343; SPE-NEXT: evmergehi r3, r27, r271344; SPE-NEXT: evmergehi r5, r28, r281345; SPE-NEXT: evmergehi r7, r29, r291346; SPE-NEXT: mr r4, r271347; SPE-NEXT: mr r6, r281348; SPE-NEXT: mr r8, r291349; SPE-NEXT: bl fma1350; SPE-NEXT: evmergelo r3, r3, r41351; SPE-NEXT: li r5, 81352; SPE-NEXT: efdneg r3, r31353; SPE-NEXT: evstddx r3, r30, r51354; SPE-NEXT: efdneg r3, r261355; SPE-NEXT: evstdd r3, 0(r30)1356; SPE-NEXT: lwz r30, 72(r1) # 4-byte Folded Reload1357; SPE-NEXT: evldd r29, 40(r1) # 8-byte Folded Reload1358; SPE-NEXT: evldd r28, 32(r1) # 8-byte Folded Reload1359; SPE-NEXT: evldd r27, 24(r1) # 8-byte Folded Reload1360; SPE-NEXT: evldd r26, 16(r1) # 8-byte Folded Reload1361; SPE-NEXT: lwz r0, 84(r1)1362; SPE-NEXT: addi r1, r1, 801363; SPE-NEXT: mtlr r01364; SPE-NEXT: blr1365 %fma = call <2 x double> @llvm.experimental.constrained.fma.v2f64(1366 <2 x double> %vf0, <2 x double> %vf1, <2 x double> %vf2,1367 metadata !"round.dynamic",1368 metadata !"fpexcept.strict") #01369 %res = fneg <2 x double> %fma1370 ret <2 x double> %res1371}1372 1373define float @fnmsub_f32(float %f0, float %f1, float %f2) #0 {1374; CHECK-LABEL: fnmsub_f32:1375; CHECK: # %bb.0:1376; CHECK-NEXT: xsnmsubasp f3, f1, f21377; CHECK-NEXT: fmr f1, f31378; CHECK-NEXT: blr1379;1380; NOVSX-LABEL: fnmsub_f32:1381; NOVSX: # %bb.0:1382; NOVSX-NEXT: fnmsubs f1, f1, f2, f31383; NOVSX-NEXT: blr1384;1385; SPE-LABEL: fnmsub_f32:1386; SPE: # %bb.0:1387; SPE-NEXT: mflr r01388; SPE-NEXT: stwu r1, -16(r1)1389; SPE-NEXT: stw r0, 20(r1)1390; SPE-NEXT: .cfi_def_cfa_offset 161391; SPE-NEXT: .cfi_offset lr, 41392; SPE-NEXT: efsneg r5, r51393; SPE-NEXT: bl fmaf1394; SPE-NEXT: efsneg r3, r31395; SPE-NEXT: lwz r0, 20(r1)1396; SPE-NEXT: addi r1, r1, 161397; SPE-NEXT: mtlr r01398; SPE-NEXT: blr1399 %neg = fneg float %f21400 %fma = call float @llvm.experimental.constrained.fma.f32(1401 float %f0, float %f1, float %neg,1402 metadata !"round.dynamic",1403 metadata !"fpexcept.strict") #01404 %res = fneg float %fma1405 ret float %res1406}1407 1408define double @fnmsub_f64(double %f0, double %f1, double %f2) #0 {1409; CHECK-LABEL: fnmsub_f64:1410; CHECK: # %bb.0:1411; CHECK-NEXT: xsnmsubadp f3, f1, f21412; CHECK-NEXT: fmr f1, f31413; CHECK-NEXT: blr1414;1415; NOVSX-LABEL: fnmsub_f64:1416; NOVSX: # %bb.0:1417; NOVSX-NEXT: fnmsub f1, f1, f2, f31418; NOVSX-NEXT: blr1419;1420; SPE-LABEL: fnmsub_f64:1421; SPE: # %bb.0:1422; SPE-NEXT: mflr r01423; SPE-NEXT: stwu r1, -16(r1)1424; SPE-NEXT: stw r0, 20(r1)1425; SPE-NEXT: .cfi_def_cfa_offset 161426; SPE-NEXT: .cfi_offset lr, 41427; SPE-NEXT: evmergelo r6, r5, r61428; SPE-NEXT: evmergelo r4, r3, r41429; SPE-NEXT: evmergelo r3, r7, r81430; SPE-NEXT: efdneg r8, r31431; SPE-NEXT: evmergehi r3, r4, r41432; SPE-NEXT: evmergehi r5, r6, r61433; SPE-NEXT: evmergehi r7, r8, r81434; SPE-NEXT: bl fma1435; SPE-NEXT: evmergelo r3, r3, r41436; SPE-NEXT: efdneg r4, r31437; SPE-NEXT: evmergehi r3, r4, r41438; SPE-NEXT: lwz r0, 20(r1)1439; SPE-NEXT: addi r1, r1, 161440; SPE-NEXT: mtlr r01441; SPE-NEXT: blr1442 %neg = fneg double %f21443 %fma = call double @llvm.experimental.constrained.fma.f64(1444 double %f0, double %f1, double %neg,1445 metadata !"round.dynamic",1446 metadata !"fpexcept.strict") #01447 %res = fneg double %fma1448 ret double %res1449}1450 1451define <4 x float> @fnmsub_v4f32(<4 x float> %vf0, <4 x float> %vf1, <4 x float> %vf2) #0 {1452; CHECK-LABEL: fnmsub_v4f32:1453; CHECK: # %bb.0:1454; CHECK-NEXT: xvnmsubasp v4, v2, v31455; CHECK-NEXT: vmr v2, v41456; CHECK-NEXT: blr1457;1458; NOVSX-LABEL: fnmsub_v4f32:1459; NOVSX: # %bb.0:1460; NOVSX-NEXT: vspltisb v5, -11461; NOVSX-NEXT: addi r3, r1, -481462; NOVSX-NEXT: vslw v5, v5, v51463; NOVSX-NEXT: stvx v3, 0, r31464; NOVSX-NEXT: addi r3, r1, -641465; NOVSX-NEXT: vxor v4, v4, v51466; NOVSX-NEXT: stvx v2, 0, r31467; NOVSX-NEXT: addi r3, r1, -321468; NOVSX-NEXT: stvx v4, 0, r31469; NOVSX-NEXT: addi r3, r1, -161470; NOVSX-NEXT: lfs f0, -36(r1)1471; NOVSX-NEXT: lfs f1, -52(r1)1472; NOVSX-NEXT: lfs f2, -20(r1)1473; NOVSX-NEXT: fmadds f0, f1, f0, f21474; NOVSX-NEXT: lfs f1, -56(r1)1475; NOVSX-NEXT: lfs f2, -24(r1)1476; NOVSX-NEXT: stfs f0, -4(r1)1477; NOVSX-NEXT: lfs f0, -40(r1)1478; NOVSX-NEXT: fmadds f0, f1, f0, f21479; NOVSX-NEXT: lfs f1, -60(r1)1480; NOVSX-NEXT: lfs f2, -28(r1)1481; NOVSX-NEXT: stfs f0, -8(r1)1482; NOVSX-NEXT: lfs f0, -44(r1)1483; NOVSX-NEXT: fmadds f0, f1, f0, f21484; NOVSX-NEXT: lfs f1, -64(r1)1485; NOVSX-NEXT: lfs f2, -32(r1)1486; NOVSX-NEXT: stfs f0, -12(r1)1487; NOVSX-NEXT: lfs f0, -48(r1)1488; NOVSX-NEXT: fmadds f0, f1, f0, f21489; NOVSX-NEXT: stfs f0, -16(r1)1490; NOVSX-NEXT: lvx v2, 0, r31491; NOVSX-NEXT: vxor v2, v2, v51492; NOVSX-NEXT: blr1493;1494; SPE-LABEL: fnmsub_v4f32:1495; SPE: # %bb.0:1496; SPE-NEXT: mflr r01497; SPE-NEXT: stwu r1, -64(r1)1498; SPE-NEXT: stw r0, 68(r1)1499; SPE-NEXT: .cfi_def_cfa_offset 641500; SPE-NEXT: .cfi_offset lr, 41501; SPE-NEXT: .cfi_offset r21, -441502; SPE-NEXT: .cfi_offset r22, -401503; SPE-NEXT: .cfi_offset r23, -361504; SPE-NEXT: .cfi_offset r24, -321505; SPE-NEXT: .cfi_offset r25, -281506; SPE-NEXT: .cfi_offset r26, -241507; SPE-NEXT: .cfi_offset r27, -201508; SPE-NEXT: .cfi_offset r28, -161509; SPE-NEXT: .cfi_offset r29, -121510; SPE-NEXT: .cfi_offset r30, -81511; SPE-NEXT: stw r25, 36(r1) # 4-byte Folded Spill1512; SPE-NEXT: mr r25, r31513; SPE-NEXT: stw r26, 40(r1) # 4-byte Folded Spill1514; SPE-NEXT: mr r26, r41515; SPE-NEXT: stw r27, 44(r1) # 4-byte Folded Spill1516; SPE-NEXT: mr r27, r51517; SPE-NEXT: stw r28, 48(r1) # 4-byte Folded Spill1518; SPE-NEXT: mr r28, r71519; SPE-NEXT: lwz r3, 80(r1)1520; SPE-NEXT: lwz r4, 72(r1)1521; SPE-NEXT: lwz r5, 76(r1)1522; SPE-NEXT: lwz r7, 84(r1)1523; SPE-NEXT: stw r22, 24(r1) # 4-byte Folded Spill1524; SPE-NEXT: efsneg r22, r31525; SPE-NEXT: stw r23, 28(r1) # 4-byte Folded Spill1526; SPE-NEXT: efsneg r23, r51527; SPE-NEXT: stw r24, 32(r1) # 4-byte Folded Spill1528; SPE-NEXT: efsneg r24, r41529; SPE-NEXT: efsneg r5, r71530; SPE-NEXT: mr r3, r61531; SPE-NEXT: mr r4, r101532; SPE-NEXT: stw r21, 20(r1) # 4-byte Folded Spill1533; SPE-NEXT: stw r29, 52(r1) # 4-byte Folded Spill1534; SPE-NEXT: mr r29, r81535; SPE-NEXT: stw r30, 56(r1) # 4-byte Folded Spill1536; SPE-NEXT: mr r30, r91537; SPE-NEXT: bl fmaf1538; SPE-NEXT: mr r21, r31539; SPE-NEXT: mr r3, r271540; SPE-NEXT: mr r4, r301541; SPE-NEXT: mr r5, r221542; SPE-NEXT: bl fmaf1543; SPE-NEXT: mr r30, r31544; SPE-NEXT: mr r3, r261545; SPE-NEXT: mr r4, r291546; SPE-NEXT: mr r5, r231547; SPE-NEXT: bl fmaf1548; SPE-NEXT: mr r29, r31549; SPE-NEXT: mr r3, r251550; SPE-NEXT: mr r4, r281551; SPE-NEXT: mr r5, r241552; SPE-NEXT: bl fmaf1553; SPE-NEXT: efsneg r4, r291554; SPE-NEXT: efsneg r5, r301555; SPE-NEXT: efsneg r3, r31556; SPE-NEXT: efsneg r6, r211557; SPE-NEXT: lwz r30, 56(r1) # 4-byte Folded Reload1558; SPE-NEXT: lwz r29, 52(r1) # 4-byte Folded Reload1559; SPE-NEXT: lwz r28, 48(r1) # 4-byte Folded Reload1560; SPE-NEXT: lwz r27, 44(r1) # 4-byte Folded Reload1561; SPE-NEXT: lwz r26, 40(r1) # 4-byte Folded Reload1562; SPE-NEXT: lwz r25, 36(r1) # 4-byte Folded Reload1563; SPE-NEXT: lwz r24, 32(r1) # 4-byte Folded Reload1564; SPE-NEXT: lwz r23, 28(r1) # 4-byte Folded Reload1565; SPE-NEXT: lwz r22, 24(r1) # 4-byte Folded Reload1566; SPE-NEXT: lwz r21, 20(r1) # 4-byte Folded Reload1567; SPE-NEXT: lwz r0, 68(r1)1568; SPE-NEXT: addi r1, r1, 641569; SPE-NEXT: mtlr r01570; SPE-NEXT: blr1571 %neg = fneg <4 x float> %vf21572 %fma = call <4 x float> @llvm.experimental.constrained.fma.v4f32(1573 <4 x float> %vf0, <4 x float> %vf1, <4 x float> %neg,1574 metadata !"round.dynamic",1575 metadata !"fpexcept.strict") #01576 %res = fneg <4 x float> %fma1577 ret <4 x float> %res1578}1579 1580define <2 x double> @fnmsub_v2f64(<2 x double> %vf0, <2 x double> %vf1, <2 x double> %vf2) #0 {1581; CHECK-LABEL: fnmsub_v2f64:1582; CHECK: # %bb.0:1583; CHECK-NEXT: xvnmsubadp v4, v2, v31584; CHECK-NEXT: vmr v2, v41585; CHECK-NEXT: blr1586;1587; NOVSX-LABEL: fnmsub_v2f64:1588; NOVSX: # %bb.0:1589; NOVSX-NEXT: fnmsub f2, f2, f4, f61590; NOVSX-NEXT: fnmsub f1, f1, f3, f51591; NOVSX-NEXT: blr1592;1593; SPE-LABEL: fnmsub_v2f64:1594; SPE: # %bb.0:1595; SPE-NEXT: mflr r01596; SPE-NEXT: stwu r1, -80(r1)1597; SPE-NEXT: stw r0, 84(r1)1598; SPE-NEXT: .cfi_def_cfa_offset 801599; SPE-NEXT: .cfi_offset lr, 41600; SPE-NEXT: .cfi_offset r26, -641601; SPE-NEXT: .cfi_offset r27, -561602; SPE-NEXT: .cfi_offset r28, -481603; SPE-NEXT: .cfi_offset r29, -401604; SPE-NEXT: .cfi_offset r30, -81605; SPE-NEXT: stw r30, 72(r1) # 4-byte Folded Spill1606; SPE-NEXT: mr r30, r31607; SPE-NEXT: evldd r3, 96(r1)1608; SPE-NEXT: evldd r11, 104(r1)1609; SPE-NEXT: evstdd r26, 16(r1) # 8-byte Folded Spill1610; SPE-NEXT: evstdd r27, 24(r1) # 8-byte Folded Spill1611; SPE-NEXT: efdneg r27, r111612; SPE-NEXT: evstdd r28, 32(r1) # 8-byte Folded Spill1613; SPE-NEXT: evstdd r29, 40(r1) # 8-byte Folded Spill1614; SPE-NEXT: evmergelo r29, r7, r81615; SPE-NEXT: evmergelo r9, r9, r101616; SPE-NEXT: evmergelo r4, r5, r61617; SPE-NEXT: efdneg r8, r31618; SPE-NEXT: evmergehi r3, r4, r41619; SPE-NEXT: evmergehi r5, r9, r91620; SPE-NEXT: evmergehi r7, r8, r81621; SPE-NEXT: mr r6, r91622; SPE-NEXT: evldd r28, 88(r1)1623; SPE-NEXT: bl fma1624; SPE-NEXT: evmergelo r26, r3, r41625; SPE-NEXT: evmergehi r3, r29, r291626; SPE-NEXT: evmergehi r5, r28, r281627; SPE-NEXT: evmergehi r7, r27, r271628; SPE-NEXT: mr r4, r291629; SPE-NEXT: mr r6, r281630; SPE-NEXT: mr r8, r271631; SPE-NEXT: bl fma1632; SPE-NEXT: evmergelo r3, r3, r41633; SPE-NEXT: li r5, 81634; SPE-NEXT: efdneg r3, r31635; SPE-NEXT: evstddx r3, r30, r51636; SPE-NEXT: efdneg r3, r261637; SPE-NEXT: evstdd r3, 0(r30)1638; SPE-NEXT: lwz r30, 72(r1) # 4-byte Folded Reload1639; SPE-NEXT: evldd r29, 40(r1) # 8-byte Folded Reload1640; SPE-NEXT: evldd r28, 32(r1) # 8-byte Folded Reload1641; SPE-NEXT: evldd r27, 24(r1) # 8-byte Folded Reload1642; SPE-NEXT: evldd r26, 16(r1) # 8-byte Folded Reload1643; SPE-NEXT: lwz r0, 84(r1)1644; SPE-NEXT: addi r1, r1, 801645; SPE-NEXT: mtlr r01646; SPE-NEXT: blr1647 %neg = fneg <2 x double> %vf21648 %fma = call <2 x double> @llvm.experimental.constrained.fma.v2f64(1649 <2 x double> %vf0, <2 x double> %vf1, <2 x double> %neg,1650 metadata !"round.dynamic",1651 metadata !"fpexcept.strict") #01652 %res = fneg <2 x double> %fma1653 ret <2 x double> %res1654}1655 1656define float @fsqrt_f32(float %f1) #0 {1657; CHECK-LABEL: fsqrt_f32:1658; CHECK: # %bb.0:1659; CHECK-NEXT: xssqrtsp f1, f11660; CHECK-NEXT: blr1661;1662; NOVSX-LABEL: fsqrt_f32:1663; NOVSX: # %bb.0:1664; NOVSX-NEXT: fsqrts f1, f11665; NOVSX-NEXT: blr1666;1667; SPE-LABEL: fsqrt_f32:1668; SPE: # %bb.0:1669; SPE-NEXT: mflr r01670; SPE-NEXT: stwu r1, -16(r1)1671; SPE-NEXT: stw r0, 20(r1)1672; SPE-NEXT: .cfi_def_cfa_offset 161673; SPE-NEXT: .cfi_offset lr, 41674; SPE-NEXT: bl sqrtf1675; SPE-NEXT: lwz r0, 20(r1)1676; SPE-NEXT: addi r1, r1, 161677; SPE-NEXT: mtlr r01678; SPE-NEXT: blr1679 %res = call float @llvm.experimental.constrained.sqrt.f32(1680 float %f1,1681 metadata !"round.dynamic",1682 metadata !"fpexcept.strict") #01683 ret float %res1684}1685 1686define double @fsqrt_f64(double %f1) #0 {1687; CHECK-LABEL: fsqrt_f64:1688; CHECK: # %bb.0:1689; CHECK-NEXT: xssqrtdp f1, f11690; CHECK-NEXT: blr1691;1692; NOVSX-LABEL: fsqrt_f64:1693; NOVSX: # %bb.0:1694; NOVSX-NEXT: fsqrt f1, f11695; NOVSX-NEXT: blr1696;1697; SPE-LABEL: fsqrt_f64:1698; SPE: # %bb.0:1699; SPE-NEXT: mflr r01700; SPE-NEXT: stwu r1, -16(r1)1701; SPE-NEXT: stw r0, 20(r1)1702; SPE-NEXT: .cfi_def_cfa_offset 161703; SPE-NEXT: .cfi_offset lr, 41704; SPE-NEXT: evmergelo r4, r3, r41705; SPE-NEXT: evmergehi r3, r4, r41706; SPE-NEXT: bl sqrt1707; SPE-NEXT: evmergelo r4, r3, r41708; SPE-NEXT: evmergehi r3, r4, r41709; SPE-NEXT: lwz r0, 20(r1)1710; SPE-NEXT: addi r1, r1, 161711; SPE-NEXT: mtlr r01712; SPE-NEXT: blr1713 %res = call double @llvm.experimental.constrained.sqrt.f64(1714 double %f1,1715 metadata !"round.dynamic",1716 metadata !"fpexcept.strict") #01717 ret double %res1718}1719 1720define <4 x float> @fsqrt_v4f32(<4 x float> %vf1) #0 {1721; CHECK-LABEL: fsqrt_v4f32:1722; CHECK: # %bb.0:1723; CHECK-NEXT: xvsqrtsp v2, v21724; CHECK-NEXT: blr1725;1726; NOVSX-LABEL: fsqrt_v4f32:1727; NOVSX: # %bb.0:1728; NOVSX-NEXT: addi r3, r1, -321729; NOVSX-NEXT: stvx v2, 0, r31730; NOVSX-NEXT: addi r3, r1, -161731; NOVSX-NEXT: lfs f0, -20(r1)1732; NOVSX-NEXT: fsqrts f0, f01733; NOVSX-NEXT: stfs f0, -4(r1)1734; NOVSX-NEXT: lfs f0, -24(r1)1735; NOVSX-NEXT: fsqrts f0, f01736; NOVSX-NEXT: stfs f0, -8(r1)1737; NOVSX-NEXT: lfs f0, -28(r1)1738; NOVSX-NEXT: fsqrts f0, f01739; NOVSX-NEXT: stfs f0, -12(r1)1740; NOVSX-NEXT: lfs f0, -32(r1)1741; NOVSX-NEXT: fsqrts f0, f01742; NOVSX-NEXT: stfs f0, -16(r1)1743; NOVSX-NEXT: lvx v2, 0, r31744; NOVSX-NEXT: blr1745;1746; SPE-LABEL: fsqrt_v4f32:1747; SPE: # %bb.0:1748; SPE-NEXT: mflr r01749; SPE-NEXT: stwu r1, -32(r1)1750; SPE-NEXT: stw r0, 36(r1)1751; SPE-NEXT: .cfi_def_cfa_offset 321752; SPE-NEXT: .cfi_offset lr, 41753; SPE-NEXT: .cfi_offset r27, -201754; SPE-NEXT: .cfi_offset r28, -161755; SPE-NEXT: .cfi_offset r29, -121756; SPE-NEXT: .cfi_offset r30, -81757; SPE-NEXT: stw r28, 16(r1) # 4-byte Folded Spill1758; SPE-NEXT: mr r28, r31759; SPE-NEXT: mr r3, r61760; SPE-NEXT: stw r27, 12(r1) # 4-byte Folded Spill1761; SPE-NEXT: stw r29, 20(r1) # 4-byte Folded Spill1762; SPE-NEXT: mr r29, r41763; SPE-NEXT: stw r30, 24(r1) # 4-byte Folded Spill1764; SPE-NEXT: mr r30, r51765; SPE-NEXT: bl sqrtf1766; SPE-NEXT: mr r27, r31767; SPE-NEXT: mr r3, r301768; SPE-NEXT: bl sqrtf1769; SPE-NEXT: mr r30, r31770; SPE-NEXT: mr r3, r291771; SPE-NEXT: bl sqrtf1772; SPE-NEXT: mr r29, r31773; SPE-NEXT: mr r3, r281774; SPE-NEXT: bl sqrtf1775; SPE-NEXT: mr r4, r291776; SPE-NEXT: mr r5, r301777; SPE-NEXT: mr r6, r271778; SPE-NEXT: lwz r30, 24(r1) # 4-byte Folded Reload1779; SPE-NEXT: lwz r29, 20(r1) # 4-byte Folded Reload1780; SPE-NEXT: lwz r28, 16(r1) # 4-byte Folded Reload1781; SPE-NEXT: lwz r27, 12(r1) # 4-byte Folded Reload1782; SPE-NEXT: lwz r0, 36(r1)1783; SPE-NEXT: addi r1, r1, 321784; SPE-NEXT: mtlr r01785; SPE-NEXT: blr1786 %res = call <4 x float> @llvm.experimental.constrained.sqrt.v4f32(1787 <4 x float> %vf1,1788 metadata !"round.dynamic",1789 metadata !"fpexcept.strict") #01790 ret <4 x float> %res1791}1792 1793define <2 x double> @fsqrt_v2f64(<2 x double> %vf1) #0 {1794; CHECK-LABEL: fsqrt_v2f64:1795; CHECK: # %bb.0:1796; CHECK-NEXT: xvsqrtdp v2, v21797; CHECK-NEXT: blr1798;1799; NOVSX-LABEL: fsqrt_v2f64:1800; NOVSX: # %bb.0:1801; NOVSX-NEXT: fsqrt f2, f21802; NOVSX-NEXT: fsqrt f1, f11803; NOVSX-NEXT: blr1804;1805; SPE-LABEL: fsqrt_v2f64:1806; SPE: # %bb.0:1807; SPE-NEXT: mflr r01808; SPE-NEXT: stwu r1, -64(r1)1809; SPE-NEXT: stw r0, 68(r1)1810; SPE-NEXT: .cfi_def_cfa_offset 641811; SPE-NEXT: .cfi_offset lr, 41812; SPE-NEXT: .cfi_offset r28, -481813; SPE-NEXT: .cfi_offset r29, -401814; SPE-NEXT: .cfi_offset r30, -81815; SPE-NEXT: evstdd r28, 16(r1) # 8-byte Folded Spill1816; SPE-NEXT: evstdd r29, 24(r1) # 8-byte Folded Spill1817; SPE-NEXT: stw r30, 56(r1) # 4-byte Folded Spill1818; SPE-NEXT: evmergelo r29, r7, r81819; SPE-NEXT: evmergelo r4, r5, r61820; SPE-NEXT: mr r30, r31821; SPE-NEXT: evmergehi r3, r4, r41822; SPE-NEXT: bl sqrt1823; SPE-NEXT: evmergelo r28, r3, r41824; SPE-NEXT: evmergehi r3, r29, r291825; SPE-NEXT: mr r4, r291826; SPE-NEXT: bl sqrt1827; SPE-NEXT: li r5, 81828; SPE-NEXT: evmergelo r3, r3, r41829; SPE-NEXT: evstddx r3, r30, r51830; SPE-NEXT: evstdd r28, 0(r30)1831; SPE-NEXT: lwz r30, 56(r1) # 4-byte Folded Reload1832; SPE-NEXT: evldd r29, 24(r1) # 8-byte Folded Reload1833; SPE-NEXT: evldd r28, 16(r1) # 8-byte Folded Reload1834; SPE-NEXT: lwz r0, 68(r1)1835; SPE-NEXT: addi r1, r1, 641836; SPE-NEXT: mtlr r01837; SPE-NEXT: blr1838 %res = call <2 x double> @llvm.experimental.constrained.sqrt.v2f64(1839 <2 x double> %vf1,1840 metadata !"round.dynamic",1841 metadata !"fpexcept.strict") #01842 ret <2 x double> %res1843}1844 1845attributes #0 = { strictfp }1846