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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=ppc32-- | FileCheck %s --check-prefixes=CHECK,CHECK32,CHECK32_323; RUN: llc < %s -mtriple=ppc32-- -mcpu=ppc64 | FileCheck %s --check-prefixes=CHECK,CHECK32,CHECK32_644; RUN: llc < %s -mtriple=powerpc64le-- | FileCheck %s --check-prefixes=CHECK,CHECK645 6declare i8 @llvm.fshl.i8(i8, i8, i8)7declare i16 @llvm.fshl.i16(i16, i16, i16)8declare i32 @llvm.fshl.i32(i32, i32, i32)9declare i64 @llvm.fshl.i64(i64, i64, i64)10declare i128 @llvm.fshl.i128(i128, i128, i128)11declare <4 x i32> @llvm.fshl.v4i32(<4 x i32>, <4 x i32>, <4 x i32>)12 13declare i8 @llvm.fshr.i8(i8, i8, i8)14declare i16 @llvm.fshr.i16(i16, i16, i16)15declare i32 @llvm.fshr.i32(i32, i32, i32)16declare i64 @llvm.fshr.i64(i64, i64, i64)17declare <4 x i32> @llvm.fshr.v4i32(<4 x i32>, <4 x i32>, <4 x i32>)18 19; General case - all operands can be variables.20 21define i32 @fshl_i32(i32 %x, i32 %y, i32 %z) {22; CHECK-LABEL: fshl_i32:23; CHECK: # %bb.0:24; CHECK-NEXT: clrlwi 5, 5, 2725; CHECK-NEXT: slw 3, 3, 526; CHECK-NEXT: subfic 5, 5, 3227; CHECK-NEXT: srw 4, 4, 528; CHECK-NEXT: or 3, 3, 429; CHECK-NEXT: blr30 %f = call i32 @llvm.fshl.i32(i32 %x, i32 %y, i32 %z)31 ret i32 %f32}33 34define i64 @fshl_i64(i64 %x, i64 %y, i64 %z) {35; CHECK32-LABEL: fshl_i64:36; CHECK32: # %bb.0:37; CHECK32-NEXT: andi. 7, 8, 3238; CHECK32-NEXT: mr 7, 539; CHECK32-NEXT: bne 0, .LBB1_240; CHECK32-NEXT: # %bb.1:41; CHECK32-NEXT: mr 7, 442; CHECK32-NEXT: .LBB1_2:43; CHECK32-NEXT: clrlwi 8, 8, 2744; CHECK32-NEXT: subfic 9, 8, 3245; CHECK32-NEXT: srw 10, 7, 946; CHECK32-NEXT: bne 0, .LBB1_447; CHECK32-NEXT: # %bb.3:48; CHECK32-NEXT: mr 4, 349; CHECK32-NEXT: .LBB1_4:50; CHECK32-NEXT: slw 3, 4, 851; CHECK32-NEXT: or 3, 3, 1052; CHECK32-NEXT: bne 0, .LBB1_653; CHECK32-NEXT: # %bb.5:54; CHECK32-NEXT: mr 6, 555; CHECK32-NEXT: .LBB1_6:56; CHECK32-NEXT: srw 4, 6, 957; CHECK32-NEXT: slw 5, 7, 858; CHECK32-NEXT: or 4, 5, 459; CHECK32-NEXT: blr60;61; CHECK64-LABEL: fshl_i64:62; CHECK64: # %bb.0:63; CHECK64-NEXT: clrlwi 5, 5, 2664; CHECK64-NEXT: sld 3, 3, 565; CHECK64-NEXT: subfic 5, 5, 6466; CHECK64-NEXT: srd 4, 4, 567; CHECK64-NEXT: or 3, 3, 468; CHECK64-NEXT: blr69 %f = call i64 @llvm.fshl.i64(i64 %x, i64 %y, i64 %z)70 ret i64 %f71}72 73define i128 @fshl_i128(i128 %x, i128 %y, i128 %z) nounwind {74; CHECK32_32-LABEL: fshl_i128:75; CHECK32_32: # %bb.0:76; CHECK32_32-NEXT: stwu 1, -32(1)77; CHECK32_32-NEXT: lwz 12, 52(1)78; CHECK32_32-NEXT: stw 29, 20(1) # 4-byte Folded Spill79; CHECK32_32-NEXT: andi. 11, 12, 6480; CHECK32_32-NEXT: mcrf 1, 081; CHECK32_32-NEXT: mr 11, 682; CHECK32_32-NEXT: stw 30, 24(1) # 4-byte Folded Spill83; CHECK32_32-NEXT: bne 0, .LBB2_284; CHECK32_32-NEXT: # %bb.1:85; CHECK32_32-NEXT: mr 11, 486; CHECK32_32-NEXT: .LBB2_2:87; CHECK32_32-NEXT: mr 30, 788; CHECK32_32-NEXT: bne 1, .LBB2_489; CHECK32_32-NEXT: # %bb.3:90; CHECK32_32-NEXT: mr 30, 591; CHECK32_32-NEXT: .LBB2_4:92; CHECK32_32-NEXT: andi. 4, 12, 3293; CHECK32_32-NEXT: mr 4, 3094; CHECK32_32-NEXT: beq 0, .LBB2_1895; CHECK32_32-NEXT: # %bb.5:96; CHECK32_32-NEXT: beq 1, .LBB2_1997; CHECK32_32-NEXT: .LBB2_6:98; CHECK32_32-NEXT: beq 0, .LBB2_2099; CHECK32_32-NEXT: .LBB2_7:100; CHECK32_32-NEXT: mr 5, 8101; CHECK32_32-NEXT: beq 1, .LBB2_21102; CHECK32_32-NEXT: .LBB2_8:103; CHECK32_32-NEXT: mr 3, 5104; CHECK32_32-NEXT: beq 0, .LBB2_22105; CHECK32_32-NEXT: .LBB2_9:106; CHECK32_32-NEXT: clrlwi 6, 12, 27107; CHECK32_32-NEXT: bne 1, .LBB2_11108; CHECK32_32-NEXT: .LBB2_10:109; CHECK32_32-NEXT: mr 9, 7110; CHECK32_32-NEXT: .LBB2_11:111; CHECK32_32-NEXT: subfic 7, 6, 32112; CHECK32_32-NEXT: mr 12, 9113; CHECK32_32-NEXT: bne 0, .LBB2_13114; CHECK32_32-NEXT: # %bb.12:115; CHECK32_32-NEXT: mr 12, 5116; CHECK32_32-NEXT: .LBB2_13:117; CHECK32_32-NEXT: srw 5, 4, 7118; CHECK32_32-NEXT: slw 11, 11, 6119; CHECK32_32-NEXT: srw 0, 3, 7120; CHECK32_32-NEXT: slw 4, 4, 6121; CHECK32_32-NEXT: srw 30, 12, 7122; CHECK32_32-NEXT: slw 29, 3, 6123; CHECK32_32-NEXT: bne 1, .LBB2_15124; CHECK32_32-NEXT: # %bb.14:125; CHECK32_32-NEXT: mr 10, 8126; CHECK32_32-NEXT: .LBB2_15:127; CHECK32_32-NEXT: or 3, 11, 5128; CHECK32_32-NEXT: or 4, 4, 0129; CHECK32_32-NEXT: or 5, 29, 30130; CHECK32_32-NEXT: bne 0, .LBB2_17131; CHECK32_32-NEXT: # %bb.16:132; CHECK32_32-NEXT: mr 10, 9133; CHECK32_32-NEXT: .LBB2_17:134; CHECK32_32-NEXT: srw 7, 10, 7135; CHECK32_32-NEXT: slw 6, 12, 6136; CHECK32_32-NEXT: or 6, 6, 7137; CHECK32_32-NEXT: lwz 30, 24(1) # 4-byte Folded Reload138; CHECK32_32-NEXT: lwz 29, 20(1) # 4-byte Folded Reload139; CHECK32_32-NEXT: addi 1, 1, 32140; CHECK32_32-NEXT: blr141; CHECK32_32-NEXT: .LBB2_18:142; CHECK32_32-NEXT: mr 4, 11143; CHECK32_32-NEXT: bne 1, .LBB2_6144; CHECK32_32-NEXT: .LBB2_19:145; CHECK32_32-NEXT: mr 5, 3146; CHECK32_32-NEXT: bne 0, .LBB2_7147; CHECK32_32-NEXT: .LBB2_20:148; CHECK32_32-NEXT: mr 11, 5149; CHECK32_32-NEXT: mr 5, 8150; CHECK32_32-NEXT: bne 1, .LBB2_8151; CHECK32_32-NEXT: .LBB2_21:152; CHECK32_32-NEXT: mr 5, 6153; CHECK32_32-NEXT: mr 3, 5154; CHECK32_32-NEXT: bne 0, .LBB2_9155; CHECK32_32-NEXT: .LBB2_22:156; CHECK32_32-NEXT: mr 3, 30157; CHECK32_32-NEXT: clrlwi 6, 12, 27158; CHECK32_32-NEXT: beq 1, .LBB2_10159; CHECK32_32-NEXT: b .LBB2_11160;161; CHECK32_64-LABEL: fshl_i128:162; CHECK32_64: # %bb.0:163; CHECK32_64-NEXT: stwu 1, -32(1)164; CHECK32_64-NEXT: lwz 12, 52(1)165; CHECK32_64-NEXT: andi. 11, 12, 64166; CHECK32_64-NEXT: stw 29, 20(1) # 4-byte Folded Spill167; CHECK32_64-NEXT: mcrf 1, 0168; CHECK32_64-NEXT: mr 11, 6169; CHECK32_64-NEXT: stw 30, 24(1) # 4-byte Folded Spill170; CHECK32_64-NEXT: bne 0, .LBB2_2171; CHECK32_64-NEXT: # %bb.1:172; CHECK32_64-NEXT: mr 11, 4173; CHECK32_64-NEXT: .LBB2_2:174; CHECK32_64-NEXT: mr 30, 7175; CHECK32_64-NEXT: bne 1, .LBB2_4176; CHECK32_64-NEXT: # %bb.3:177; CHECK32_64-NEXT: mr 30, 5178; CHECK32_64-NEXT: .LBB2_4:179; CHECK32_64-NEXT: andi. 4, 12, 32180; CHECK32_64-NEXT: mr 4, 30181; CHECK32_64-NEXT: beq 0, .LBB2_18182; CHECK32_64-NEXT: # %bb.5:183; CHECK32_64-NEXT: beq 1, .LBB2_19184; CHECK32_64-NEXT: .LBB2_6:185; CHECK32_64-NEXT: beq 0, .LBB2_20186; CHECK32_64-NEXT: .LBB2_7:187; CHECK32_64-NEXT: mr 5, 8188; CHECK32_64-NEXT: beq 1, .LBB2_21189; CHECK32_64-NEXT: .LBB2_8:190; CHECK32_64-NEXT: mr 3, 5191; CHECK32_64-NEXT: beq 0, .LBB2_22192; CHECK32_64-NEXT: .LBB2_9:193; CHECK32_64-NEXT: clrlwi 6, 12, 27194; CHECK32_64-NEXT: bne 1, .LBB2_11195; CHECK32_64-NEXT: .LBB2_10:196; CHECK32_64-NEXT: mr 9, 7197; CHECK32_64-NEXT: .LBB2_11:198; CHECK32_64-NEXT: subfic 7, 6, 32199; CHECK32_64-NEXT: mr 12, 9200; CHECK32_64-NEXT: bne 0, .LBB2_13201; CHECK32_64-NEXT: # %bb.12:202; CHECK32_64-NEXT: mr 12, 5203; CHECK32_64-NEXT: .LBB2_13:204; CHECK32_64-NEXT: srw 5, 4, 7205; CHECK32_64-NEXT: slw 11, 11, 6206; CHECK32_64-NEXT: srw 0, 3, 7207; CHECK32_64-NEXT: slw 4, 4, 6208; CHECK32_64-NEXT: srw 30, 12, 7209; CHECK32_64-NEXT: slw 29, 3, 6210; CHECK32_64-NEXT: bne 1, .LBB2_15211; CHECK32_64-NEXT: # %bb.14:212; CHECK32_64-NEXT: mr 10, 8213; CHECK32_64-NEXT: .LBB2_15:214; CHECK32_64-NEXT: or 3, 11, 5215; CHECK32_64-NEXT: or 4, 4, 0216; CHECK32_64-NEXT: or 5, 29, 30217; CHECK32_64-NEXT: bne 0, .LBB2_17218; CHECK32_64-NEXT: # %bb.16:219; CHECK32_64-NEXT: mr 10, 9220; CHECK32_64-NEXT: .LBB2_17:221; CHECK32_64-NEXT: srw 7, 10, 7222; CHECK32_64-NEXT: slw 6, 12, 6223; CHECK32_64-NEXT: lwz 30, 24(1) # 4-byte Folded Reload224; CHECK32_64-NEXT: or 6, 6, 7225; CHECK32_64-NEXT: lwz 29, 20(1) # 4-byte Folded Reload226; CHECK32_64-NEXT: addi 1, 1, 32227; CHECK32_64-NEXT: blr228; CHECK32_64-NEXT: .LBB2_18:229; CHECK32_64-NEXT: mr 4, 11230; CHECK32_64-NEXT: bne 1, .LBB2_6231; CHECK32_64-NEXT: .LBB2_19:232; CHECK32_64-NEXT: mr 5, 3233; CHECK32_64-NEXT: bne 0, .LBB2_7234; CHECK32_64-NEXT: .LBB2_20:235; CHECK32_64-NEXT: mr 11, 5236; CHECK32_64-NEXT: mr 5, 8237; CHECK32_64-NEXT: bne 1, .LBB2_8238; CHECK32_64-NEXT: .LBB2_21:239; CHECK32_64-NEXT: mr 5, 6240; CHECK32_64-NEXT: mr 3, 5241; CHECK32_64-NEXT: bne 0, .LBB2_9242; CHECK32_64-NEXT: .LBB2_22:243; CHECK32_64-NEXT: mr 3, 30244; CHECK32_64-NEXT: clrlwi 6, 12, 27245; CHECK32_64-NEXT: beq 1, .LBB2_10246; CHECK32_64-NEXT: b .LBB2_11247;248; CHECK64-LABEL: fshl_i128:249; CHECK64: # %bb.0:250; CHECK64-NEXT: andi. 8, 7, 64251; CHECK64-NEXT: clrlwi 7, 7, 26252; CHECK64-NEXT: subfic 8, 7, 64253; CHECK64-NEXT: iseleq 5, 6, 5254; CHECK64-NEXT: iseleq 6, 3, 6255; CHECK64-NEXT: iseleq 3, 4, 3256; CHECK64-NEXT: srd 5, 5, 8257; CHECK64-NEXT: sld 9, 6, 7258; CHECK64-NEXT: srd 6, 6, 8259; CHECK64-NEXT: sld 3, 3, 7260; CHECK64-NEXT: or 5, 9, 5261; CHECK64-NEXT: or 4, 3, 6262; CHECK64-NEXT: mr 3, 5263; CHECK64-NEXT: blr264 %f = call i128 @llvm.fshl.i128(i128 %x, i128 %y, i128 %z)265 ret i128 %f266}267 268; Verify that weird types are minimally supported.269declare i37 @llvm.fshl.i37(i37, i37, i37)270define i37 @fshl_i37(i37 %x, i37 %y, i37 %z) {271; CHECK32_32-LABEL: fshl_i37:272; CHECK32_32: # %bb.0:273; CHECK32_32-NEXT: mflr 0274; CHECK32_32-NEXT: stwu 1, -32(1)275; CHECK32_32-NEXT: stw 0, 36(1)276; CHECK32_32-NEXT: .cfi_def_cfa_offset 32277; CHECK32_32-NEXT: .cfi_offset lr, 4278; CHECK32_32-NEXT: .cfi_offset r27, -20279; CHECK32_32-NEXT: .cfi_offset r28, -16280; CHECK32_32-NEXT: .cfi_offset r29, -12281; CHECK32_32-NEXT: .cfi_offset r30, -8282; CHECK32_32-NEXT: stw 27, 12(1) # 4-byte Folded Spill283; CHECK32_32-NEXT: mr 27, 5284; CHECK32_32-NEXT: stw 28, 16(1) # 4-byte Folded Spill285; CHECK32_32-NEXT: mr 28, 3286; CHECK32_32-NEXT: stw 29, 20(1) # 4-byte Folded Spill287; CHECK32_32-NEXT: mr 29, 4288; CHECK32_32-NEXT: stw 30, 24(1) # 4-byte Folded Spill289; CHECK32_32-NEXT: mr 30, 6290; CHECK32_32-NEXT: clrlwi 3, 7, 27291; CHECK32_32-NEXT: mr 4, 8292; CHECK32_32-NEXT: li 5, 0293; CHECK32_32-NEXT: li 6, 37294; CHECK32_32-NEXT: bl __umoddi3295; CHECK32_32-NEXT: rotlwi 5, 30, 27296; CHECK32_32-NEXT: rlwimi 5, 27, 27, 0, 4297; CHECK32_32-NEXT: andi. 3, 4, 32298; CHECK32_32-NEXT: mr 6, 5299; CHECK32_32-NEXT: bne 0, .LBB3_2300; CHECK32_32-NEXT: # %bb.1:301; CHECK32_32-NEXT: mr 6, 29302; CHECK32_32-NEXT: .LBB3_2:303; CHECK32_32-NEXT: clrlwi 4, 4, 27304; CHECK32_32-NEXT: subfic 7, 4, 32305; CHECK32_32-NEXT: srw 3, 6, 7306; CHECK32_32-NEXT: bne 0, .LBB3_4307; CHECK32_32-NEXT: # %bb.3:308; CHECK32_32-NEXT: mr 29, 28309; CHECK32_32-NEXT: .LBB3_4:310; CHECK32_32-NEXT: slw 8, 29, 4311; CHECK32_32-NEXT: or 3, 8, 3312; CHECK32_32-NEXT: beq 0, .LBB3_6313; CHECK32_32-NEXT: # %bb.5:314; CHECK32_32-NEXT: slwi 5, 30, 27315; CHECK32_32-NEXT: .LBB3_6:316; CHECK32_32-NEXT: srw 5, 5, 7317; CHECK32_32-NEXT: slw 4, 6, 4318; CHECK32_32-NEXT: or 4, 4, 5319; CHECK32_32-NEXT: lwz 30, 24(1) # 4-byte Folded Reload320; CHECK32_32-NEXT: lwz 29, 20(1) # 4-byte Folded Reload321; CHECK32_32-NEXT: lwz 28, 16(1) # 4-byte Folded Reload322; CHECK32_32-NEXT: lwz 27, 12(1) # 4-byte Folded Reload323; CHECK32_32-NEXT: lwz 0, 36(1)324; CHECK32_32-NEXT: addi 1, 1, 32325; CHECK32_32-NEXT: mtlr 0326; CHECK32_32-NEXT: blr327;328; CHECK32_64-LABEL: fshl_i37:329; CHECK32_64: # %bb.0:330; CHECK32_64-NEXT: mflr 0331; CHECK32_64-NEXT: stwu 1, -32(1)332; CHECK32_64-NEXT: stw 0, 36(1)333; CHECK32_64-NEXT: .cfi_def_cfa_offset 32334; CHECK32_64-NEXT: .cfi_offset lr, 4335; CHECK32_64-NEXT: .cfi_offset r27, -20336; CHECK32_64-NEXT: .cfi_offset r28, -16337; CHECK32_64-NEXT: .cfi_offset r29, -12338; CHECK32_64-NEXT: .cfi_offset r30, -8339; CHECK32_64-NEXT: stw 27, 12(1) # 4-byte Folded Spill340; CHECK32_64-NEXT: mr 27, 5341; CHECK32_64-NEXT: li 5, 0342; CHECK32_64-NEXT: stw 28, 16(1) # 4-byte Folded Spill343; CHECK32_64-NEXT: mr 28, 3344; CHECK32_64-NEXT: clrlwi 3, 7, 27345; CHECK32_64-NEXT: stw 29, 20(1) # 4-byte Folded Spill346; CHECK32_64-NEXT: mr 29, 4347; CHECK32_64-NEXT: mr 4, 8348; CHECK32_64-NEXT: stw 30, 24(1) # 4-byte Folded Spill349; CHECK32_64-NEXT: mr 30, 6350; CHECK32_64-NEXT: li 6, 37351; CHECK32_64-NEXT: bl __umoddi3352; CHECK32_64-NEXT: rotlwi 5, 30, 27353; CHECK32_64-NEXT: andi. 3, 4, 32354; CHECK32_64-NEXT: rlwimi 5, 27, 27, 0, 4355; CHECK32_64-NEXT: mr 6, 5356; CHECK32_64-NEXT: bne 0, .LBB3_2357; CHECK32_64-NEXT: # %bb.1:358; CHECK32_64-NEXT: mr 6, 29359; CHECK32_64-NEXT: .LBB3_2:360; CHECK32_64-NEXT: clrlwi 4, 4, 27361; CHECK32_64-NEXT: subfic 7, 4, 32362; CHECK32_64-NEXT: srw 3, 6, 7363; CHECK32_64-NEXT: bne 0, .LBB3_4364; CHECK32_64-NEXT: # %bb.3:365; CHECK32_64-NEXT: mr 29, 28366; CHECK32_64-NEXT: .LBB3_4:367; CHECK32_64-NEXT: slw 8, 29, 4368; CHECK32_64-NEXT: or 3, 8, 3369; CHECK32_64-NEXT: beq 0, .LBB3_6370; CHECK32_64-NEXT: # %bb.5:371; CHECK32_64-NEXT: slwi 5, 30, 27372; CHECK32_64-NEXT: .LBB3_6:373; CHECK32_64-NEXT: srw 5, 5, 7374; CHECK32_64-NEXT: slw 4, 6, 4375; CHECK32_64-NEXT: lwz 30, 24(1) # 4-byte Folded Reload376; CHECK32_64-NEXT: or 4, 4, 5377; CHECK32_64-NEXT: lwz 29, 20(1) # 4-byte Folded Reload378; CHECK32_64-NEXT: lwz 28, 16(1) # 4-byte Folded Reload379; CHECK32_64-NEXT: lwz 27, 12(1) # 4-byte Folded Reload380; CHECK32_64-NEXT: lwz 0, 36(1)381; CHECK32_64-NEXT: addi 1, 1, 32382; CHECK32_64-NEXT: mtlr 0383; CHECK32_64-NEXT: blr384;385; CHECK64-LABEL: fshl_i37:386; CHECK64: # %bb.0:387; CHECK64-NEXT: lis 7, 1771388; CHECK64-NEXT: clrldi 6, 5, 27389; CHECK64-NEXT: sldi 4, 4, 27390; CHECK64-NEXT: ori 7, 7, 15941391; CHECK64-NEXT: rldic 7, 7, 32, 5392; CHECK64-NEXT: oris 7, 7, 12398393; CHECK64-NEXT: ori 7, 7, 46053394; CHECK64-NEXT: mulhdu 6, 6, 7395; CHECK64-NEXT: mulli 6, 6, 37396; CHECK64-NEXT: sub 5, 5, 6397; CHECK64-NEXT: clrlwi 5, 5, 26398; CHECK64-NEXT: sld 3, 3, 5399; CHECK64-NEXT: subfic 5, 5, 64400; CHECK64-NEXT: srd 4, 4, 5401; CHECK64-NEXT: or 3, 3, 4402; CHECK64-NEXT: blr403 %f = call i37 @llvm.fshl.i37(i37 %x, i37 %y, i37 %z)404 ret i37 %f405}406 407; extract(concat(0b1110000, 0b1111111) << 2) = 0b1000011408 409declare i7 @llvm.fshl.i7(i7, i7, i7)410define i7 @fshl_i7_const_fold() {411; CHECK-LABEL: fshl_i7_const_fold:412; CHECK: # %bb.0:413; CHECK-NEXT: li 3, 67414; CHECK-NEXT: blr415 %f = call i7 @llvm.fshl.i7(i7 112, i7 127, i7 2)416 ret i7 %f417}418 419; With constant shift amount, this is rotate + insert (missing extended mnemonics).420 421define i32 @fshl_i32_const_shift(i32 %x, i32 %y) {422; CHECK-LABEL: fshl_i32_const_shift:423; CHECK: # %bb.0:424; CHECK-NEXT: rotlwi 4, 4, 9425; CHECK-NEXT: rlwimi 4, 3, 9, 0, 22426; CHECK-NEXT: mr 3, 4427; CHECK-NEXT: blr428 %f = call i32 @llvm.fshl.i32(i32 %x, i32 %y, i32 9)429 ret i32 %f430}431 432; Check modulo math on shift amount.433 434define i32 @fshl_i32_const_overshift(i32 %x, i32 %y) {435; CHECK-LABEL: fshl_i32_const_overshift:436; CHECK: # %bb.0:437; CHECK-NEXT: rotlwi 4, 4, 9438; CHECK-NEXT: rlwimi 4, 3, 9, 0, 22439; CHECK-NEXT: mr 3, 4440; CHECK-NEXT: blr441 %f = call i32 @llvm.fshl.i32(i32 %x, i32 %y, i32 41)442 ret i32 %f443}444 445; 64-bit should also work.446 447define i64 @fshl_i64_const_overshift(i64 %x, i64 %y) {448; CHECK32-LABEL: fshl_i64_const_overshift:449; CHECK32: # %bb.0:450; CHECK32-NEXT: rotlwi 6, 6, 9451; CHECK32-NEXT: rotlwi 3, 5, 9452; CHECK32-NEXT: rlwimi 6, 5, 9, 0, 22453; CHECK32-NEXT: rlwimi 3, 4, 9, 0, 22454; CHECK32-NEXT: mr 4, 6455; CHECK32-NEXT: blr456;457; CHECK64-LABEL: fshl_i64_const_overshift:458; CHECK64: # %bb.0:459; CHECK64-NEXT: rotldi 4, 4, 41460; CHECK64-NEXT: rldimi 4, 3, 41, 0461; CHECK64-NEXT: mr 3, 4462; CHECK64-NEXT: blr463 %f = call i64 @llvm.fshl.i64(i64 %x, i64 %y, i64 105)464 ret i64 %f465}466 467; This should work without any node-specific logic.468 469define i8 @fshl_i8_const_fold() {470; CHECK-LABEL: fshl_i8_const_fold:471; CHECK: # %bb.0:472; CHECK-NEXT: li 3, 128473; CHECK-NEXT: blr474 %f = call i8 @llvm.fshl.i8(i8 255, i8 0, i8 7)475 ret i8 %f476}477 478; Repeat everything for funnel shift right.479 480; General case - all operands can be variables.481 482define i32 @fshr_i32(i32 %x, i32 %y, i32 %z) {483; CHECK-LABEL: fshr_i32:484; CHECK: # %bb.0:485; CHECK-NEXT: clrlwi 5, 5, 27486; CHECK-NEXT: srw 4, 4, 5487; CHECK-NEXT: subfic 5, 5, 32488; CHECK-NEXT: slw 3, 3, 5489; CHECK-NEXT: or 3, 3, 4490; CHECK-NEXT: blr491 %f = call i32 @llvm.fshr.i32(i32 %x, i32 %y, i32 %z)492 ret i32 %f493}494 495define i64 @fshr_i64(i64 %x, i64 %y, i64 %z) {496; CHECK32-LABEL: fshr_i64:497; CHECK32: # %bb.0:498; CHECK32-NEXT: andi. 7, 8, 32499; CHECK32-NEXT: mr 7, 5500; CHECK32-NEXT: beq 0, .LBB10_2501; CHECK32-NEXT: # %bb.1:502; CHECK32-NEXT: mr 7, 4503; CHECK32-NEXT: .LBB10_2:504; CHECK32-NEXT: clrlwi 8, 8, 27505; CHECK32-NEXT: srw 10, 7, 8506; CHECK32-NEXT: beq 0, .LBB10_4507; CHECK32-NEXT: # %bb.3:508; CHECK32-NEXT: mr 4, 3509; CHECK32-NEXT: .LBB10_4:510; CHECK32-NEXT: subfic 9, 8, 32511; CHECK32-NEXT: slw 3, 4, 9512; CHECK32-NEXT: or 3, 3, 10513; CHECK32-NEXT: beq 0, .LBB10_6514; CHECK32-NEXT: # %bb.5:515; CHECK32-NEXT: mr 6, 5516; CHECK32-NEXT: .LBB10_6:517; CHECK32-NEXT: srw 4, 6, 8518; CHECK32-NEXT: slw 5, 7, 9519; CHECK32-NEXT: or 4, 5, 4520; CHECK32-NEXT: blr521;522; CHECK64-LABEL: fshr_i64:523; CHECK64: # %bb.0:524; CHECK64-NEXT: clrlwi 5, 5, 26525; CHECK64-NEXT: srd 4, 4, 5526; CHECK64-NEXT: subfic 5, 5, 64527; CHECK64-NEXT: sld 3, 3, 5528; CHECK64-NEXT: or 3, 3, 4529; CHECK64-NEXT: blr530 %f = call i64 @llvm.fshr.i64(i64 %x, i64 %y, i64 %z)531 ret i64 %f532}533 534; Verify that weird types are minimally supported.535declare i37 @llvm.fshr.i37(i37, i37, i37)536define i37 @fshr_i37(i37 %x, i37 %y, i37 %z) {537; CHECK32_32-LABEL: fshr_i37:538; CHECK32_32: # %bb.0:539; CHECK32_32-NEXT: mflr 0540; CHECK32_32-NEXT: stwu 1, -32(1)541; CHECK32_32-NEXT: stw 0, 36(1)542; CHECK32_32-NEXT: .cfi_def_cfa_offset 32543; CHECK32_32-NEXT: .cfi_offset lr, 4544; CHECK32_32-NEXT: .cfi_offset r27, -20545; CHECK32_32-NEXT: .cfi_offset r28, -16546; CHECK32_32-NEXT: .cfi_offset r29, -12547; CHECK32_32-NEXT: .cfi_offset r30, -8548; CHECK32_32-NEXT: stw 27, 12(1) # 4-byte Folded Spill549; CHECK32_32-NEXT: mr 27, 5550; CHECK32_32-NEXT: stw 28, 16(1) # 4-byte Folded Spill551; CHECK32_32-NEXT: mr 28, 3552; CHECK32_32-NEXT: stw 29, 20(1) # 4-byte Folded Spill553; CHECK32_32-NEXT: mr 29, 4554; CHECK32_32-NEXT: stw 30, 24(1) # 4-byte Folded Spill555; CHECK32_32-NEXT: mr 30, 6556; CHECK32_32-NEXT: clrlwi 3, 7, 27557; CHECK32_32-NEXT: mr 4, 8558; CHECK32_32-NEXT: li 5, 0559; CHECK32_32-NEXT: li 6, 37560; CHECK32_32-NEXT: bl __umoddi3561; CHECK32_32-NEXT: rotlwi 5, 30, 27562; CHECK32_32-NEXT: addi 3, 4, 27563; CHECK32_32-NEXT: andi. 4, 3, 32564; CHECK32_32-NEXT: rlwimi 5, 27, 27, 0, 4565; CHECK32_32-NEXT: mr 4, 5566; CHECK32_32-NEXT: beq 0, .LBB11_2567; CHECK32_32-NEXT: # %bb.1:568; CHECK32_32-NEXT: mr 4, 29569; CHECK32_32-NEXT: .LBB11_2:570; CHECK32_32-NEXT: clrlwi 6, 3, 27571; CHECK32_32-NEXT: srw 3, 4, 6572; CHECK32_32-NEXT: beq 0, .LBB11_4573; CHECK32_32-NEXT: # %bb.3:574; CHECK32_32-NEXT: mr 29, 28575; CHECK32_32-NEXT: .LBB11_4:576; CHECK32_32-NEXT: subfic 7, 6, 32577; CHECK32_32-NEXT: slw 8, 29, 7578; CHECK32_32-NEXT: or 3, 8, 3579; CHECK32_32-NEXT: bne 0, .LBB11_6580; CHECK32_32-NEXT: # %bb.5:581; CHECK32_32-NEXT: slwi 5, 30, 27582; CHECK32_32-NEXT: .LBB11_6:583; CHECK32_32-NEXT: srw 5, 5, 6584; CHECK32_32-NEXT: slw 4, 4, 7585; CHECK32_32-NEXT: or 4, 4, 5586; CHECK32_32-NEXT: lwz 30, 24(1) # 4-byte Folded Reload587; CHECK32_32-NEXT: lwz 29, 20(1) # 4-byte Folded Reload588; CHECK32_32-NEXT: lwz 28, 16(1) # 4-byte Folded Reload589; CHECK32_32-NEXT: lwz 27, 12(1) # 4-byte Folded Reload590; CHECK32_32-NEXT: lwz 0, 36(1)591; CHECK32_32-NEXT: addi 1, 1, 32592; CHECK32_32-NEXT: mtlr 0593; CHECK32_32-NEXT: blr594;595; CHECK32_64-LABEL: fshr_i37:596; CHECK32_64: # %bb.0:597; CHECK32_64-NEXT: mflr 0598; CHECK32_64-NEXT: stwu 1, -32(1)599; CHECK32_64-NEXT: stw 0, 36(1)600; CHECK32_64-NEXT: .cfi_def_cfa_offset 32601; CHECK32_64-NEXT: .cfi_offset lr, 4602; CHECK32_64-NEXT: .cfi_offset r27, -20603; CHECK32_64-NEXT: .cfi_offset r28, -16604; CHECK32_64-NEXT: .cfi_offset r29, -12605; CHECK32_64-NEXT: .cfi_offset r30, -8606; CHECK32_64-NEXT: stw 27, 12(1) # 4-byte Folded Spill607; CHECK32_64-NEXT: mr 27, 5608; CHECK32_64-NEXT: li 5, 0609; CHECK32_64-NEXT: stw 28, 16(1) # 4-byte Folded Spill610; CHECK32_64-NEXT: mr 28, 3611; CHECK32_64-NEXT: clrlwi 3, 7, 27612; CHECK32_64-NEXT: stw 29, 20(1) # 4-byte Folded Spill613; CHECK32_64-NEXT: mr 29, 4614; CHECK32_64-NEXT: mr 4, 8615; CHECK32_64-NEXT: stw 30, 24(1) # 4-byte Folded Spill616; CHECK32_64-NEXT: mr 30, 6617; CHECK32_64-NEXT: li 6, 37618; CHECK32_64-NEXT: bl __umoddi3619; CHECK32_64-NEXT: rotlwi 5, 30, 27620; CHECK32_64-NEXT: addi 3, 4, 27621; CHECK32_64-NEXT: andi. 4, 3, 32622; CHECK32_64-NEXT: rlwimi 5, 27, 27, 0, 4623; CHECK32_64-NEXT: mr 4, 5624; CHECK32_64-NEXT: beq 0, .LBB11_2625; CHECK32_64-NEXT: # %bb.1:626; CHECK32_64-NEXT: mr 4, 29627; CHECK32_64-NEXT: .LBB11_2:628; CHECK32_64-NEXT: clrlwi 6, 3, 27629; CHECK32_64-NEXT: srw 3, 4, 6630; CHECK32_64-NEXT: beq 0, .LBB11_4631; CHECK32_64-NEXT: # %bb.3:632; CHECK32_64-NEXT: mr 29, 28633; CHECK32_64-NEXT: .LBB11_4:634; CHECK32_64-NEXT: subfic 7, 6, 32635; CHECK32_64-NEXT: slw 8, 29, 7636; CHECK32_64-NEXT: or 3, 8, 3637; CHECK32_64-NEXT: bne 0, .LBB11_6638; CHECK32_64-NEXT: # %bb.5:639; CHECK32_64-NEXT: slwi 5, 30, 27640; CHECK32_64-NEXT: .LBB11_6:641; CHECK32_64-NEXT: srw 5, 5, 6642; CHECK32_64-NEXT: slw 4, 4, 7643; CHECK32_64-NEXT: lwz 30, 24(1) # 4-byte Folded Reload644; CHECK32_64-NEXT: or 4, 4, 5645; CHECK32_64-NEXT: lwz 29, 20(1) # 4-byte Folded Reload646; CHECK32_64-NEXT: lwz 28, 16(1) # 4-byte Folded Reload647; CHECK32_64-NEXT: lwz 27, 12(1) # 4-byte Folded Reload648; CHECK32_64-NEXT: lwz 0, 36(1)649; CHECK32_64-NEXT: addi 1, 1, 32650; CHECK32_64-NEXT: mtlr 0651; CHECK32_64-NEXT: blr652;653; CHECK64-LABEL: fshr_i37:654; CHECK64: # %bb.0:655; CHECK64-NEXT: lis 7, 1771656; CHECK64-NEXT: clrldi 6, 5, 27657; CHECK64-NEXT: sldi 4, 4, 27658; CHECK64-NEXT: ori 7, 7, 15941659; CHECK64-NEXT: rldic 7, 7, 32, 5660; CHECK64-NEXT: oris 7, 7, 12398661; CHECK64-NEXT: ori 7, 7, 46053662; CHECK64-NEXT: mulhdu 6, 6, 7663; CHECK64-NEXT: mulli 6, 6, 37664; CHECK64-NEXT: sub 5, 5, 6665; CHECK64-NEXT: addi 5, 5, 27666; CHECK64-NEXT: clrlwi 5, 5, 26667; CHECK64-NEXT: srd 4, 4, 5668; CHECK64-NEXT: subfic 5, 5, 64669; CHECK64-NEXT: sld 3, 3, 5670; CHECK64-NEXT: or 3, 3, 4671; CHECK64-NEXT: blr672 %f = call i37 @llvm.fshr.i37(i37 %x, i37 %y, i37 %z)673 ret i37 %f674}675 676; extract(concat(0b1110000, 0b1111111) >> 2) = 0b0011111677 678declare i7 @llvm.fshr.i7(i7, i7, i7)679define i7 @fshr_i7_const_fold() {680; CHECK-LABEL: fshr_i7_const_fold:681; CHECK: # %bb.0:682; CHECK-NEXT: li 3, 31683; CHECK-NEXT: blr684 %f = call i7 @llvm.fshr.i7(i7 112, i7 127, i7 2)685 ret i7 %f686}687 688; With constant shift amount, this is rotate + insert (missing extended mnemonics).689 690define i32 @fshr_i32_const_shift(i32 %x, i32 %y) {691; CHECK-LABEL: fshr_i32_const_shift:692; CHECK: # %bb.0:693; CHECK-NEXT: rotlwi 4, 4, 23694; CHECK-NEXT: rlwimi 4, 3, 23, 0, 8695; CHECK-NEXT: mr 3, 4696; CHECK-NEXT: blr697 %f = call i32 @llvm.fshr.i32(i32 %x, i32 %y, i32 9)698 ret i32 %f699}700 701; Check modulo math on shift amount. 41-32=9.702 703define i32 @fshr_i32_const_overshift(i32 %x, i32 %y) {704; CHECK-LABEL: fshr_i32_const_overshift:705; CHECK: # %bb.0:706; CHECK-NEXT: rotlwi 4, 4, 23707; CHECK-NEXT: rlwimi 4, 3, 23, 0, 8708; CHECK-NEXT: mr 3, 4709; CHECK-NEXT: blr710 %f = call i32 @llvm.fshr.i32(i32 %x, i32 %y, i32 41)711 ret i32 %f712}713 714; 64-bit should also work. 105-64 = 41.715 716define i64 @fshr_i64_const_overshift(i64 %x, i64 %y) {717; CHECK32-LABEL: fshr_i64_const_overshift:718; CHECK32: # %bb.0:719; CHECK32-NEXT: rotlwi 6, 4, 23720; CHECK32-NEXT: rotlwi 5, 5, 23721; CHECK32-NEXT: rlwimi 6, 3, 23, 0, 8722; CHECK32-NEXT: rlwimi 5, 4, 23, 0, 8723; CHECK32-NEXT: mr 3, 6724; CHECK32-NEXT: mr 4, 5725; CHECK32-NEXT: blr726;727; CHECK64-LABEL: fshr_i64_const_overshift:728; CHECK64: # %bb.0:729; CHECK64-NEXT: rotldi 4, 4, 23730; CHECK64-NEXT: rldimi 4, 3, 23, 0731; CHECK64-NEXT: mr 3, 4732; CHECK64-NEXT: blr733 %f = call i64 @llvm.fshr.i64(i64 %x, i64 %y, i64 105)734 ret i64 %f735}736 737; This should work without any node-specific logic.738 739define i8 @fshr_i8_const_fold() {740; CHECK-LABEL: fshr_i8_const_fold:741; CHECK: # %bb.0:742; CHECK-NEXT: li 3, 254743; CHECK-NEXT: blr744 %f = call i8 @llvm.fshr.i8(i8 255, i8 0, i8 7)745 ret i8 %f746}747 748define i32 @fshl_i32_shift_by_bitwidth(i32 %x, i32 %y) {749; CHECK-LABEL: fshl_i32_shift_by_bitwidth:750; CHECK: # %bb.0:751; CHECK-NEXT: blr752 %f = call i32 @llvm.fshl.i32(i32 %x, i32 %y, i32 32)753 ret i32 %f754}755 756define i32 @fshr_i32_shift_by_bitwidth(i32 %x, i32 %y) {757; CHECK-LABEL: fshr_i32_shift_by_bitwidth:758; CHECK: # %bb.0:759; CHECK-NEXT: mr 3, 4760; CHECK-NEXT: blr761 %f = call i32 @llvm.fshr.i32(i32 %x, i32 %y, i32 32)762 ret i32 %f763}764 765define <4 x i32> @fshl_v4i32_shift_by_bitwidth(<4 x i32> %x, <4 x i32> %y) {766; CHECK-LABEL: fshl_v4i32_shift_by_bitwidth:767; CHECK: # %bb.0:768; CHECK-NEXT: blr769 %f = call <4 x i32> @llvm.fshl.v4i32(<4 x i32> %x, <4 x i32> %y, <4 x i32> <i32 32, i32 32, i32 32, i32 32>)770 ret <4 x i32> %f771}772 773define <4 x i32> @fshr_v4i32_shift_by_bitwidth(<4 x i32> %x, <4 x i32> %y) {774; CHECK32_32-LABEL: fshr_v4i32_shift_by_bitwidth:775; CHECK32_32: # %bb.0:776; CHECK32_32-NEXT: mr 6, 10777; CHECK32_32-NEXT: mr 5, 9778; CHECK32_32-NEXT: mr 4, 8779; CHECK32_32-NEXT: mr 3, 7780; CHECK32_32-NEXT: blr781;782; CHECK32_64-LABEL: fshr_v4i32_shift_by_bitwidth:783; CHECK32_64: # %bb.0:784; CHECK32_64-NEXT: vmr 2, 3785; CHECK32_64-NEXT: blr786;787; CHECK64-LABEL: fshr_v4i32_shift_by_bitwidth:788; CHECK64: # %bb.0:789; CHECK64-NEXT: vmr 2, 3790; CHECK64-NEXT: blr791 %f = call <4 x i32> @llvm.fshr.v4i32(<4 x i32> %x, <4 x i32> %y, <4 x i32> <i32 32, i32 32, i32 32, i32 32>)792 ret <4 x i32> %f793}794 795