27 lines · plain
1; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mtriple=powerpc64le-unknown-linux-gnu -ppc-enable-gpr-to-vsr-spills < %s | FileCheck %s2; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mtriple=powerpc64-ibm-aix-xcoff -ppc-enable-gpr-to-vsr-spills -vec-extabi < %s | FileCheck %s3 4define signext i32 @foo(i32 signext %a, i32 signext %b) {5entry:6 %cmp = icmp slt i32 %a, %b7 br i1 %cmp, label %if.then, label %if.end8 9if.then: ; preds = %entry10 %0 = tail call i32 asm "add $0, $1, $2", "=r,r,r,~{r0},~{r1},~{r2},~{r3},~{r4},~{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15},~{r16},~{r17},~{r18},~{r19},~{r20},~{r21},~{r22},~{r23},~{r24},~{r25},~{r26},~{r27},~{r28},~{r29}"(i32 %a, i32 %b)11 %mul = mul nsw i32 %0, %a12 %add = add i32 %b, %a13 %tmp = add i32 %add, %mul14 br label %if.end15 16if.end: ; preds = %if.then, %entry17 %e.0 = phi i32 [ %tmp, %if.then ], [ undef, %entry ]18 ret i32 %e.019; CHECK: @foo20; CHECK: mr [[NEWREG:[0-9]+]], 321; CHECK: mr [[REG1:[0-9]+]], 422; CHECK: mtfprd [[NEWREG2:[0-9]+]], 423; CHECK: add {{[0-9]+}}, [[NEWREG]], [[REG1]]24; CHECK: mffprd [[REG2:[0-9]+]], [[NEWREG2]]25; CHECK: add {{[0-9]+}}, [[REG2]], [[NEWREG]]26}27