73 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -verify-machineinstrs -mcpu=ppc -mtriple=powerpc64-unknown-linux-gnu | FileCheck %s3; RUN: llc < %s -verify-machineinstrs -mcpu=ppc -mtriple=powerpc64-ibm-aix-xcoff | FileCheck %s4 5; This is good - eliminate an op by hoisting logic.6 7define i32 @lshr_or(i32 %x, i32 %y, i32 %z, ptr %p1, ptr %p2) {8; CHECK-LABEL: lshr_or:9; CHECK: # %bb.0:10; CHECK-NEXT: or 3, 3, 411; CHECK-NEXT: srw 3, 3, 512; CHECK-NEXT: blr13 %xt = lshr i32 %x, %z14 %yt = lshr i32 %y, %z15 %r = or i32 %xt, %yt16 ret i32 %r17}18 19; This is questionable - hoisting doesn't eliminate anything.20; It might result in an extra register move.21 22define i32 @lshr_or_multiuse1(i32 %x, i32 %y, i32 %z, ptr %p1, ptr %p2) {23; CHECK-LABEL: lshr_or_multiuse1:24; CHECK: # %bb.0:25; CHECK-NEXT: srw 7, 3, 526; CHECK-NEXT: srw 3, 4, 527; CHECK-NEXT: or 3, 7, 328; CHECK-NEXT: stw 7, 0(6)29; CHECK-NEXT: blr30 %xt = lshr i32 %x, %z31 %yt = lshr i32 %y, %z32 store i32 %xt, ptr %p133 %r = or i32 %xt, %yt34 ret i32 %r35}36 37; This is questionable - hoisting doesn't eliminate anything.38 39define i32 @lshr_multiuse2(i32 %x, i32 %y, i32 %z, ptr %p1, ptr %p2) {40; CHECK-LABEL: lshr_multiuse2:41; CHECK: # %bb.0:42; CHECK-NEXT: srw 3, 3, 543; CHECK-NEXT: srw 4, 4, 544; CHECK-NEXT: or 3, 3, 445; CHECK-NEXT: stw 4, 0(7)46; CHECK-NEXT: blr47 %xt = lshr i32 %x, %z48 %yt = lshr i32 %y, %z49 store i32 %yt, ptr %p250 %r = or i32 %xt, %yt51 ret i32 %r52}53 54; This is not profitable to hoist. We need an extra shift instruction.55 56define i32 @lshr_multiuse3(i32 %x, i32 %y, i32 %z, ptr %p1, ptr %p2) {57; CHECK-LABEL: lshr_multiuse3:58; CHECK: # %bb.0:59; CHECK-NEXT: srw 3, 3, 560; CHECK-NEXT: srw 4, 4, 561; CHECK-NEXT: stw 3, 0(6)62; CHECK-NEXT: or 3, 3, 463; CHECK-NEXT: stw 4, 0(7)64; CHECK-NEXT: blr65 %xt = lshr i32 %x, %z66 %yt = lshr i32 %y, %z67 store i32 %xt, ptr %p168 store i32 %yt, ptr %p269 %r = or i32 %xt, %yt70 ret i32 %r71}72 73