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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mcpu=pwr7 -verify-machineinstrs \3; RUN: -mtriple=powerpc-unknown-aix < %s | FileCheck %s --check-prefix=IAS324 5; RUN: llc -mcpu=pwr7 -verify-machineinstrs \6; RUN: -mtriple=powerpc64-unknown-aix < %s | FileCheck %s --check-prefix=IAS647 8; RUN: llc -mcpu=pwr7 -verify-machineinstrs -no-integrated-as \9; RUN: -mtriple=powerpc64-unknown-aix < %s | FileCheck %s --check-prefix=NOIAS10 11define dso_local i32 @dollarpc() #0 {12; IAS32-LABEL: dollarpc:13; IAS32: # %bb.0: # %entry14; IAS32-NEXT: li 3, 015; IAS32-NEXT: stw 3, -4(1)16; IAS32-NEXT: #APP17; IAS32-NEXT: mfspr 5, 26918; IAS32-NEXT: mfspr 3, 26819; IAS32-NEXT: mfspr 4, 26920; IAS32-NEXT: cmpw 5, 421; IAS32-NEXT: L..tmp0:22; IAS32-NEXT: bne 0, L..tmp0-1623; IAS32-EMPTY:24; IAS32-NEXT: #NO_APP25; IAS32-NEXT: stw 3, -12(1)26; IAS32-NEXT: stw 4, -8(1)27; IAS32-NEXT: stw 5, -16(1)28; IAS32-NEXT: blr29;30; IAS64-LABEL: dollarpc:31; IAS64: # %bb.0: # %entry32; IAS64-NEXT: li 3, 033; IAS64-NEXT: stw 3, -4(1)34; IAS64-NEXT: #APP35; IAS64-NEXT: mfspr 4, 26936; IAS64-NEXT: mfspr 3, 26837; IAS64-NEXT: mfspr 5, 26938; IAS64-NEXT: cmpw 4, 539; IAS64-NEXT: L..tmp0:40; IAS64-NEXT: bne 0, L..tmp0-1641; IAS64-EMPTY:42; IAS64-NEXT: #NO_APP43; IAS64-NEXT: stw 3, -12(1)44; IAS64-NEXT: rldimi 3, 5, 32, 045; IAS64-NEXT: stw 5, -8(1)46; IAS64-NEXT: stw 4, -16(1)47; IAS64-NEXT: blr48;49; NOIAS-LABEL: dollarpc:50; NOIAS: # %bb.0: # %entry51; NOIAS-NEXT: li 3, 052; NOIAS-NEXT: stw 3, -4(1)53; NOIAS-NEXT: #APP54; NOIAS-NEXT: mftbu 455; NOIAS-NEXT: mftb 356; NOIAS-NEXT: mftbu 557; NOIAS-NEXT: cmpw 4,558; NOIAS-NEXT: bne $-0x1059; NOIAS-EMPTY:60; NOIAS-NEXT: #NO_APP61; NOIAS-NEXT: stw 3, -12(1)62; NOIAS-NEXT: rldimi 3, 5, 32, 063; NOIAS-NEXT: stw 5, -8(1)64; NOIAS-NEXT: stw 4, -16(1)65; NOIAS-NEXT: blr66entry:67 %retval = alloca i32, align 468 %tbu = alloca i32, align 469 %tbl = alloca i32, align 470 %temp = alloca i32, align 471 store i32 0, ptr %retval, align 472 %0 = call { i32, i32, i32 } asm sideeffect "mftbu $2\0Amftb $0\0Amftbu $1\0Acmpw $2,$1\0Abne $$-0x10\0A", "=r,=r,=r,~{cc}"()73 %asmresult = extractvalue { i32, i32, i32 } %0, 074 %asmresult1 = extractvalue { i32, i32, i32 } %0, 175 %asmresult2 = extractvalue { i32, i32, i32 } %0, 276 store i32 %asmresult, ptr %tbl, align 477 store i32 %asmresult1, ptr %tbu, align 478 store i32 %asmresult2, ptr %temp, align 479 %1 = load i32, ptr %tbu, align 480 %conv = zext i32 %1 to i6481 %shl = shl i64 %conv, 3282 %2 = load i32, ptr %tbl, align 483 %conv3 = zext i32 %2 to i6484 %or = or i64 %shl, %conv385 %conv4 = trunc i64 %or to i3286 ret i32 %conv487}88 89