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1; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux -mcpu=a2 < %s | FileCheck %s2target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"3target triple = "powerpc64le-unknown-linux"4 5%struct.BG_CoordinateMapping_t = type { [4 x i8] }6 7; Function Attrs: alwaysinline inlinehint nounwind8define zeroext i32 @Kernel_RanksToCoords(i64 %mapsize, ptr %map, ptr %numentries) #0 {9entry:10 %mapsize.addr = alloca i64, align 811 %map.addr = alloca ptr, align 812 %numentries.addr = alloca ptr, align 813 %r0 = alloca i64, align 814 %r3 = alloca i64, align 815 %r4 = alloca i64, align 816 %r5 = alloca i64, align 817 %tmp = alloca i64, align 818 store i64 %mapsize, ptr %mapsize.addr, align 819 store ptr %map, ptr %map.addr, align 820 store ptr %numentries, ptr %numentries.addr, align 821 store i64 1055, ptr %r0, align 822 %0 = load i64, ptr %mapsize.addr, align 823 store i64 %0, ptr %r3, align 824 %1 = load ptr, ptr %map.addr, align 825 %2 = ptrtoint ptr %1 to i6426 store i64 %2, ptr %r4, align 827 %3 = load ptr, ptr %numentries.addr, align 828 %4 = ptrtoint ptr %3 to i6429 store i64 %4, ptr %r5, align 830 %5 = load i64, ptr %r0, align 831 %6 = load i64, ptr %r3, align 832 %7 = load i64, ptr %r4, align 833 %8 = load i64, ptr %r5, align 834 %9 = call { i64, i64, i64, i64 } asm sideeffect "sc", "={r0},={r3},={r4},={r5},{r0},{r3},{r4},{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{cr0},~{memory}"(i64 %5, i64 %6, i64 %7, i64 %8) #1, !srcloc !035 36; CHECK-LABEL: @Kernel_RanksToCoords37 38; These need to be 64-bit loads, not 32-bit loads (not lwz).39; CHECK-NOT: lwz40 41; CHECK: #APP42; CHECK: sc43; CHECK: #NO_APP44 45; CHECK: blr46 47 %asmresult = extractvalue { i64, i64, i64, i64 } %9, 048 %asmresult1 = extractvalue { i64, i64, i64, i64 } %9, 149 %asmresult2 = extractvalue { i64, i64, i64, i64 } %9, 250 %asmresult3 = extractvalue { i64, i64, i64, i64 } %9, 351 store i64 %asmresult, ptr %r0, align 852 store i64 %asmresult1, ptr %r3, align 853 store i64 %asmresult2, ptr %r4, align 854 store i64 %asmresult3, ptr %r5, align 855 %10 = load i64, ptr %r3, align 856 store i64 %10, ptr %tmp57 %11 = load i64, ptr %tmp58 %conv = trunc i64 %11 to i3259 ret i32 %conv60}61 62declare void @mtrace()63 64define signext i32 @main(i32 signext %argc, ptr %argv) {65entry:66 %argc.addr = alloca i32, align 467 store i32 %argc, ptr %argc.addr, align 468 %0 = call { i64, i64 } asm sideeffect "sc", "={r0},={r3},{r0},~{r4},~{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{cr0},~{memory}"(i64 1076)69 %asmresult1.i = extractvalue { i64, i64 } %0, 170 %conv.i = trunc i64 %asmresult1.i to i3271 %cmp = icmp eq i32 %conv.i, 072 br i1 %cmp, label %if.then, label %if.end73 74; CHECK-LABEL: @main75 76; CHECK: mr [[REG:[0-9]+]], 377; CHECK: std 0,78; CHECK: stw [[REG]],79 80; CHECK: #APP81; CHECK: sc82; CHECK: #NO_APP83 84; CHECK: cmpwi [[REG]], 185 86; CHECK: blr87 88if.then: ; preds = %entry89 call void @mtrace()90 %.pre = load i32, ptr %argc.addr, align 491 br label %if.end92 93if.end: ; preds = %if.then, %entry94 %1 = phi i32 [ %.pre, %if.then ], [ %argc, %entry ]95 %cmp1 = icmp slt i32 %1, 296 br i1 %cmp1, label %usage, label %if.end4097 98usage: 99 ret i32 8100 101if.end40:102 ret i32 0103}104 105attributes #0 = { alwaysinline inlinehint nounwind }106attributes #1 = { nounwind }107 108!0 = !{i32 -2146895770}109