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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr9 -verify-machineinstrs -o - %s | FileCheck %s3 4 5define i1 @isnan_float(float %x) nounwind {6; CHECK-LABEL: isnan_float:7; CHECK: # %bb.0:8; CHECK-NEXT: xststdcsp 0, 1, 649; CHECK-NEXT: li 3, 010; CHECK-NEXT: li 4, 111; CHECK-NEXT: iseleq 3, 4, 312; CHECK-NEXT: blr13 %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 3) ; nan14 ret i1 %115}16 17define i1 @isnan_double(double %x) nounwind {18; CHECK-LABEL: isnan_double:19; CHECK: # %bb.0:20; CHECK-NEXT: xststdcdp 0, 1, 6421; CHECK-NEXT: li 3, 022; CHECK-NEXT: li 4, 123; CHECK-NEXT: iseleq 3, 4, 324; CHECK-NEXT: blr25 %1 = call i1 @llvm.is.fpclass.f64(double %x, i32 3) ; nan26 ret i1 %127}28 29define i1 @isnan_ppc_fp128(ppc_fp128 %x) nounwind {30; CHECK-LABEL: isnan_ppc_fp128:31; CHECK: # %bb.0:32; CHECK-NEXT: xststdcdp 0, 1, 6433; CHECK-NEXT: li 3, 034; CHECK-NEXT: li 4, 135; CHECK-NEXT: iseleq 3, 4, 336; CHECK-NEXT: blr37 %1 = call i1 @llvm.is.fpclass.ppcf128(ppc_fp128 %x, i32 3) ; nan38 ret i1 %139}40 41define i1 @isnan_f128(fp128 %x) nounwind {42; CHECK-LABEL: isnan_f128:43; CHECK: # %bb.0:44; CHECK-NEXT: xststdcqp 0, 2, 6445; CHECK-NEXT: li 3, 046; CHECK-NEXT: li 4, 147; CHECK-NEXT: iseleq 3, 4, 348; CHECK-NEXT: blr49 %1 = call i1 @llvm.is.fpclass.f128(fp128 %x, i32 3) ; nan50 ret i1 %151}52 53define i1 @isnan_float_strictfp(float %x) strictfp nounwind {54; CHECK-LABEL: isnan_float_strictfp:55; CHECK: # %bb.0:56; CHECK-NEXT: xststdcsp 0, 1, 6457; CHECK-NEXT: li 3, 058; CHECK-NEXT: li 4, 159; CHECK-NEXT: iseleq 3, 4, 360; CHECK-NEXT: blr61 %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 3) strictfp ; nan62 ret i1 %163}64 65define i1 @isnan_double_strictfp(double %x) strictfp nounwind {66; CHECK-LABEL: isnan_double_strictfp:67; CHECK: # %bb.0:68; CHECK-NEXT: xststdcdp 0, 1, 6469; CHECK-NEXT: li 3, 070; CHECK-NEXT: li 4, 171; CHECK-NEXT: iseleq 3, 4, 372; CHECK-NEXT: blr73 %1 = call i1 @llvm.is.fpclass.f64(double %x, i32 3) strictfp ; nan74 ret i1 %175}76 77define i1 @isnan_ppc_fp128_strictfp(ppc_fp128 %x) strictfp nounwind {78; CHECK-LABEL: isnan_ppc_fp128_strictfp:79; CHECK: # %bb.0:80; CHECK-NEXT: xststdcdp 0, 1, 6481; CHECK-NEXT: li 3, 082; CHECK-NEXT: li 4, 183; CHECK-NEXT: iseleq 3, 4, 384; CHECK-NEXT: blr85 %1 = call i1 @llvm.is.fpclass.ppcf128(ppc_fp128 %x, i32 3) strictfp ; nan86 ret i1 %187}88 89define i1 @isnan_f128_strictfp(fp128 %x) strictfp nounwind {90; CHECK-LABEL: isnan_f128_strictfp:91; CHECK: # %bb.0:92; CHECK-NEXT: xststdcqp 0, 2, 6493; CHECK-NEXT: li 3, 094; CHECK-NEXT: li 4, 195; CHECK-NEXT: iseleq 3, 4, 396; CHECK-NEXT: blr97 %1 = call i1 @llvm.is.fpclass.f128(fp128 %x, i32 3) strictfp ; nan98 ret i1 %199}100 101define i1 @isinf_float(float %x) nounwind {102; CHECK-LABEL: isinf_float:103; CHECK: # %bb.0:104; CHECK-NEXT: xststdcsp 0, 1, 48105; CHECK-NEXT: li 3, 0106; CHECK-NEXT: li 4, 1107; CHECK-NEXT: iseleq 3, 4, 3108; CHECK-NEXT: blr109 %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 516) ; 0x204 = "inf"110 ret i1 %1111}112 113define i1 @isinf_ppc_fp128(ppc_fp128 %x) nounwind {114; CHECK-LABEL: isinf_ppc_fp128:115; CHECK: # %bb.0:116; CHECK-NEXT: xststdcdp 0, 1, 48117; CHECK-NEXT: li 3, 0118; CHECK-NEXT: li 4, 1119; CHECK-NEXT: iseleq 3, 4, 3120; CHECK-NEXT: blr121 %1 = call i1 @llvm.is.fpclass.ppcf128(ppc_fp128 %x, i32 516) ; 0x204 = "inf"122 ret i1 %1123}124 125define i1 @isinf_f128(fp128 %x) nounwind {126; CHECK-LABEL: isinf_f128:127; CHECK: # %bb.0:128; CHECK-NEXT: xststdcqp 0, 2, 48129; CHECK-NEXT: li 3, 0130; CHECK-NEXT: li 4, 1131; CHECK-NEXT: iseleq 3, 4, 3132; CHECK-NEXT: blr133 %1 = call i1 @llvm.is.fpclass.f128(fp128 %x, i32 516) ; 0x204 = "inf"134 ret i1 %1135}136 137define i1 @isfinite_float(float %x) nounwind {138; CHECK-LABEL: isfinite_float:139; CHECK: # %bb.0:140; CHECK-NEXT: xststdcsp 0, 1, 112141; CHECK-NEXT: li 3, 1142; CHECK-NEXT: iseleq 3, 0, 3143; CHECK-NEXT: blr144 %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 504) ; 0x1f8 = "finite"145 ret i1 %1146}147 148define i1 @isfinite_f128(fp128 %x) nounwind {149; CHECK-LABEL: isfinite_f128:150; CHECK: # %bb.0:151; CHECK-NEXT: xststdcqp 0, 2, 112152; CHECK-NEXT: li 3, 1153; CHECK-NEXT: iseleq 3, 0, 3154; CHECK-NEXT: blr155 %1 = call i1 @llvm.is.fpclass.f128(fp128 %x, i32 504) ; 0x1f8 = "finite"156 ret i1 %1157}158 159define i1 @isnormal_float(float %x) nounwind {160; CHECK-LABEL: isnormal_float:161; CHECK: # %bb.0:162; CHECK-NEXT: xststdcsp 0, 1, 127163; CHECK-NEXT: li 3, 1164; CHECK-NEXT: iseleq 3, 0, 3165; CHECK-NEXT: blr166 %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 264) ; 0x108 = "normal"167 ret i1 %1168}169 170define i1 @isnormal_f128(fp128 %x) nounwind {171; CHECK-LABEL: isnormal_f128:172; CHECK: # %bb.0:173; CHECK-NEXT: xststdcqp 0, 2, 127174; CHECK-NEXT: li 3, 1175; CHECK-NEXT: iseleq 3, 0, 3176; CHECK-NEXT: blr177 %1 = call i1 @llvm.is.fpclass.f128(fp128 %x, i32 264) ; 0x108 = "normal"178 ret i1 %1179}180 181define i1 @issubnormal_float(float %x) nounwind {182; CHECK-LABEL: issubnormal_float:183; CHECK: # %bb.0:184; CHECK-NEXT: xststdcsp 0, 1, 3185; CHECK-NEXT: li 3, 0186; CHECK-NEXT: li 4, 1187; CHECK-NEXT: iseleq 3, 4, 3188; CHECK-NEXT: blr189 %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 144) ; 0x90 = "subnormal"190 ret i1 %1191}192 193define i1 @issubnormal_f128(fp128 %x) nounwind {194; CHECK-LABEL: issubnormal_f128:195; CHECK: # %bb.0:196; CHECK-NEXT: xststdcqp 0, 2, 3197; CHECK-NEXT: li 3, 0198; CHECK-NEXT: li 4, 1199; CHECK-NEXT: iseleq 3, 4, 3200; CHECK-NEXT: blr201 %1 = call i1 @llvm.is.fpclass.f128(fp128 %x, i32 144) ; 0x90 = "subnormal"202 ret i1 %1203}204 205define i1 @iszero_float(float %x) nounwind {206; CHECK-LABEL: iszero_float:207; CHECK: # %bb.0:208; CHECK-NEXT: xststdcsp 0, 1, 12209; CHECK-NEXT: li 3, 0210; CHECK-NEXT: li 4, 1211; CHECK-NEXT: iseleq 3, 4, 3212; CHECK-NEXT: blr213 %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 96) ; 0x60 = "zero"214 ret i1 %1215}216 217define i1 @iszero_f128(fp128 %x) nounwind {218; CHECK-LABEL: iszero_f128:219; CHECK: # %bb.0:220; CHECK-NEXT: xststdcqp 0, 2, 12221; CHECK-NEXT: li 3, 0222; CHECK-NEXT: li 4, 1223; CHECK-NEXT: iseleq 3, 4, 3224; CHECK-NEXT: blr225 %1 = call i1 @llvm.is.fpclass.f128(fp128 %x, i32 96) ; 0x60 = "zero"226 ret i1 %1227}228 229define i1 @issnan_float(float %x) nounwind {230; CHECK-LABEL: issnan_float:231; CHECK: # %bb.0:232; CHECK-NEXT: xscvdpspn 0, 1233; CHECK-NEXT: xststdcsp 1, 1, 64234; CHECK-NEXT: mffprwz 3, 0235; CHECK-NEXT: andis. 3, 3, 64236; CHECK-NEXT: li 3, 1237; CHECK-NEXT: crnand 20, 6, 2238; CHECK-NEXT: isel 3, 0, 3, 20239; CHECK-NEXT: blr240 %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 1)241 ret i1 %1242}243 244define i1 @issnan_double(double %x) nounwind {245; CHECK-LABEL: issnan_double:246; CHECK: # %bb.0:247; CHECK-NEXT: mffprd 3, 1248; CHECK-NEXT: xststdcdp 1, 1, 64249; CHECK-NEXT: rldicl 3, 3, 32, 32250; CHECK-NEXT: andis. 3, 3, 8251; CHECK-NEXT: li 3, 1252; CHECK-NEXT: crnand 20, 6, 2253; CHECK-NEXT: isel 3, 0, 3, 20254; CHECK-NEXT: blr255 %1 = call i1 @llvm.is.fpclass.f64(double %x, i32 1)256 ret i1 %1257}258 259define i1 @issnan_fp128(fp128 %x) nounwind {260; CHECK-LABEL: issnan_fp128:261; CHECK: # %bb.0:262; CHECK-NEXT: li 3, 12263; CHECK-NEXT: xststdcqp 1, 2, 64264; CHECK-NEXT: vextuwrx 3, 3, 2265; CHECK-NEXT: andi. 3, 3, 32768266; CHECK-NEXT: li 3, 1267; CHECK-NEXT: crnand 20, 6, 2268; CHECK-NEXT: isel 3, 0, 3, 20269; CHECK-NEXT: blr270 %1 = call i1 @llvm.is.fpclass.f128(fp128 %x, i32 1)271 ret i1 %1272}273 274define i1 @issnan_ppc_fp128(ppc_fp128 %x) nounwind {275; CHECK-LABEL: issnan_ppc_fp128:276; CHECK: # %bb.0:277; CHECK-NEXT: mffprd 3, 1278; CHECK-NEXT: xststdcdp 1, 1, 64279; CHECK-NEXT: rldicl 3, 3, 32, 32280; CHECK-NEXT: andis. 3, 3, 8281; CHECK-NEXT: li 3, 1282; CHECK-NEXT: crnand 20, 6, 2283; CHECK-NEXT: isel 3, 0, 3, 20284; CHECK-NEXT: blr285 %1 = call i1 @llvm.is.fpclass.ppcf128(ppc_fp128 %x, i32 1)286 ret i1 %1287}288 289define i1 @isqnan_float(float %x) nounwind {290; CHECK-LABEL: isqnan_float:291; CHECK: # %bb.0:292; CHECK-NEXT: xscvdpspn 0, 1293; CHECK-NEXT: xststdcsp 1, 1, 64294; CHECK-NEXT: mffprwz 3, 0295; CHECK-NEXT: srwi 3, 3, 22296; CHECK-NEXT: andi. 3, 3, 1297; CHECK-NEXT: li 3, 1298; CHECK-NEXT: crnand 20, 6, 1299; CHECK-NEXT: isel 3, 0, 3, 20300; CHECK-NEXT: blr301 %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 2)302 ret i1 %1303}304 305define i1 @isqnan_double(double %x) nounwind {306; CHECK-LABEL: isqnan_double:307; CHECK: # %bb.0:308; CHECK-NEXT: mffprd 3, 1309; CHECK-NEXT: xststdcdp 1, 1, 64310; CHECK-NEXT: rldicl 3, 3, 13, 51311; CHECK-NEXT: andi. 3, 3, 1312; CHECK-NEXT: li 3, 1313; CHECK-NEXT: crnand 20, 6, 1314; CHECK-NEXT: isel 3, 0, 3, 20315; CHECK-NEXT: blr316 %1 = call i1 @llvm.is.fpclass.f64(double %x, i32 2)317 ret i1 %1318}319 320define i1 @isqnan_fp128(fp128 %x) nounwind {321; CHECK-LABEL: isqnan_fp128:322; CHECK: # %bb.0:323; CHECK-NEXT: li 3, 12324; CHECK-NEXT: xststdcqp 1, 2, 64325; CHECK-NEXT: vextuwrx 3, 3, 2326; CHECK-NEXT: srwi 3, 3, 15327; CHECK-NEXT: andi. 3, 3, 1328; CHECK-NEXT: li 3, 1329; CHECK-NEXT: crnand 20, 6, 1330; CHECK-NEXT: isel 3, 0, 3, 20331; CHECK-NEXT: blr332 %1 = call i1 @llvm.is.fpclass.f128(fp128 %x, i32 2)333 ret i1 %1334}335 336define i1 @isqnan_ppc_fp128(ppc_fp128 %x) nounwind {337; CHECK-LABEL: isqnan_ppc_fp128:338; CHECK: # %bb.0:339; CHECK-NEXT: mffprd 3, 1340; CHECK-NEXT: xststdcdp 1, 1, 64341; CHECK-NEXT: rldicl 3, 3, 13, 51342; CHECK-NEXT: andi. 3, 3, 1343; CHECK-NEXT: li 3, 1344; CHECK-NEXT: crnand 20, 6, 1345; CHECK-NEXT: isel 3, 0, 3, 20346; CHECK-NEXT: blr347 %1 = call i1 @llvm.is.fpclass.ppcf128(ppc_fp128 %x, i32 2)348 ret i1 %1349}350 351define i1 @isposzero_double(double %x) nounwind {352; CHECK-LABEL: isposzero_double:353; CHECK: # %bb.0:354; CHECK-NEXT: xststdcdp 0, 1, 8355; CHECK-NEXT: li 3, 0356; CHECK-NEXT: li 4, 1357; CHECK-NEXT: iseleq 3, 4, 3358; CHECK-NEXT: blr359 %1 = call i1 @llvm.is.fpclass.f64(double %x, i32 64)360 ret i1 %1361}362 363define i1 @isnegzero_double(double %x) nounwind {364; CHECK-LABEL: isnegzero_double:365; CHECK: # %bb.0:366; CHECK-NEXT: xststdcdp 0, 1, 4367; CHECK-NEXT: li 3, 0368; CHECK-NEXT: li 4, 1369; CHECK-NEXT: iseleq 3, 4, 3370; CHECK-NEXT: blr371 %1 = call i1 @llvm.is.fpclass.f64(double %x, i32 32)372 ret i1 %1373}374 375define i1 @isposnormal_double(double %x) nounwind {376; CHECK-LABEL: isposnormal_double:377; CHECK: # %bb.0:378; CHECK-NEXT: xststdcdp 0, 1, 127379; CHECK-NEXT: li 3, 1380; CHECK-NEXT: cror 20, 0, 2381; CHECK-NEXT: isel 3, 0, 3, 20382; CHECK-NEXT: blr383 %1 = call i1 @llvm.is.fpclass.f64(double %x, i32 256)384 ret i1 %1385}386 387define i1 @isnegnormal_double(double %x) nounwind {388; CHECK-LABEL: isnegnormal_double:389; CHECK: # %bb.0:390; CHECK-NEXT: xststdcdp 0, 1, 127391; CHECK-NEXT: li 3, 1392; CHECK-NEXT: crorc 20, 2, 0393; CHECK-NEXT: isel 3, 0, 3, 20394; CHECK-NEXT: blr395 %1 = call i1 @llvm.is.fpclass.f64(double %x, i32 8)396 ret i1 %1397}398 399define i1 @isnormal_double(double %x) nounwind {400; CHECK-LABEL: isnormal_double:401; CHECK: # %bb.0:402; CHECK-NEXT: xststdcdp 0, 1, 127403; CHECK-NEXT: li 3, 1404; CHECK-NEXT: iseleq 3, 0, 3405; CHECK-NEXT: blr406 %1 = call i1 @llvm.is.fpclass.f64(double %x, i32 264)407 ret i1 %1408}409 410define i1 @isclass_00d_double(double %x) nounwind {411; CHECK-LABEL: isclass_00d_double:412; CHECK: # %bb.0:413; CHECK-NEXT: mffprd 3, 1414; CHECK-NEXT: xststdcdp 0, 1, 127415; CHECK-NEXT: xststdcdp 1, 1, 64416; CHECK-NEXT: rldicl 3, 3, 32, 32417; CHECK-NEXT: crandc 20, 0, 2418; CHECK-NEXT: andis. 3, 3, 8419; CHECK-NEXT: li 3, 1420; CHECK-NEXT: crand 21, 6, 2421; CHECK-NEXT: xststdcdp 0, 1, 16422; CHECK-NEXT: cror 21, 2, 21423; CHECK-NEXT: crnor 20, 21, 20424; CHECK-NEXT: isel 3, 0, 3, 20425; CHECK-NEXT: blr426 %1 = call i1 @llvm.is.fpclass.f64(double %x, i32 13)427 ret i1 %1428}429 430define i1 @isclass_1c0_float(float %x) nounwind {431; CHECK-LABEL: isclass_1c0_float:432; CHECK: # %bb.0:433; CHECK-NEXT: xststdcsp 0, 1, 127434; CHECK-NEXT: li 3, 1435; CHECK-NEXT: crnor 20, 0, 2436; CHECK-NEXT: xststdcsp 0, 1, 10437; CHECK-NEXT: crnor 20, 2, 20438; CHECK-NEXT: isel 3, 0, 3, 20439; CHECK-NEXT: blr440 %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 448)441 ret i1 %1442}443 444declare i1 @llvm.is.fpclass.f32(float, i32)445declare i1 @llvm.is.fpclass.f64(double, i32)446declare i1 @llvm.is.fpclass.ppcf128(ppc_fp128, i32)447declare i1 @llvm.is.fpclass.f128(fp128, i32)448