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1; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \2; RUN: -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | FileCheck %s3; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 \4; RUN: -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | FileCheck %s5; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -ppc-late-peephole=false \6; RUN: -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | FileCheck %s \7; RUN: --implicit-check-not creqv --implicit-check-not crxor8 9 10; For known CRBit spills, CRSET/CRUNSET, it is more efficient to just load and11; spill the known value. These tests verify that for CRSET and CRUNSET spills12; we do not extract the bit for spilling.13 14%struct.anon = type { i32 }15 16@b = common dso_local global ptr null, align 817@a = common dso_local global i64 0, align 818 19; Function Attrs: nounwind20define dso_local signext i32 @spillCRSET(i32 signext %p1, i32 signext %p2) {21; CHECK-LABEL: spillCRSET:22; CHECK: # %bb.2:23; CHECK-DAG: crnot [[CREG:.*]]*cr5+lt, eq24; CHECK-DAG: mfocrf [[REG2:.*]], [[CREG]]25; CHECK-DAG: rlwinm [[REG2]], [[REG2]]26; CHECK: .LBB0_3:27; CHECK-NOT: #UNENCODED_NOP28; CHECK: lis [[REG1:.*]], -3276829; CHECK: .LBB0_4:30; CHECK-NOT: mfocrf [[REG2:.*]], [[CREG]]31; CHECK-NOT: rlwinm [[REG2]], [[REG2]]32; CHECK: stw [[REG1]]33; CHECK: # %bb.5:34 35entry:36 %tobool = icmp eq i32 %p2, 037 %tobool2 = icmp eq i32 %p1, 038 br label %redo_first_pass39 40redo_first_pass: ; preds = %for.end, %entry41 br i1 %tobool, label %if.end, label %if.then42 43if.then: ; preds = %redo_first_pass44 %call = tail call signext i32 @fn2() #245 %tobool1 = icmp ne i32 %call, 046 br label %if.end47 48if.end: ; preds = %redo_first_pass, %if.then49 %c.1.off0 = phi i1 [ %tobool1, %if.then ], [ true, %redo_first_pass ]50 br i1 %tobool2, label %if.end4, label %if.then351 52if.then3: ; preds = %if.end53 %0 = load ptr, ptr @b, align 854 store i32 1, ptr %0, align 455 br label %if.end456 57if.end4: ; preds = %if.end, %if.then358 tail call void asm sideeffect "#DO_NOTHING", "~{cr0},~{cr1},~{cr2},~{cr3},~{cr4},~{cr5},~{cr6},~{cr7}"()59 br i1 %c.1.off0, label %if.then6, label %if.end1360 61if.then6: ; preds = %if.end462 %1 = load i64, ptr @a, align 863 %cmp21 = icmp eq i64 %1, 064 br i1 %cmp21, label %if.end13, label %for.body65 66for.body: ; preds = %if.then6, %for.body67 %s.122 = phi i64 [ %inc, %for.body ], [ 0, %if.then6 ]68 %call7 = tail call signext i32 @fn3()69 %inc = add nuw i64 %s.122, 170 %exitcond = icmp eq i64 %inc, %171 br i1 %exitcond, label %for.end, label %for.body72 73for.end: ; preds = %for.body74 br i1 %cmp21, label %if.end13, label %redo_first_pass75 76if.end13: ; preds = %if.then6, %for.end, %if.end477 ret i32 078}79 80%struct.p5rx = type { i32 }81 82; Function Attrs: nounwind83define dso_local signext i32 @spillCRUNSET(ptr readonly %p1, i32 signext %p2, i32 signext %p3) {84; CHECK-LABEL: spillCRUNSET:85; CHECK: # %bb.0: # %entry86; CHECK-DAG: li [[REG1:.*]], 087; CHECK-NOT: #UNENCODED_NOP88; CHECK-NOT: mfocrf [[REG2:.*]], [[CREG]]89; CHECK-NOT: rlwinm [[REG2]], [[REG2]]90; CHECK: stw [[REG1]]91; CHECK: .LBB1_1:92entry:93 %and = and i32 %p3, 12894 %tobool = icmp eq i32 %and, 095 %tobool2 = icmp eq ptr %p1, null96 %tobool12 = icmp eq i32 %p2, 097 br label %redo_first_pass98 99redo_first_pass: ; preds = %if.end11, %entry100 %a.0.off0 = phi i1 [ false, %entry ], [ %a.1.off0, %if.end11 ]101 br i1 %tobool, label %if.end, label %if.then102 103if.then: ; preds = %redo_first_pass104 %call = tail call signext i32 @fn2()105 %tobool1 = icmp ne i32 %call, 0106 br label %if.end107 108if.end: ; preds = %redo_first_pass, %if.then109 %a.1.off0 = phi i1 [ %tobool1, %if.then ], [ %a.0.off0, %redo_first_pass ]110 tail call void asm sideeffect "#DO_NOTHING", "~{cr0},~{cr1},~{cr2},~{cr3},~{cr4},~{cr5},~{cr6},~{cr7}"()111 br i1 %tobool2, label %if.end11, label %land.lhs.true112 113land.lhs.true: ; preds = %if.end114 %call3 = tail call signext i32 @fn3()115 %tobool4 = icmp eq i32 %call3, 0116 br i1 %tobool4, label %if.end11, label %land.lhs.true5117 118land.lhs.true5: ; preds = %land.lhs.true119 %0 = load i32, ptr %p1, align 4120 %tobool6 = icmp eq i32 %0, 0121 %a.1.off0.not = xor i1 %a.1.off0, true122 %brmerge = or i1 %tobool6, %a.1.off0.not123 br i1 %brmerge, label %if.end11, label %if.then9124 125if.then9: ; preds = %land.lhs.true5126 %call10 = tail call signext i32 @fn4()127 br label %if.end11128 129if.end11: ; preds = %land.lhs.true5, %land.lhs.true, %if.end, %if.then9130 br i1 %tobool12, label %if.end14, label %redo_first_pass131 132if.end14: ; preds = %if.end11133 ret i32 0134}135 136declare signext i32 @fn2(...)137declare signext i32 @fn3(...)138declare signext i32 @fn4(...)139