brintos

brintos / llvm-project-archived public Read only

0
0
Text · 6.2 KiB · 8d7253b Raw
188 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 22; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-unknown \3; RUN:   -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s | FileCheck %s4 5define float @ldexp_f32(i8 zeroext %x) nounwind {6; CHECK-LABEL: ldexp_f32:7; CHECK:       # %bb.0:8; CHECK-NEXT:    mflr r09; CHECK-NEXT:    stdu r1, -32(r1)10; CHECK-NEXT:    vspltisw v2, 111; CHECK-NEXT:    mr r4, r312; CHECK-NEXT:    std r0, 48(r1)13; CHECK-NEXT:    xvcvsxwdp vs1, v214; CHECK-NEXT:    bl ldexpf15; CHECK-NEXT:    nop16; CHECK-NEXT:    addi r1, r1, 3217; CHECK-NEXT:    ld r0, 16(r1)18; CHECK-NEXT:    mtlr r019; CHECK-NEXT:    blr20  %zext = zext i8 %x to i3221  %ldexp = call float @llvm.ldexp.f32.i32(float 1.000000e+00, i32 %zext)22  ret float %ldexp23}24 25define double @ldexp_f64(i8 zeroext %x) nounwind {26; CHECK-LABEL: ldexp_f64:27; CHECK:       # %bb.0:28; CHECK-NEXT:    mflr r029; CHECK-NEXT:    stdu r1, -32(r1)30; CHECK-NEXT:    vspltisw v2, 131; CHECK-NEXT:    mr r4, r332; CHECK-NEXT:    std r0, 48(r1)33; CHECK-NEXT:    xvcvsxwdp vs1, v234; CHECK-NEXT:    bl ldexp35; CHECK-NEXT:    nop36; CHECK-NEXT:    addi r1, r1, 3237; CHECK-NEXT:    ld r0, 16(r1)38; CHECK-NEXT:    mtlr r039; CHECK-NEXT:    blr40  %zext = zext i8 %x to i3241  %ldexp = call double @llvm.ldexp.f64.i32(double 1.000000e+00, i32 %zext)42  ret double %ldexp43}44 45define <2 x float> @ldexp_v2f32(<2 x float> %val, <2 x i32> %exp) nounwind {46; CHECK-LABEL: ldexp_v2f32:47; CHECK:       # %bb.0:48; CHECK-NEXT:    mflr r049; CHECK-NEXT:    stdu r1, -80(r1)50; CHECK-NEXT:    li r3, 051; CHECK-NEXT:    xxsldwi vs0, v2, v2, 352; CHECK-NEXT:    std r0, 96(r1)53; CHECK-NEXT:    xscvspdpn f1, vs054; CHECK-NEXT:    vextuwrx r3, r3, v355; CHECK-NEXT:    stxv v29, 32(r1) # 16-byte Folded Spill56; CHECK-NEXT:    stxv v30, 48(r1) # 16-byte Folded Spill57; CHECK-NEXT:    stxv v31, 64(r1) # 16-byte Folded Spill58; CHECK-NEXT:    vmr v31, v359; CHECK-NEXT:    vmr v30, v260; CHECK-NEXT:    extsw r4, r361; CHECK-NEXT:    bl ldexpf62; CHECK-NEXT:    nop63; CHECK-NEXT:    li r3, 464; CHECK-NEXT:    xxswapd vs0, v3065; CHECK-NEXT:    xscvdpspn v29, f166; CHECK-NEXT:    xscvspdpn f1, vs067; CHECK-NEXT:    vextuwrx r3, r3, v3168; CHECK-NEXT:    extsw r4, r369; CHECK-NEXT:    bl ldexpf70; CHECK-NEXT:    nop71; CHECK-NEXT:    xscvdpspn vs0, f172; CHECK-NEXT:    lxv v31, 64(r1) # 16-byte Folded Reload73; CHECK-NEXT:    lxv v30, 48(r1) # 16-byte Folded Reload74; CHECK-NEXT:    xxmrghw v2, vs0, v2975; CHECK-NEXT:    lxv v29, 32(r1) # 16-byte Folded Reload76; CHECK-NEXT:    addi r1, r1, 8077; CHECK-NEXT:    ld r0, 16(r1)78; CHECK-NEXT:    mtlr r079; CHECK-NEXT:    blr80  %1 = call <2 x float> @llvm.ldexp.v2f32.v2i32(<2 x float> %val, <2 x i32> %exp)81  ret <2 x float> %182}83 84define <4 x float> @ldexp_v4f32(<4 x float> %val, <4 x i32> %exp) nounwind {85; CHECK-LABEL: ldexp_v4f32:86; CHECK:       # %bb.0:87; CHECK-NEXT:    mflr r088; CHECK-NEXT:    stdu r1, -96(r1)89; CHECK-NEXT:    li r3, 490; CHECK-NEXT:    xxswapd vs0, v291; CHECK-NEXT:    std r0, 112(r1)92; CHECK-NEXT:    xscvspdpn f1, vs093; CHECK-NEXT:    vextuwrx r3, r3, v394; CHECK-NEXT:    stxv v28, 32(r1) # 16-byte Folded Spill95; CHECK-NEXT:    stxv v29, 48(r1) # 16-byte Folded Spill96; CHECK-NEXT:    stxv v30, 64(r1) # 16-byte Folded Spill97; CHECK-NEXT:    stxv v31, 80(r1) # 16-byte Folded Spill98; CHECK-NEXT:    vmr v31, v399; CHECK-NEXT:    extsw r4, r3100; CHECK-NEXT:    vmr v30, v2101; CHECK-NEXT:    bl ldexpf102; CHECK-NEXT:    nop103; CHECK-NEXT:    li r3, 12104; CHECK-NEXT:    xscpsgndp v29, f1, f1105; CHECK-NEXT:    xscvspdpn f1, v30106; CHECK-NEXT:    vextuwrx r3, r3, v31107; CHECK-NEXT:    extsw r4, r3108; CHECK-NEXT:    bl ldexpf109; CHECK-NEXT:    nop110; CHECK-NEXT:    xxmrghd vs0, vs1, v29111; CHECK-NEXT:    li r3, 0112; CHECK-NEXT:    vextuwrx r3, r3, v31113; CHECK-NEXT:    xvcvdpsp v28, vs0114; CHECK-NEXT:    xxsldwi vs0, v30, v30, 3115; CHECK-NEXT:    extsw r4, r3116; CHECK-NEXT:    xscvspdpn f1, vs0117; CHECK-NEXT:    bl ldexpf118; CHECK-NEXT:    nop119; CHECK-NEXT:    xxsldwi vs0, v30, v30, 1120; CHECK-NEXT:    mfvsrwz r3, v31121; CHECK-NEXT:    xscpsgndp v29, f1, f1122; CHECK-NEXT:    extsw r4, r3123; CHECK-NEXT:    xscvspdpn f1, vs0124; CHECK-NEXT:    bl ldexpf125; CHECK-NEXT:    nop126; CHECK-NEXT:    xxmrghd vs0, vs1, v29127; CHECK-NEXT:    lxv v31, 80(r1) # 16-byte Folded Reload128; CHECK-NEXT:    lxv v30, 64(r1) # 16-byte Folded Reload129; CHECK-NEXT:    lxv v29, 48(r1) # 16-byte Folded Reload130; CHECK-NEXT:    xvcvdpsp v2, vs0131; CHECK-NEXT:    vmrgew v2, v28, v2132; CHECK-NEXT:    lxv v28, 32(r1) # 16-byte Folded Reload133; CHECK-NEXT:    addi r1, r1, 96134; CHECK-NEXT:    ld r0, 16(r1)135; CHECK-NEXT:    mtlr r0136; CHECK-NEXT:    blr137  %1 = call <4 x float> @llvm.ldexp.v4f32.v4i32(<4 x float> %val, <4 x i32> %exp)138  ret <4 x float> %1139}140 141define half @ldexp_f16(half %arg0, i32 %arg1) nounwind {142; CHECK-LABEL: ldexp_f16:143; CHECK:       # %bb.0:144; CHECK-NEXT:    mflr r0145; CHECK-NEXT:    stdu r1, -32(r1)146; CHECK-NEXT:    std r0, 48(r1)147; CHECK-NEXT:    xscvdphp f0, f1148; CHECK-NEXT:    extsw r4, r4149; CHECK-NEXT:    mffprwz r3, f0150; CHECK-NEXT:    clrlwi r3, r3, 16151; CHECK-NEXT:    mtfprwz f0, r3152; CHECK-NEXT:    xscvhpdp f1, f0153; CHECK-NEXT:    bl ldexpf154; CHECK-NEXT:    nop155; CHECK-NEXT:    addi r1, r1, 32156; CHECK-NEXT:    ld r0, 16(r1)157; CHECK-NEXT:    mtlr r0158; CHECK-NEXT:    blr159  %ldexp = call half @llvm.ldexp.f16.i32(half %arg0, i32 %arg1)160  ret half %ldexp161}162 163define ppc_fp128 @ldexp_fp128(ppc_fp128 %arg0, i32 %arg1) nounwind {164; CHECK-LABEL: ldexp_fp128:165; CHECK:       # %bb.0:166; CHECK-NEXT:    mflr r0167; CHECK-NEXT:    stdu r1, -32(r1)168; CHECK-NEXT:    clrldi r5, r5, 32169; CHECK-NEXT:    std r0, 48(r1)170; CHECK-NEXT:    bl ldexpl171; CHECK-NEXT:    nop172; CHECK-NEXT:    addi r1, r1, 32173; CHECK-NEXT:    ld r0, 16(r1)174; CHECK-NEXT:    mtlr r0175; CHECK-NEXT:    blr176  %ldexp = call ppc_fp128 @llvm.ldexp.ppcf128.i32(ppc_fp128 %arg0, i32 %arg1)177  ret ppc_fp128 %ldexp178}179 180declare double @llvm.ldexp.f64.i32(double, i32) #0181declare float @llvm.ldexp.f32.i32(float, i32) #0182declare <2 x float> @llvm.ldexp.v2f32.v2i32(<2 x float>, <2 x i32>) #0183declare <4 x float> @llvm.ldexp.v4f32.v4i32(<4 x float>, <4 x i32>) #0184declare half @llvm.ldexp.f16.i32(half, i32) #0185declare ppc_fp128 @llvm.ldexp.ppcf128.i32(ppc_fp128, i32) #0186 187attributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }188