brintos

brintos / llvm-project-archived public Read only

0
0
Text · 41.0 KiB · 1993b16 Raw
1371 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \3; RUN:   -mtriple=powerpc64-unknown-unknown < %s | FileCheck %s \4; RUN:   -check-prefix=P95; RUN: llc -mcpu=pwr8 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \6; RUN:   -mtriple=powerpc64le-unknown-unknown < %s | FileCheck %s \7; RUN:   -check-prefix=P88; RUN: llc -mcpu=pwr7 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \9; RUN:   -mtriple=powerpc64-unknown-unknown < %s | FileCheck %s \10; RUN:   -check-prefix=P711; RUN: llc -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \12; RUN:   -mtriple=powerpc-ibm-aix-xcoff < %s | FileCheck %s \13; RUN:   -check-prefix=P9-AIX3214; RUN: llc -mcpu=pwr8 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \15; RUN:   -mtriple=powerpc-ibm-aix-xcoff < %s | FileCheck %s \16; RUN:   -check-prefix=P8-AIX3217; RUN: llc -mcpu=pwr7 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \18; RUN:   -mtriple=powerpc-ibm-aix-xcoff < %s | FileCheck %s \19; RUN:   -check-prefix=P7-AIX3220 21; v2f6422define dso_local void @test(ptr nocapture %c, ptr nocapture readonly %a) local_unnamed_addr {23; P9-LABEL: test:24; P9:       # %bb.0: # %entry25; P9-NEXT:    addi r4, r4, 2426; P9-NEXT:    lxvdsx vs0, 0, r427; P9-NEXT:    stxv vs0, 0(r3)28; P9-NEXT:    blr29;30; P8-LABEL: test:31; P8:       # %bb.0: # %entry32; P8-NEXT:    addi r4, r4, 2433; P8-NEXT:    lxvdsx vs0, 0, r434; P8-NEXT:    stxvd2x vs0, 0, r335; P8-NEXT:    blr36;37; P7-LABEL: test:38; P7:       # %bb.0: # %entry39; P7-NEXT:    addi r4, r4, 2440; P7-NEXT:    lxvdsx vs0, 0, r441; P7-NEXT:    stxvd2x vs0, 0, r342; P7-NEXT:    blr43;44; P9-AIX32-LABEL: test:45; P9-AIX32:       # %bb.0: # %entry46; P9-AIX32-NEXT:    addi r4, r4, 2447; P9-AIX32-NEXT:    lxvdsx vs0, 0, r448; P9-AIX32-NEXT:    stxv vs0, 0(r3)49; P9-AIX32-NEXT:    blr50;51; P8-AIX32-LABEL: test:52; P8-AIX32:       # %bb.0: # %entry53; P8-AIX32-NEXT:    addi r4, r4, 2454; P8-AIX32-NEXT:    lxvdsx vs0, 0, r455; P8-AIX32-NEXT:    stxvd2x vs0, 0, r356; P8-AIX32-NEXT:    blr57;58; P7-AIX32-LABEL: test:59; P7-AIX32:       # %bb.0: # %entry60; P7-AIX32-NEXT:    addi r4, r4, 2461; P7-AIX32-NEXT:    lxvdsx vs0, 0, r462; P7-AIX32-NEXT:    stxvd2x vs0, 0, r363; P7-AIX32-NEXT:    blr64entry:65  %arrayidx = getelementptr inbounds double, ptr %a, i64 366  %0 = load double, ptr %arrayidx, align 867  %splat.splatinsert.i = insertelement <2 x double> undef, double %0, i32 068  %splat.splat.i = shufflevector <2 x double> %splat.splatinsert.i, <2 x double> undef, <2 x i32> zeroinitializer69  store <2 x double> %splat.splat.i, ptr %c, align 1670  ret void71}72 73; v4f3274define dso_local void @test2(ptr nocapture %c, ptr nocapture readonly %a) local_unnamed_addr {75; P9-LABEL: test2:76; P9:       # %bb.0: # %entry77; P9-NEXT:    addi r4, r4, 1278; P9-NEXT:    lxvwsx vs0, 0, r479; P9-NEXT:    stxv vs0, 0(r3)80; P9-NEXT:    blr81;82; P8-LABEL: test2:83; P8:       # %bb.0: # %entry84; P8-NEXT:    addi r4, r4, 1285; P8-NEXT:    lfiwzx f0, 0, r486; P8-NEXT:    xxspltw vs0, vs0, 187; P8-NEXT:    stxvd2x vs0, 0, r388; P8-NEXT:    blr89;90; P7-LABEL: test2:91; P7:       # %bb.0: # %entry92; P7-NEXT:    addi r4, r4, 1293; P7-NEXT:    lfiwzx f0, 0, r494; P7-NEXT:    xxspltw vs0, vs0, 195; P7-NEXT:    stxvw4x vs0, 0, r396; P7-NEXT:    blr97;98; P9-AIX32-LABEL: test2:99; P9-AIX32:       # %bb.0: # %entry100; P9-AIX32-NEXT:    addi r4, r4, 12101; P9-AIX32-NEXT:    lxvwsx vs0, 0, r4102; P9-AIX32-NEXT:    stxv vs0, 0(r3)103; P9-AIX32-NEXT:    blr104;105; P8-AIX32-LABEL: test2:106; P8-AIX32:       # %bb.0: # %entry107; P8-AIX32-NEXT:    addi r4, r4, 12108; P8-AIX32-NEXT:    lfiwzx f0, 0, r4109; P8-AIX32-NEXT:    xxspltw vs0, vs0, 1110; P8-AIX32-NEXT:    stxvw4x vs0, 0, r3111; P8-AIX32-NEXT:    blr112;113; P7-AIX32-LABEL: test2:114; P7-AIX32:       # %bb.0: # %entry115; P7-AIX32-NEXT:    addi r4, r4, 12116; P7-AIX32-NEXT:    lfiwzx f0, 0, r4117; P7-AIX32-NEXT:    xxspltw vs0, vs0, 1118; P7-AIX32-NEXT:    stxvw4x vs0, 0, r3119; P7-AIX32-NEXT:    blr120entry:121  %arrayidx = getelementptr inbounds float, ptr %a, i64 3122  %0 = load float, ptr %arrayidx, align 4123  %splat.splatinsert.i = insertelement <4 x float> undef, float %0, i32 0124  %splat.splat.i = shufflevector <4 x float> %splat.splatinsert.i, <4 x float> undef, <4 x i32> zeroinitializer125  store <4 x float> %splat.splat.i, ptr %c, align 16126  ret void127}128 129; v4i32130define dso_local void @test3(ptr nocapture %c, ptr nocapture readonly %a) local_unnamed_addr {131; P9-LABEL: test3:132; P9:       # %bb.0: # %entry133; P9-NEXT:    addi r4, r4, 12134; P9-NEXT:    lxvwsx vs0, 0, r4135; P9-NEXT:    stxv vs0, 0(r3)136; P9-NEXT:    blr137;138; P8-LABEL: test3:139; P8:       # %bb.0: # %entry140; P8-NEXT:    addi r4, r4, 12141; P8-NEXT:    lfiwzx f0, 0, r4142; P8-NEXT:    xxspltw vs0, vs0, 1143; P8-NEXT:    stxvd2x vs0, 0, r3144; P8-NEXT:    blr145;146; P7-LABEL: test3:147; P7:       # %bb.0: # %entry148; P7-NEXT:    addi r4, r4, 12149; P7-NEXT:    lfiwzx f0, 0, r4150; P7-NEXT:    xxspltw vs0, vs0, 1151; P7-NEXT:    stxvw4x vs0, 0, r3152; P7-NEXT:    blr153;154; P9-AIX32-LABEL: test3:155; P9-AIX32:       # %bb.0: # %entry156; P9-AIX32-NEXT:    addi r4, r4, 12157; P9-AIX32-NEXT:    lxvwsx vs0, 0, r4158; P9-AIX32-NEXT:    stxv vs0, 0(r3)159; P9-AIX32-NEXT:    blr160;161; P8-AIX32-LABEL: test3:162; P8-AIX32:       # %bb.0: # %entry163; P8-AIX32-NEXT:    addi r4, r4, 12164; P8-AIX32-NEXT:    lfiwzx f0, 0, r4165; P8-AIX32-NEXT:    xxspltw vs0, vs0, 1166; P8-AIX32-NEXT:    stxvw4x vs0, 0, r3167; P8-AIX32-NEXT:    blr168;169; P7-AIX32-LABEL: test3:170; P7-AIX32:       # %bb.0: # %entry171; P7-AIX32-NEXT:    addi r4, r4, 12172; P7-AIX32-NEXT:    lfiwzx f0, 0, r4173; P7-AIX32-NEXT:    xxspltw vs0, vs0, 1174; P7-AIX32-NEXT:    stxvw4x vs0, 0, r3175; P7-AIX32-NEXT:    blr176entry:177  %arrayidx = getelementptr inbounds i32, ptr %a, i64 3178  %0 = load i32, ptr %arrayidx, align 4179  %splat.splatinsert.i = insertelement <4 x i32> undef, i32 %0, i32 0180  %splat.splat.i = shufflevector <4 x i32> %splat.splatinsert.i, <4 x i32> undef, <4 x i32> zeroinitializer181  store <4 x i32> %splat.splat.i, ptr %c, align 16182  ret void183}184 185 186; v2i64187define dso_local void @test4(ptr nocapture %c, ptr nocapture readonly %a) local_unnamed_addr {188; P9-LABEL: test4:189; P9:       # %bb.0: # %entry190; P9-NEXT:    addi r4, r4, 24191; P9-NEXT:    lxvdsx vs0, 0, r4192; P9-NEXT:    stxv vs0, 0(r3)193; P9-NEXT:    blr194;195; P8-LABEL: test4:196; P8:       # %bb.0: # %entry197; P8-NEXT:    addi r4, r4, 24198; P8-NEXT:    lxvdsx vs0, 0, r4199; P8-NEXT:    stxvd2x vs0, 0, r3200; P8-NEXT:    blr201;202; P7-LABEL: test4:203; P7:       # %bb.0: # %entry204; P7-NEXT:    addi r4, r4, 24205; P7-NEXT:    lxvdsx vs0, 0, r4206; P7-NEXT:    stxvd2x vs0, 0, r3207; P7-NEXT:    blr208;209; P9-AIX32-LABEL: test4:210; P9-AIX32:       # %bb.0: # %entry211; P9-AIX32-NEXT:    li r5, 28212; P9-AIX32-NEXT:    lxvwsx vs0, r4, r5213; P9-AIX32-NEXT:    li r5, 24214; P9-AIX32-NEXT:    lxvwsx vs1, r4, r5215; P9-AIX32-NEXT:    lwz r4, L..C0(r2) # %const.0216; P9-AIX32-NEXT:    lxv vs2, 0(r4)217; P9-AIX32-NEXT:    xxperm vs0, vs1, vs2218; P9-AIX32-NEXT:    stxv vs0, 0(r3)219; P9-AIX32-NEXT:    blr220;221; P8-AIX32-LABEL: test4:222; P8-AIX32:       # %bb.0: # %entry223; P8-AIX32-NEXT:    li r5, 28224; P8-AIX32-NEXT:    lfiwzx f0, r4, r5225; P8-AIX32-NEXT:    li r5, 24226; P8-AIX32-NEXT:    xxspltw v2, vs0, 1227; P8-AIX32-NEXT:    lfiwzx f0, r4, r5228; P8-AIX32-NEXT:    lwz r4, L..C0(r2) # %const.0229; P8-AIX32-NEXT:    lxvw4x v4, 0, r4230; P8-AIX32-NEXT:    xxspltw v3, vs0, 1231; P8-AIX32-NEXT:    vperm v2, v3, v2, v4232; P8-AIX32-NEXT:    stxvw4x v2, 0, r3233; P8-AIX32-NEXT:    blr234;235; P7-AIX32-LABEL: test4:236; P7-AIX32:       # %bb.0: # %entry237; P7-AIX32-NEXT:    li r5, 28238; P7-AIX32-NEXT:    lfiwzx f0, r4, r5239; P7-AIX32-NEXT:    li r5, 24240; P7-AIX32-NEXT:    xxspltw v2, vs0, 1241; P7-AIX32-NEXT:    lfiwzx f0, r4, r5242; P7-AIX32-NEXT:    lwz r4, L..C0(r2) # %const.0243; P7-AIX32-NEXT:    lxvw4x v4, 0, r4244; P7-AIX32-NEXT:    xxspltw v3, vs0, 1245; P7-AIX32-NEXT:    vperm v2, v3, v2, v4246; P7-AIX32-NEXT:    stxvw4x v2, 0, r3247; P7-AIX32-NEXT:    blr248entry:249  %arrayidx = getelementptr inbounds i64, ptr %a, i64 3250  %0 = load i64, ptr %arrayidx, align 8251  %splat.splatinsert.i = insertelement <2 x i64> undef, i64 %0, i32 0252  %splat.splat.i = shufflevector <2 x i64> %splat.splatinsert.i, <2 x i64> undef, <2 x i32> zeroinitializer253  store <2 x i64> %splat.splat.i, ptr %c, align 16254  ret void255}256 257; sext v2i64258define void @test5(ptr %a, ptr %in) {259; P9-LABEL: test5:260; P9:       # %bb.0: # %entry261; P9-NEXT:    lfiwax f0, 0, r4262; P9-NEXT:    xxspltd vs0, f0, 0263; P9-NEXT:    stxv vs0, 0(r3)264; P9-NEXT:    blr265;266; P8-LABEL: test5:267; P8:       # %bb.0: # %entry268; P8-NEXT:    lfiwax f0, 0, r4269; P8-NEXT:    xxspltd vs0, f0, 0270; P8-NEXT:    stxvd2x vs0, 0, r3271; P8-NEXT:    blr272;273; P7-LABEL: test5:274; P7:       # %bb.0: # %entry275; P7-NEXT:    lfiwax f0, 0, r4276; P7-NEXT:    xxspltd vs0, f0, 0277; P7-NEXT:    stxvd2x vs0, 0, r3278; P7-NEXT:    blr279;280; P9-AIX32-LABEL: test5:281; P9-AIX32:       # %bb.0: # %entry282; P9-AIX32-NEXT:    lwz r4, 0(r4)283; P9-AIX32-NEXT:    srawi r5, r4, 31284; P9-AIX32-NEXT:    stw r4, -16(r1)285; P9-AIX32-NEXT:    lwz r4, L..C1(r2) # %const.0286; P9-AIX32-NEXT:    lxv vs1, -16(r1)287; P9-AIX32-NEXT:    stw r5, -32(r1)288; P9-AIX32-NEXT:    lxv vs2, -32(r1)289; P9-AIX32-NEXT:    lxv vs0, 0(r4)290; P9-AIX32-NEXT:    xxperm vs1, vs2, vs0291; P9-AIX32-NEXT:    stxv vs1, 0(r3)292; P9-AIX32-NEXT:    blr293;294; P8-AIX32-LABEL: test5:295; P8-AIX32:       # %bb.0: # %entry296; P8-AIX32-NEXT:    lwz r4, 0(r4)297; P8-AIX32-NEXT:    srawi r5, r4, 31298; P8-AIX32-NEXT:    stw r4, -16(r1)299; P8-AIX32-NEXT:    lwz r4, L..C1(r2) # %const.0300; P8-AIX32-NEXT:    stw r5, -32(r1)301; P8-AIX32-NEXT:    lxvw4x v2, 0, r4302; P8-AIX32-NEXT:    addi r4, r1, -16303; P8-AIX32-NEXT:    lxvw4x v3, 0, r4304; P8-AIX32-NEXT:    addi r4, r1, -32305; P8-AIX32-NEXT:    lxvw4x v4, 0, r4306; P8-AIX32-NEXT:    vperm v2, v4, v3, v2307; P8-AIX32-NEXT:    stxvw4x v2, 0, r3308; P8-AIX32-NEXT:    blr309;310; P7-AIX32-LABEL: test5:311; P7-AIX32:       # %bb.0: # %entry312; P7-AIX32-NEXT:    lwz r4, 0(r4)313; P7-AIX32-NEXT:    stw r4, -16(r1)314; P7-AIX32-NEXT:    srawi r4, r4, 31315; P7-AIX32-NEXT:    stw r4, -32(r1)316; P7-AIX32-NEXT:    lwz r4, L..C1(r2) # %const.0317; P7-AIX32-NEXT:    lxvw4x v2, 0, r4318; P7-AIX32-NEXT:    addi r4, r1, -16319; P7-AIX32-NEXT:    lxvw4x v3, 0, r4320; P7-AIX32-NEXT:    addi r4, r1, -32321; P7-AIX32-NEXT:    lxvw4x v4, 0, r4322; P7-AIX32-NEXT:    vperm v2, v4, v3, v2323; P7-AIX32-NEXT:    stxvw4x v2, 0, r3324; P7-AIX32-NEXT:    blr325entry:326  %0 = load i32, ptr %in, align 4327  %conv = sext i32 %0 to i64328  %splat.splatinsert.i = insertelement <2 x i64> poison, i64 %conv, i32 0329  %splat.splat.i = shufflevector <2 x i64> %splat.splatinsert.i, <2 x i64> poison, <2 x i32> zeroinitializer330  store <2 x i64> %splat.splat.i, ptr %a, align 16331  ret void332}333 334; zext v2i64335define void @test6(ptr %a, ptr %in) {336; P9-LABEL: test6:337; P9:       # %bb.0: # %entry338; P9-NEXT:    lfiwzx f0, 0, r4339; P9-NEXT:    xxspltd vs0, f0, 0340; P9-NEXT:    stxv vs0, 0(r3)341; P9-NEXT:    blr342;343; P8-LABEL: test6:344; P8:       # %bb.0: # %entry345; P8-NEXT:    lfiwzx f0, 0, r4346; P8-NEXT:    xxspltd vs0, f0, 0347; P8-NEXT:    stxvd2x vs0, 0, r3348; P8-NEXT:    blr349;350; P7-LABEL: test6:351; P7:       # %bb.0: # %entry352; P7-NEXT:    lfiwzx f0, 0, r4353; P7-NEXT:    xxspltd vs0, f0, 0354; P7-NEXT:    stxvd2x vs0, 0, r3355; P7-NEXT:    blr356;357; P9-AIX32-LABEL: test6:358; P9-AIX32:       # %bb.0: # %entry359; P9-AIX32-NEXT:    lwz r5, L..C2(r2) # %const.0360; P9-AIX32-NEXT:    lxvwsx vs1, 0, r4361; P9-AIX32-NEXT:    xxlxor vs2, vs2, vs2362; P9-AIX32-NEXT:    lxv vs0, 0(r5)363; P9-AIX32-NEXT:    xxperm vs1, vs2, vs0364; P9-AIX32-NEXT:    stxv vs1, 0(r3)365; P9-AIX32-NEXT:    blr366;367; P8-AIX32-LABEL: test6:368; P8-AIX32:       # %bb.0: # %entry369; P8-AIX32-NEXT:    lfiwzx f0, 0, r4370; P8-AIX32-NEXT:    lwz r4, L..C2(r2) # %const.0371; P8-AIX32-NEXT:    xxlxor v4, v4, v4372; P8-AIX32-NEXT:    lxvw4x v3, 0, r4373; P8-AIX32-NEXT:    xxspltw v2, vs0, 1374; P8-AIX32-NEXT:    vperm v2, v4, v2, v3375; P8-AIX32-NEXT:    stxvw4x v2, 0, r3376; P8-AIX32-NEXT:    blr377;378; P7-AIX32-LABEL: test6:379; P7-AIX32:       # %bb.0: # %entry380; P7-AIX32-NEXT:    lfiwzx f0, 0, r4381; P7-AIX32-NEXT:    lwz r4, L..C2(r2) # %const.0382; P7-AIX32-NEXT:    xxlxor v4, v4, v4383; P7-AIX32-NEXT:    lxvw4x v3, 0, r4384; P7-AIX32-NEXT:    xxspltw v2, vs0, 1385; P7-AIX32-NEXT:    vperm v2, v4, v2, v3386; P7-AIX32-NEXT:    stxvw4x v2, 0, r3387; P7-AIX32-NEXT:    blr388entry:389  %0 = load i32, ptr %in, align 4390  %conv = zext i32 %0 to i64391  %splat.splatinsert.i = insertelement <2 x i64> poison, i64 %conv, i32 0392  %splat.splat.i = shufflevector <2 x i64> %splat.splatinsert.i, <2 x i64> poison, <2 x i32> zeroinitializer393  store <2 x i64> %splat.splat.i, ptr %a, align 16394  ret void395}396 397; v8i16398define void @test7(ptr %a, ptr %in) {399; P9-LABEL: test7:400; P9:       # %bb.0: # %entry401; P9-NEXT:    lxsihzx v2, 0, r4402; P9-NEXT:    vsplth v2, v2, 3403; P9-NEXT:    stxv v2, 0(r3)404; P9-NEXT:    blr405;406; P8-LABEL: test7:407; P8:       # %bb.0: # %entry408; P8-NEXT:    lhzx r4, 0, r4409; P8-NEXT:    mtvsrwz v2, r4410; P8-NEXT:    vsplth v2, v2, 3411; P8-NEXT:    xxswapd vs0, v2412; P8-NEXT:    stxvd2x vs0, 0, r3413; P8-NEXT:    blr414;415; P7-LABEL: test7:416; P7:       # %bb.0: # %entry417; P7-NEXT:    li r5, 1418; P7-NEXT:    lvx v2, 0, r4419; P7-NEXT:    lvsl v4, 0, r4420; P7-NEXT:    lvx v3, r5, r4421; P7-NEXT:    vperm v2, v2, v3, v4422; P7-NEXT:    vsplth v2, v2, 0423; P7-NEXT:    stxvw4x v2, 0, r3424; P7-NEXT:    blr425;426; P9-AIX32-LABEL: test7:427; P9-AIX32:       # %bb.0: # %entry428; P9-AIX32-NEXT:    lxsihzx v2, 0, r4429; P9-AIX32-NEXT:    vsplth v2, v2, 3430; P9-AIX32-NEXT:    stxv v2, 0(r3)431; P9-AIX32-NEXT:    blr432;433; P8-AIX32-LABEL: test7:434; P8-AIX32:       # %bb.0: # %entry435; P8-AIX32-NEXT:    lhzx r4, 0, r4436; P8-AIX32-NEXT:    mtvsrwz v2, r4437; P8-AIX32-NEXT:    vsplth v2, v2, 3438; P8-AIX32-NEXT:    stxvw4x v2, 0, r3439; P8-AIX32-NEXT:    blr440;441; P7-AIX32-LABEL: test7:442; P7-AIX32:       # %bb.0: # %entry443; P7-AIX32-NEXT:    li r5, 1444; P7-AIX32-NEXT:    lvx v2, 0, r4445; P7-AIX32-NEXT:    lvsl v4, 0, r4446; P7-AIX32-NEXT:    lvx v3, r5, r4447; P7-AIX32-NEXT:    vperm v2, v2, v3, v4448; P7-AIX32-NEXT:    vsplth v2, v2, 0449; P7-AIX32-NEXT:    stxvw4x v2, 0, r3450; P7-AIX32-NEXT:    blr451entry:452  %0 = load i16, ptr %in, align 2453  %splat.splatinsert.i = insertelement <8 x i16> poison, i16 %0, i32 0454  %splat.splat.i = shufflevector <8 x i16> %splat.splatinsert.i, <8 x i16> poison, <8 x i32> zeroinitializer455  store <8 x i16> %splat.splat.i, ptr %a, align 16456  ret void457}458 459; v16i8460define void @test8(ptr %a, ptr %in) {461; P9-LABEL: test8:462; P9:       # %bb.0: # %entry463; P9-NEXT:    lxsibzx v2, 0, r4464; P9-NEXT:    vspltb v2, v2, 7465; P9-NEXT:    stxv v2, 0(r3)466; P9-NEXT:    blr467;468; P8-LABEL: test8:469; P8:       # %bb.0: # %entry470; P8-NEXT:    lbzx r4, 0, r4471; P8-NEXT:    mtvsrwz v2, r4472; P8-NEXT:    vspltb v2, v2, 7473; P8-NEXT:    xxswapd vs0, v2474; P8-NEXT:    stxvd2x vs0, 0, r3475; P8-NEXT:    blr476;477; P7-LABEL: test8:478; P7:       # %bb.0: # %entry479; P7-NEXT:    lvsl v2, 0, r4480; P7-NEXT:    lvx v3, 0, r4481; P7-NEXT:    vperm v2, v3, v3, v2482; P7-NEXT:    vspltb v2, v2, 0483; P7-NEXT:    stxvw4x v2, 0, r3484; P7-NEXT:    blr485;486; P9-AIX32-LABEL: test8:487; P9-AIX32:       # %bb.0: # %entry488; P9-AIX32-NEXT:    lxsibzx v2, 0, r4489; P9-AIX32-NEXT:    vspltb v2, v2, 7490; P9-AIX32-NEXT:    stxv v2, 0(r3)491; P9-AIX32-NEXT:    blr492;493; P8-AIX32-LABEL: test8:494; P8-AIX32:       # %bb.0: # %entry495; P8-AIX32-NEXT:    lbzx r4, 0, r4496; P8-AIX32-NEXT:    mtvsrwz v2, r4497; P8-AIX32-NEXT:    vspltb v2, v2, 7498; P8-AIX32-NEXT:    stxvw4x v2, 0, r3499; P8-AIX32-NEXT:    blr500;501; P7-AIX32-LABEL: test8:502; P7-AIX32:       # %bb.0: # %entry503; P7-AIX32-NEXT:    lvsl v2, 0, r4504; P7-AIX32-NEXT:    lvx v3, 0, r4505; P7-AIX32-NEXT:    vperm v2, v3, v3, v2506; P7-AIX32-NEXT:    vspltb v2, v2, 0507; P7-AIX32-NEXT:    stxvw4x v2, 0, r3508; P7-AIX32-NEXT:    blr509entry:510  %0 = load i8, ptr %in, align 1511  %splat.splatinsert.i = insertelement <16 x i8> poison, i8 %0, i32 0512  %splat.splat.i = shufflevector <16 x i8> %splat.splatinsert.i, <16 x i8> poison, <16 x i32> zeroinitializer513  store <16 x i8> %splat.splat.i, ptr %a, align 16514  ret void515}516 517define <16 x i8> @unadjusted_lxvwsx(ptr %s, ptr %t) {518; P9-LABEL: unadjusted_lxvwsx:519; P9:       # %bb.0: # %entry520; P9-NEXT:    lxvwsx v2, 0, r3521; P9-NEXT:    blr522;523; P8-LABEL: unadjusted_lxvwsx:524; P8:       # %bb.0: # %entry525; P8-NEXT:    lfiwzx f0, 0, r3526; P8-NEXT:    xxspltw v2, vs0, 1527; P8-NEXT:    blr528;529; P7-LABEL: unadjusted_lxvwsx:530; P7:       # %bb.0: # %entry531; P7-NEXT:    lfiwzx f0, 0, r3532; P7-NEXT:    xxspltw v2, vs0, 1533; P7-NEXT:    blr534;535; P9-AIX32-LABEL: unadjusted_lxvwsx:536; P9-AIX32:       # %bb.0: # %entry537; P9-AIX32-NEXT:    lxvwsx v2, 0, r3538; P9-AIX32-NEXT:    blr539;540; P8-AIX32-LABEL: unadjusted_lxvwsx:541; P8-AIX32:       # %bb.0: # %entry542; P8-AIX32-NEXT:    lfiwzx f0, 0, r3543; P8-AIX32-NEXT:    xxspltw v2, vs0, 1544; P8-AIX32-NEXT:    blr545;546; P7-AIX32-LABEL: unadjusted_lxvwsx:547; P7-AIX32:       # %bb.0: # %entry548; P7-AIX32-NEXT:    lfiwzx f0, 0, r3549; P7-AIX32-NEXT:    xxspltw v2, vs0, 1550; P7-AIX32-NEXT:    blr551  entry:552    %0 = load <4 x i8>, ptr %s, align 4553    %1 = shufflevector <4 x i8> %0, <4 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>554    ret <16 x i8> %1555}556 557define <16 x i8> @adjusted_lxvwsx(ptr %s, ptr %t) {558; P9-LABEL: adjusted_lxvwsx:559; P9:       # %bb.0: # %entry560; P9-NEXT:    addi r3, r3, 4561; P9-NEXT:    lxvwsx v2, 0, r3562; P9-NEXT:    blr563;564; P8-LABEL: adjusted_lxvwsx:565; P8:       # %bb.0: # %entry566; P8-NEXT:    lfdx f0, 0, r3567; P8-NEXT:    xxspltw v2, vs0, 0568; P8-NEXT:    blr569;570; P7-LABEL: adjusted_lxvwsx:571; P7:       # %bb.0: # %entry572; P7-NEXT:    ld r3, 0(r3)573; P7-NEXT:    std r3, -16(r1)574; P7-NEXT:    std r3, -8(r1)575; P7-NEXT:    addi r3, r1, -16576; P7-NEXT:    lxvw4x vs0, 0, r3577; P7-NEXT:    xxspltw v2, vs0, 1578; P7-NEXT:    blr579;580; P9-AIX32-LABEL: adjusted_lxvwsx:581; P9-AIX32:       # %bb.0: # %entry582; P9-AIX32-NEXT:    addi r3, r3, 4583; P9-AIX32-NEXT:    lxvwsx v2, 0, r3584; P9-AIX32-NEXT:    blr585;586; P8-AIX32-LABEL: adjusted_lxvwsx:587; P8-AIX32:       # %bb.0: # %entry588; P8-AIX32-NEXT:    addi r3, r3, 4589; P8-AIX32-NEXT:    lfiwzx f0, 0, r3590; P8-AIX32-NEXT:    xxspltw v2, vs0, 1591; P8-AIX32-NEXT:    blr592;593; P7-AIX32-LABEL: adjusted_lxvwsx:594; P7-AIX32:       # %bb.0: # %entry595; P7-AIX32-NEXT:    addi r3, r3, 4596; P7-AIX32-NEXT:    lfiwzx f0, 0, r3597; P7-AIX32-NEXT:    xxspltw v2, vs0, 1598; P7-AIX32-NEXT:    blr599  entry:600    %0 = load <8 x i8>, ptr %s, align 8601    %1 = shufflevector <8 x i8> %0, <8 x i8> undef, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7>602    ret <16 x i8> %1603}604 605define <16 x i8> @unadjusted_lxvwsx_v16i8(ptr %s, <16 x i8> %t) {606; P9-LABEL: unadjusted_lxvwsx_v16i8:607; P9:       # %bb.0: # %entry608; P9-NEXT:    lxvwsx v2, 0, r3609; P9-NEXT:    blr610;611; P8-LABEL: unadjusted_lxvwsx_v16i8:612; P8:       # %bb.0: # %entry613; P8-NEXT:    lxvd2x vs0, 0, r3614; P8-NEXT:    xxswapd v2, vs0615; P8-NEXT:    xxspltw v2, v2, 3616; P8-NEXT:    blr617;618; P7-LABEL: unadjusted_lxvwsx_v16i8:619; P7:       # %bb.0: # %entry620; P7-NEXT:    lxvw4x vs0, 0, r3621; P7-NEXT:    xxspltw v2, vs0, 0622; P7-NEXT:    blr623;624; P9-AIX32-LABEL: unadjusted_lxvwsx_v16i8:625; P9-AIX32:       # %bb.0: # %entry626; P9-AIX32-NEXT:    lxvwsx v2, 0, r3627; P9-AIX32-NEXT:    blr628;629; P8-AIX32-LABEL: unadjusted_lxvwsx_v16i8:630; P8-AIX32:       # %bb.0: # %entry631; P8-AIX32-NEXT:    lxvw4x vs0, 0, r3632; P8-AIX32-NEXT:    xxspltw v2, vs0, 0633; P8-AIX32-NEXT:    blr634;635; P7-AIX32-LABEL: unadjusted_lxvwsx_v16i8:636; P7-AIX32:       # %bb.0: # %entry637; P7-AIX32-NEXT:    lxvw4x vs0, 0, r3638; P7-AIX32-NEXT:    xxspltw v2, vs0, 0639; P7-AIX32-NEXT:    blr640  entry:641    %0 = load <16 x i8>, ptr %s, align 16642    %1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>643    ret <16 x i8> %1644}645 646define <16 x i8> @adjusted_lxvwsx_v16i8(ptr %s, <16 x i8> %t) {647; P9-LABEL: adjusted_lxvwsx_v16i8:648; P9:       # %bb.0: # %entry649; P9-NEXT:    addi r3, r3, 4650; P9-NEXT:    lxvwsx v2, 0, r3651; P9-NEXT:    blr652;653; P8-LABEL: adjusted_lxvwsx_v16i8:654; P8:       # %bb.0: # %entry655; P8-NEXT:    lxvd2x vs0, 0, r3656; P8-NEXT:    xxswapd v2, vs0657; P8-NEXT:    xxspltw v2, v2, 2658; P8-NEXT:    blr659;660; P7-LABEL: adjusted_lxvwsx_v16i8:661; P7:       # %bb.0: # %entry662; P7-NEXT:    lxvw4x vs0, 0, r3663; P7-NEXT:    xxspltw v2, vs0, 1664; P7-NEXT:    blr665;666; P9-AIX32-LABEL: adjusted_lxvwsx_v16i8:667; P9-AIX32:       # %bb.0: # %entry668; P9-AIX32-NEXT:    addi r3, r3, 4669; P9-AIX32-NEXT:    lxvwsx v2, 0, r3670; P9-AIX32-NEXT:    blr671;672; P8-AIX32-LABEL: adjusted_lxvwsx_v16i8:673; P8-AIX32:       # %bb.0: # %entry674; P8-AIX32-NEXT:    lxvw4x vs0, 0, r3675; P8-AIX32-NEXT:    xxspltw v2, vs0, 1676; P8-AIX32-NEXT:    blr677;678; P7-AIX32-LABEL: adjusted_lxvwsx_v16i8:679; P7-AIX32:       # %bb.0: # %entry680; P7-AIX32-NEXT:    lxvw4x vs0, 0, r3681; P7-AIX32-NEXT:    xxspltw v2, vs0, 1682; P7-AIX32-NEXT:    blr683  entry:684    %0 = load <16 x i8>, ptr %s, align 16685    %1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7>686    ret <16 x i8> %1687}688 689define <16 x i8> @adjusted_lxvwsx_v16i8_2(ptr %s, <16 x i8> %t) {690; P9-LABEL: adjusted_lxvwsx_v16i8_2:691; P9:       # %bb.0: # %entry692; P9-NEXT:    addi r3, r3, 8693; P9-NEXT:    lxvwsx v2, 0, r3694; P9-NEXT:    blr695;696; P8-LABEL: adjusted_lxvwsx_v16i8_2:697; P8:       # %bb.0: # %entry698; P8-NEXT:    lxvd2x vs0, 0, r3699; P8-NEXT:    xxswapd v2, vs0700; P8-NEXT:    xxspltw v2, v2, 1701; P8-NEXT:    blr702;703; P7-LABEL: adjusted_lxvwsx_v16i8_2:704; P7:       # %bb.0: # %entry705; P7-NEXT:    lxvw4x vs0, 0, r3706; P7-NEXT:    xxspltw v2, vs0, 2707; P7-NEXT:    blr708;709; P9-AIX32-LABEL: adjusted_lxvwsx_v16i8_2:710; P9-AIX32:       # %bb.0: # %entry711; P9-AIX32-NEXT:    addi r3, r3, 8712; P9-AIX32-NEXT:    lxvwsx v2, 0, r3713; P9-AIX32-NEXT:    blr714;715; P8-AIX32-LABEL: adjusted_lxvwsx_v16i8_2:716; P8-AIX32:       # %bb.0: # %entry717; P8-AIX32-NEXT:    lxvw4x vs0, 0, r3718; P8-AIX32-NEXT:    xxspltw v2, vs0, 2719; P8-AIX32-NEXT:    blr720;721; P7-AIX32-LABEL: adjusted_lxvwsx_v16i8_2:722; P7-AIX32:       # %bb.0: # %entry723; P7-AIX32-NEXT:    lxvw4x vs0, 0, r3724; P7-AIX32-NEXT:    xxspltw v2, vs0, 2725; P7-AIX32-NEXT:    blr726  entry:727    %0 = load <16 x i8>, ptr %s, align 16728    %1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 8, i32 9, i32 10, i32 11, i32 8, i32 9, i32 10, i32 11, i32 8, i32 9, i32 10, i32 11>729    ret <16 x i8> %1730}731 732define <16 x i8> @adjusted_lxvwsx_v16i8_3(ptr %s, <16 x i8> %t) {733; P9-LABEL: adjusted_lxvwsx_v16i8_3:734; P9:       # %bb.0: # %entry735; P9-NEXT:    addi r3, r3, 12736; P9-NEXT:    lxvwsx v2, 0, r3737; P9-NEXT:    blr738;739; P8-LABEL: adjusted_lxvwsx_v16i8_3:740; P8:       # %bb.0: # %entry741; P8-NEXT:    lxvd2x vs0, 0, r3742; P8-NEXT:    xxswapd v2, vs0743; P8-NEXT:    xxspltw v2, v2, 0744; P8-NEXT:    blr745;746; P7-LABEL: adjusted_lxvwsx_v16i8_3:747; P7:       # %bb.0: # %entry748; P7-NEXT:    lxvw4x vs0, 0, r3749; P7-NEXT:    xxspltw v2, vs0, 3750; P7-NEXT:    blr751;752; P9-AIX32-LABEL: adjusted_lxvwsx_v16i8_3:753; P9-AIX32:       # %bb.0: # %entry754; P9-AIX32-NEXT:    addi r3, r3, 12755; P9-AIX32-NEXT:    lxvwsx v2, 0, r3756; P9-AIX32-NEXT:    blr757;758; P8-AIX32-LABEL: adjusted_lxvwsx_v16i8_3:759; P8-AIX32:       # %bb.0: # %entry760; P8-AIX32-NEXT:    lxvw4x vs0, 0, r3761; P8-AIX32-NEXT:    xxspltw v2, vs0, 3762; P8-AIX32-NEXT:    blr763;764; P7-AIX32-LABEL: adjusted_lxvwsx_v16i8_3:765; P7-AIX32:       # %bb.0: # %entry766; P7-AIX32-NEXT:    lxvw4x vs0, 0, r3767; P7-AIX32-NEXT:    xxspltw v2, vs0, 3768; P7-AIX32-NEXT:    blr769  entry:770    %0 = load <16 x i8>, ptr %s, align 16771    %1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 12, i32 13, i32 14, i32 15, i32 12, i32 13, i32 14, i32 15, i32 12, i32 13, i32 14, i32 15>772    ret <16 x i8> %1773}774 775define <16 x i8> @unadjusted_lxvdsx(ptr %s, ptr %t) {776; P9-LABEL: unadjusted_lxvdsx:777; P9:       # %bb.0: # %entry778; P9-NEXT:    lxvdsx v2, 0, r3779; P9-NEXT:    blr780;781; P8-LABEL: unadjusted_lxvdsx:782; P8:       # %bb.0: # %entry783; P8-NEXT:    lxvdsx v2, 0, r3784; P8-NEXT:    blr785;786; P7-LABEL: unadjusted_lxvdsx:787; P7:       # %bb.0: # %entry788; P7-NEXT:    lxvdsx v2, 0, r3789; P7-NEXT:    blr790;791; P9-AIX32-LABEL: unadjusted_lxvdsx:792; P9-AIX32:       # %bb.0: # %entry793; P9-AIX32-NEXT:    li r4, 4794; P9-AIX32-NEXT:    lxvwsx vs1, 0, r3795; P9-AIX32-NEXT:    lxvwsx vs0, r3, r4796; P9-AIX32-NEXT:    xxmrghw vs0, vs1, vs0797; P9-AIX32-NEXT:    xxmrghd v2, vs0, vs0798; P9-AIX32-NEXT:    blr799;800; P8-AIX32-LABEL: unadjusted_lxvdsx:801; P8-AIX32:       # %bb.0: # %entry802; P8-AIX32-NEXT:    li r4, 4803; P8-AIX32-NEXT:    lfiwzx f1, 0, r3804; P8-AIX32-NEXT:    lfiwzx f0, r3, r4805; P8-AIX32-NEXT:    xxspltw vs1, vs1, 1806; P8-AIX32-NEXT:    xxspltw vs0, vs0, 1807; P8-AIX32-NEXT:    xxmrghw vs0, vs1, vs0808; P8-AIX32-NEXT:    xxmrghd v2, vs0, vs0809; P8-AIX32-NEXT:    blr810;811; P7-AIX32-LABEL: unadjusted_lxvdsx:812; P7-AIX32:       # %bb.0: # %entry813; P7-AIX32-NEXT:    li r4, 4814; P7-AIX32-NEXT:    lfiwzx f1, 0, r3815; P7-AIX32-NEXT:    lfiwzx f0, r3, r4816; P7-AIX32-NEXT:    xxspltw vs1, vs1, 1817; P7-AIX32-NEXT:    xxspltw vs0, vs0, 1818; P7-AIX32-NEXT:    xxmrghw vs0, vs1, vs0819; P7-AIX32-NEXT:    xxmrghd v2, vs0, vs0820; P7-AIX32-NEXT:    blr821  entry:822    %0 = load <8 x i8>, ptr %s, align 8823    %1 = shufflevector <8 x i8> %0, <8 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>824    ret <16 x i8> %1825}826 827define <16 x i8> @unadjusted_lxvdsx_v16i8(ptr %s, <16 x i8> %t) {828; P9-LABEL: unadjusted_lxvdsx_v16i8:829; P9:       # %bb.0: # %entry830; P9-NEXT:    lxvdsx v2, 0, r3831; P9-NEXT:    blr832;833; P8-LABEL: unadjusted_lxvdsx_v16i8:834; P8:       # %bb.0: # %entry835; P8-NEXT:    lxvdsx v2, 0, r3836; P8-NEXT:    blr837;838; P7-LABEL: unadjusted_lxvdsx_v16i8:839; P7:       # %bb.0: # %entry840; P7-NEXT:    lxvdsx v2, 0, r3841; P7-NEXT:    blr842;843; P9-AIX32-LABEL: unadjusted_lxvdsx_v16i8:844; P9-AIX32:       # %bb.0: # %entry845; P9-AIX32-NEXT:    lxvdsx v2, 0, r3846; P9-AIX32-NEXT:    blr847;848; P8-AIX32-LABEL: unadjusted_lxvdsx_v16i8:849; P8-AIX32:       # %bb.0: # %entry850; P8-AIX32-NEXT:    lxvdsx v2, 0, r3851; P8-AIX32-NEXT:    blr852;853; P7-AIX32-LABEL: unadjusted_lxvdsx_v16i8:854; P7-AIX32:       # %bb.0: # %entry855; P7-AIX32-NEXT:    lxvdsx v2, 0, r3856; P7-AIX32-NEXT:    blr857  entry:858    %0 = load <16 x i8>, ptr %s, align 16859    %1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>860    ret <16 x i8> %1861}862 863define <16 x i8> @adjusted_lxvdsx_v16i8(ptr %s, <16 x i8> %t) {864; P9-LABEL: adjusted_lxvdsx_v16i8:865; P9:       # %bb.0: # %entry866; P9-NEXT:    addi r3, r3, 8867; P9-NEXT:    lxvdsx v2, 0, r3868; P9-NEXT:    blr869;870; P8-LABEL: adjusted_lxvdsx_v16i8:871; P8:       # %bb.0: # %entry872; P8-NEXT:    addi r3, r3, 8873; P8-NEXT:    lxvdsx v2, 0, r3874; P8-NEXT:    blr875;876; P7-LABEL: adjusted_lxvdsx_v16i8:877; P7:       # %bb.0: # %entry878; P7-NEXT:    addi r3, r3, 8879; P7-NEXT:    lxvdsx v2, 0, r3880; P7-NEXT:    blr881;882; P9-AIX32-LABEL: adjusted_lxvdsx_v16i8:883; P9-AIX32:       # %bb.0: # %entry884; P9-AIX32-NEXT:    addi r3, r3, 8885; P9-AIX32-NEXT:    lxvdsx v2, 0, r3886; P9-AIX32-NEXT:    blr887;888; P8-AIX32-LABEL: adjusted_lxvdsx_v16i8:889; P8-AIX32:       # %bb.0: # %entry890; P8-AIX32-NEXT:    addi r3, r3, 8891; P8-AIX32-NEXT:    lxvdsx v2, 0, r3892; P8-AIX32-NEXT:    blr893;894; P7-AIX32-LABEL: adjusted_lxvdsx_v16i8:895; P7-AIX32:       # %bb.0: # %entry896; P7-AIX32-NEXT:    addi r3, r3, 8897; P7-AIX32-NEXT:    lxvdsx v2, 0, r3898; P7-AIX32-NEXT:    blr899  entry:900    %0 = load <16 x i8>, ptr %s, align 16901    %1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>902    ret <16 x i8> %1903}904 905define <8 x i16> @test_unaligned_v8i16(ptr %Ptr) {906; P9-LABEL: test_unaligned_v8i16:907; P9:       # %bb.0: # %entry908; P9-NEXT:    addi r3, r3, 6909; P9-NEXT:    lxsihzx v2, 0, r3910; P9-NEXT:    vsplth v2, v2, 3911; P9-NEXT:    blr912;913; P8-LABEL: test_unaligned_v8i16:914; P8:       # %bb.0: # %entry915; P8-NEXT:    lhz r3, 6(r3)916; P8-NEXT:    mtvsrwz v2, r3917; P8-NEXT:    vsplth v2, v2, 3918; P8-NEXT:    blr919;920; P7-LABEL: test_unaligned_v8i16:921; P7:       # %bb.0: # %entry922; P7-NEXT:    addi r3, r3, 6923; P7-NEXT:    li r4, 1924; P7-NEXT:    lvx v2, 0, r3925; P7-NEXT:    lvx v3, r4, r3926; P7-NEXT:    lvsl v4, 0, r3927; P7-NEXT:    vperm v2, v2, v3, v4928; P7-NEXT:    vsplth v2, v2, 0929; P7-NEXT:    blr930;931; P9-AIX32-LABEL: test_unaligned_v8i16:932; P9-AIX32:       # %bb.0: # %entry933; P9-AIX32-NEXT:    addi r3, r3, 6934; P9-AIX32-NEXT:    lxsihzx v2, 0, r3935; P9-AIX32-NEXT:    vsplth v2, v2, 3936; P9-AIX32-NEXT:    blr937;938; P8-AIX32-LABEL: test_unaligned_v8i16:939; P8-AIX32:       # %bb.0: # %entry940; P8-AIX32-NEXT:    lhz r3, 6(r3)941; P8-AIX32-NEXT:    mtvsrwz v2, r3942; P8-AIX32-NEXT:    vsplth v2, v2, 3943; P8-AIX32-NEXT:    blr944;945; P7-AIX32-LABEL: test_unaligned_v8i16:946; P7-AIX32:       # %bb.0: # %entry947; P7-AIX32-NEXT:    addi r3, r3, 6948; P7-AIX32-NEXT:    li r4, 1949; P7-AIX32-NEXT:    lvx v2, 0, r3950; P7-AIX32-NEXT:    lvx v3, r4, r3951; P7-AIX32-NEXT:    lvsl v4, 0, r3952; P7-AIX32-NEXT:    vperm v2, v2, v3, v4953; P7-AIX32-NEXT:    vsplth v2, v2, 0954; P7-AIX32-NEXT:    blr955entry:956  %add.ptr = getelementptr inbounds i16, ptr %Ptr, i64 3957  %0 = load i16, ptr %add.ptr, align 16958  %splat.splatinsert = insertelement <8 x i16> poison, i16 %0, i32 0959  %splat.splat = shufflevector <8 x i16> %splat.splatinsert, <8 x i16> poison, <8 x i32> zeroinitializer960  ret <8 x i16> %splat.splat961}962 963define <16 x i8> @test_unaligned_v16i8(ptr %Ptr) {964; P9-LABEL: test_unaligned_v16i8:965; P9:       # %bb.0: # %entry966; P9-NEXT:    addi r3, r3, 3967; P9-NEXT:    lxsibzx v2, 0, r3968; P9-NEXT:    vspltb v2, v2, 7969; P9-NEXT:    blr970;971; P8-LABEL: test_unaligned_v16i8:972; P8:       # %bb.0: # %entry973; P8-NEXT:    lbz r3, 3(r3)974; P8-NEXT:    mtvsrwz v2, r3975; P8-NEXT:    vspltb v2, v2, 7976; P8-NEXT:    blr977;978; P7-LABEL: test_unaligned_v16i8:979; P7:       # %bb.0: # %entry980; P7-NEXT:    addi r3, r3, 3981; P7-NEXT:    lvsl v2, 0, r3982; P7-NEXT:    lvx v3, 0, r3983; P7-NEXT:    vperm v2, v3, v3, v2984; P7-NEXT:    vspltb v2, v2, 0985; P7-NEXT:    blr986;987; P9-AIX32-LABEL: test_unaligned_v16i8:988; P9-AIX32:       # %bb.0: # %entry989; P9-AIX32-NEXT:    addi r3, r3, 3990; P9-AIX32-NEXT:    lxsibzx v2, 0, r3991; P9-AIX32-NEXT:    vspltb v2, v2, 7992; P9-AIX32-NEXT:    blr993;994; P8-AIX32-LABEL: test_unaligned_v16i8:995; P8-AIX32:       # %bb.0: # %entry996; P8-AIX32-NEXT:    lbz r3, 3(r3)997; P8-AIX32-NEXT:    mtvsrwz v2, r3998; P8-AIX32-NEXT:    vspltb v2, v2, 7999; P8-AIX32-NEXT:    blr1000;1001; P7-AIX32-LABEL: test_unaligned_v16i8:1002; P7-AIX32:       # %bb.0: # %entry1003; P7-AIX32-NEXT:    addi r3, r3, 31004; P7-AIX32-NEXT:    lvsl v2, 0, r31005; P7-AIX32-NEXT:    lvx v3, 0, r31006; P7-AIX32-NEXT:    vperm v2, v3, v3, v21007; P7-AIX32-NEXT:    vspltb v2, v2, 01008; P7-AIX32-NEXT:    blr1009entry:1010  %add.ptr = getelementptr inbounds i8, ptr %Ptr, i64 31011  %0 = load i8, ptr %add.ptr, align 161012  %splat.splatinsert = insertelement <16 x i8> poison, i8 %0, i32 01013  %splat.splat = shufflevector <16 x i8> %splat.splatinsert, <16 x i8> poison, <16 x i32> zeroinitializer1014  ret <16 x i8> %splat.splat1015}1016 1017define <8 x i16> @test_aligned_v8i16_1(ptr %Ptr) {1018; P9-LABEL: test_aligned_v8i16_1:1019; P9:       # %bb.0: # %entry1020; P9-NEXT:    lxsihzx v2, 0, r31021; P9-NEXT:    vsplth v2, v2, 31022; P9-NEXT:    blr1023;1024; P8-LABEL: test_aligned_v8i16_1:1025; P8:       # %bb.0: # %entry1026; P8-NEXT:    lvx v2, 0, r31027; P8-NEXT:    vsplth v2, v2, 71028; P8-NEXT:    blr1029;1030; P7-LABEL: test_aligned_v8i16_1:1031; P7:       # %bb.0: # %entry1032; P7-NEXT:    lvx v2, 0, r31033; P7-NEXT:    vsplth v2, v2, 01034; P7-NEXT:    blr1035;1036; P9-AIX32-LABEL: test_aligned_v8i16_1:1037; P9-AIX32:       # %bb.0: # %entry1038; P9-AIX32-NEXT:    lxsihzx v2, 0, r31039; P9-AIX32-NEXT:    vsplth v2, v2, 31040; P9-AIX32-NEXT:    blr1041;1042; P8-AIX32-LABEL: test_aligned_v8i16_1:1043; P8-AIX32:       # %bb.0: # %entry1044; P8-AIX32-NEXT:    lvx v2, 0, r31045; P8-AIX32-NEXT:    vsplth v2, v2, 01046; P8-AIX32-NEXT:    blr1047;1048; P7-AIX32-LABEL: test_aligned_v8i16_1:1049; P7-AIX32:       # %bb.0: # %entry1050; P7-AIX32-NEXT:    lvx v2, 0, r31051; P7-AIX32-NEXT:    vsplth v2, v2, 01052; P7-AIX32-NEXT:    blr1053entry:1054  %0 = load i16, ptr %Ptr, align 161055  %splat.splatinsert = insertelement <8 x i16> poison, i16 %0, i32 01056  %splat.splat = shufflevector <8 x i16> %splat.splatinsert, <8 x i16> poison, <8 x i32> zeroinitializer1057  ret <8 x i16> %splat.splat1058}1059 1060define <8 x i16> @test_aligned_v8i16_2(ptr %Ptr) {1061; P9-LABEL: test_aligned_v8i16_2:1062; P9:       # %bb.0: # %entry1063; P9-NEXT:    addi r3, r3, 321064; P9-NEXT:    lxsihzx v2, 0, r31065; P9-NEXT:    vsplth v2, v2, 31066; P9-NEXT:    blr1067;1068; P8-LABEL: test_aligned_v8i16_2:1069; P8:       # %bb.0: # %entry1070; P8-NEXT:    addi r3, r3, 321071; P8-NEXT:    lvx v2, 0, r31072; P8-NEXT:    vsplth v2, v2, 71073; P8-NEXT:    blr1074;1075; P7-LABEL: test_aligned_v8i16_2:1076; P7:       # %bb.0: # %entry1077; P7-NEXT:    addi r3, r3, 321078; P7-NEXT:    lvx v2, 0, r31079; P7-NEXT:    vsplth v2, v2, 01080; P7-NEXT:    blr1081;1082; P9-AIX32-LABEL: test_aligned_v8i16_2:1083; P9-AIX32:       # %bb.0: # %entry1084; P9-AIX32-NEXT:    addi r3, r3, 321085; P9-AIX32-NEXT:    lxsihzx v2, 0, r31086; P9-AIX32-NEXT:    vsplth v2, v2, 31087; P9-AIX32-NEXT:    blr1088;1089; P8-AIX32-LABEL: test_aligned_v8i16_2:1090; P8-AIX32:       # %bb.0: # %entry1091; P8-AIX32-NEXT:    addi r3, r3, 321092; P8-AIX32-NEXT:    lvx v2, 0, r31093; P8-AIX32-NEXT:    vsplth v2, v2, 01094; P8-AIX32-NEXT:    blr1095;1096; P7-AIX32-LABEL: test_aligned_v8i16_2:1097; P7-AIX32:       # %bb.0: # %entry1098; P7-AIX32-NEXT:    addi r3, r3, 321099; P7-AIX32-NEXT:    lvx v2, 0, r31100; P7-AIX32-NEXT:    vsplth v2, v2, 01101; P7-AIX32-NEXT:    blr1102entry:1103  %add.ptr = getelementptr inbounds i16, ptr %Ptr, i64 161104  %0 = load i16, ptr %add.ptr, align 161105  %splat.splatinsert = insertelement <8 x i16> poison, i16 %0, i32 01106  %splat.splat = shufflevector <8 x i16> %splat.splatinsert, <8 x i16> poison, <8 x i32> zeroinitializer1107  ret <8 x i16> %splat.splat1108}1109 1110define <16 x i8> @test_aligned_v16i8_1(ptr %Ptr) {1111; P9-LABEL: test_aligned_v16i8_1:1112; P9:       # %bb.0: # %entry1113; P9-NEXT:    lxsibzx v2, 0, r31114; P9-NEXT:    vspltb v2, v2, 71115; P9-NEXT:    blr1116;1117; P8-LABEL: test_aligned_v16i8_1:1118; P8:       # %bb.0: # %entry1119; P8-NEXT:    lvx v2, 0, r31120; P8-NEXT:    vspltb v2, v2, 151121; P8-NEXT:    blr1122;1123; P7-LABEL: test_aligned_v16i8_1:1124; P7:       # %bb.0: # %entry1125; P7-NEXT:    lvx v2, 0, r31126; P7-NEXT:    vspltb v2, v2, 01127; P7-NEXT:    blr1128;1129; P9-AIX32-LABEL: test_aligned_v16i8_1:1130; P9-AIX32:       # %bb.0: # %entry1131; P9-AIX32-NEXT:    lxsibzx v2, 0, r31132; P9-AIX32-NEXT:    vspltb v2, v2, 71133; P9-AIX32-NEXT:    blr1134;1135; P8-AIX32-LABEL: test_aligned_v16i8_1:1136; P8-AIX32:       # %bb.0: # %entry1137; P8-AIX32-NEXT:    lvx v2, 0, r31138; P8-AIX32-NEXT:    vspltb v2, v2, 01139; P8-AIX32-NEXT:    blr1140;1141; P7-AIX32-LABEL: test_aligned_v16i8_1:1142; P7-AIX32:       # %bb.0: # %entry1143; P7-AIX32-NEXT:    lvx v2, 0, r31144; P7-AIX32-NEXT:    vspltb v2, v2, 01145; P7-AIX32-NEXT:    blr1146entry:1147  %0 = load i8, ptr %Ptr, align 161148  %splat.splatinsert = insertelement <16 x i8> poison, i8 %0, i32 01149  %splat.splat = shufflevector <16 x i8> %splat.splatinsert, <16 x i8> poison, <16 x i32> zeroinitializer1150  ret <16 x i8> %splat.splat1151}1152 1153define <16 x i8> @test_aligned_v16i8_2(ptr %Ptr) {1154; P9-LABEL: test_aligned_v16i8_2:1155; P9:       # %bb.0: # %entry1156; P9-NEXT:    addi r3, r3, 161157; P9-NEXT:    lxsibzx v2, 0, r31158; P9-NEXT:    vspltb v2, v2, 71159; P9-NEXT:    blr1160;1161; P8-LABEL: test_aligned_v16i8_2:1162; P8:       # %bb.0: # %entry1163; P8-NEXT:    addi r3, r3, 161164; P8-NEXT:    lvx v2, 0, r31165; P8-NEXT:    vspltb v2, v2, 151166; P8-NEXT:    blr1167;1168; P7-LABEL: test_aligned_v16i8_2:1169; P7:       # %bb.0: # %entry1170; P7-NEXT:    addi r3, r3, 161171; P7-NEXT:    lvx v2, 0, r31172; P7-NEXT:    vspltb v2, v2, 01173; P7-NEXT:    blr1174;1175; P9-AIX32-LABEL: test_aligned_v16i8_2:1176; P9-AIX32:       # %bb.0: # %entry1177; P9-AIX32-NEXT:    addi r3, r3, 161178; P9-AIX32-NEXT:    lxsibzx v2, 0, r31179; P9-AIX32-NEXT:    vspltb v2, v2, 71180; P9-AIX32-NEXT:    blr1181;1182; P8-AIX32-LABEL: test_aligned_v16i8_2:1183; P8-AIX32:       # %bb.0: # %entry1184; P8-AIX32-NEXT:    addi r3, r3, 161185; P8-AIX32-NEXT:    lvx v2, 0, r31186; P8-AIX32-NEXT:    vspltb v2, v2, 01187; P8-AIX32-NEXT:    blr1188;1189; P7-AIX32-LABEL: test_aligned_v16i8_2:1190; P7-AIX32:       # %bb.0: # %entry1191; P7-AIX32-NEXT:    addi r3, r3, 161192; P7-AIX32-NEXT:    lvx v2, 0, r31193; P7-AIX32-NEXT:    vspltb v2, v2, 01194; P7-AIX32-NEXT:    blr1195entry:1196  %add.ptr = getelementptr inbounds i8, ptr %Ptr, i64 161197  %0 = load i8, ptr %add.ptr, align 161198  %splat.splatinsert = insertelement <16 x i8> poison, i8 %0, i32 01199  %splat.splat = shufflevector <16 x i8> %splat.splatinsert, <16 x i8> poison, <16 x i32> zeroinitializer1200  ret <16 x i8> %splat.splat1201}1202 1203; The following test case should not produce a load and splat node,1204; as we cannot handle extending loads (from f32 to f64), and this test1205; shows that there are multiple uses of the extending load (other than1206; a build vector node). `lxvdsx` should not be produced in this case.1207define <2 x double> @test_v2f64_multiple_use(ptr nocapture readonly %a, ptr nocapture %b, ptr nocapture %c) {1208; P9-LABEL: test_v2f64_multiple_use:1209; P9:       # %bb.0: # %entry1210; P9-NEXT:    lfs f0, 0(r3)1211; P9-NEXT:    xxspltd v2, vs0, 01212; P9-NEXT:    lfd f1, 0(r4)1213; P9-NEXT:    xsadddp f1, f1, f01214; P9-NEXT:    stfd f1, 0(r4)1215; P9-NEXT:    lfd f1, 0(r5)1216; P9-NEXT:    xsadddp f1, f1, f01217; P9-NEXT:    stfd f1, 0(r5)1218; P9-NEXT:    blr1219;1220; P8-LABEL: test_v2f64_multiple_use:1221; P8:       # %bb.0: # %entry1222; P8-NEXT:    lfs f0, 0(r3)1223; P8-NEXT:    lfd f1, 0(r4)1224; P8-NEXT:    xsadddp f1, f1, f01225; P8-NEXT:    stfd f1, 0(r4)1226; P8-NEXT:    lfd f1, 0(r5)1227; P8-NEXT:    xxspltd v2, vs0, 01228; P8-NEXT:    xsadddp f0, f1, f01229; P8-NEXT:    stfd f0, 0(r5)1230; P8-NEXT:    blr1231;1232; P7-LABEL: test_v2f64_multiple_use:1233; P7:       # %bb.0: # %entry1234; P7-NEXT:    lfs f0, 0(r3)1235; P7-NEXT:    lfd f1, 0(r4)1236; P7-NEXT:    xsadddp f1, f1, f01237; P7-NEXT:    stfd f1, 0(r4)1238; P7-NEXT:    lfd f1, 0(r5)1239; P7-NEXT:    xxspltd v2, vs0, 01240; P7-NEXT:    xsadddp f0, f1, f01241; P7-NEXT:    stfd f0, 0(r5)1242; P7-NEXT:    blr1243;1244; P9-AIX32-LABEL: test_v2f64_multiple_use:1245; P9-AIX32:       # %bb.0: # %entry1246; P9-AIX32-NEXT:    lfs f0, 0(r3)1247; P9-AIX32-NEXT:    xxmrghd v2, vs0, vs01248; P9-AIX32-NEXT:    lfd f1, 0(r4)1249; P9-AIX32-NEXT:    xsadddp f1, f1, f01250; P9-AIX32-NEXT:    stfd f1, 0(r4)1251; P9-AIX32-NEXT:    lfd f1, 0(r5)1252; P9-AIX32-NEXT:    xsadddp f1, f1, f01253; P9-AIX32-NEXT:    stfd f1, 0(r5)1254; P9-AIX32-NEXT:    blr1255;1256; P8-AIX32-LABEL: test_v2f64_multiple_use:1257; P8-AIX32:       # %bb.0: # %entry1258; P8-AIX32-NEXT:    lfs f0, 0(r3)1259; P8-AIX32-NEXT:    lfd f1, 0(r4)1260; P8-AIX32-NEXT:    xsadddp f1, f1, f01261; P8-AIX32-NEXT:    stfd f1, 0(r4)1262; P8-AIX32-NEXT:    lfd f1, 0(r5)1263; P8-AIX32-NEXT:    xxmrghd v2, vs0, vs01264; P8-AIX32-NEXT:    xsadddp f0, f1, f01265; P8-AIX32-NEXT:    stfd f0, 0(r5)1266; P8-AIX32-NEXT:    blr1267;1268; P7-AIX32-LABEL: test_v2f64_multiple_use:1269; P7-AIX32:       # %bb.0: # %entry1270; P7-AIX32-NEXT:    lfs f0, 0(r3)1271; P7-AIX32-NEXT:    lfd f1, 0(r4)1272; P7-AIX32-NEXT:    xsadddp f1, f1, f01273; P7-AIX32-NEXT:    stfd f1, 0(r4)1274; P7-AIX32-NEXT:    lfd f1, 0(r5)1275; P7-AIX32-NEXT:    xxmrghd v2, vs0, vs01276; P7-AIX32-NEXT:    xsadddp f0, f1, f01277; P7-AIX32-NEXT:    stfd f0, 0(r5)1278; P7-AIX32-NEXT:    blr1279entry:1280  %0 = load float, ptr %a, align 41281  %conv = fpext float %0 to double1282  %1 = load double, ptr %b, align 81283  %add = fadd double %1, %conv1284  store double %add, ptr %b, align 81285  %2 = load double, ptr %c, align 81286  %add2 = fadd double %2, %conv1287  store double %add2, ptr %c, align 81288  %vecinit = insertelement <2 x double> undef, double %conv, i64 01289  %vecinit5 = shufflevector <2 x double> %vecinit, <2 x double> poison, <2 x i32> zeroinitializer1290  ret <2 x double> %vecinit51291}1292 1293define <4 x i32> @test_splatW(ptr %ptr) {1294; P9-LABEL: test_splatW:1295; P9:       # %bb.0: # %entry1296; P9-NEXT:    lxvwsx v2, 0, r31297; P9-NEXT:    blr1298;1299; P8-LABEL: test_splatW:1300; P8:       # %bb.0: # %entry1301; P8-NEXT:    lxvd2x vs0, 0, r31302; P8-NEXT:    xxswapd v2, vs01303; P8-NEXT:    xxspltw v2, v2, 31304; P8-NEXT:    blr1305;1306; P7-LABEL: test_splatW:1307; P7:       # %bb.0: # %entry1308; P7-NEXT:    lxvw4x vs0, 0, r31309; P7-NEXT:    xxspltw v2, vs0, 01310; P7-NEXT:    blr1311;1312; P9-AIX32-LABEL: test_splatW:1313; P9-AIX32:       # %bb.0: # %entry1314; P9-AIX32-NEXT:    lxvwsx v2, 0, r31315; P9-AIX32-NEXT:    blr1316;1317; P8-AIX32-LABEL: test_splatW:1318; P8-AIX32:       # %bb.0: # %entry1319; P8-AIX32-NEXT:    lxvw4x vs0, 0, r31320; P8-AIX32-NEXT:    xxspltw v2, vs0, 01321; P8-AIX32-NEXT:    blr1322;1323; P7-AIX32-LABEL: test_splatW:1324; P7-AIX32:       # %bb.0: # %entry1325; P7-AIX32-NEXT:    lxvw4x vs0, 0, r31326; P7-AIX32-NEXT:    xxspltw v2, vs0, 01327; P7-AIX32-NEXT:    blr1328entry:1329  %0 = load <8 x i16>, ptr %ptr, align 161330  %1 = shufflevector <8 x i16> %0, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1>1331  %2 = bitcast<8 x i16> %1 to <4 x i32>1332  ret <4 x i32> %21333}1334 1335define <4 x i32> @test_splatD(ptr %ptr) {1336; P9-LABEL: test_splatD:1337; P9:       # %bb.0: # %entry1338; P9-NEXT:    lxvdsx v2, 0, r31339; P9-NEXT:    blr1340;1341; P8-LABEL: test_splatD:1342; P8:       # %bb.0: # %entry1343; P8-NEXT:    lxvdsx v2, 0, r31344; P8-NEXT:    blr1345;1346; P7-LABEL: test_splatD:1347; P7:       # %bb.0: # %entry1348; P7-NEXT:    lxvdsx v2, 0, r31349; P7-NEXT:    blr1350;1351; P9-AIX32-LABEL: test_splatD:1352; P9-AIX32:       # %bb.0: # %entry1353; P9-AIX32-NEXT:    lxvdsx v2, 0, r31354; P9-AIX32-NEXT:    blr1355;1356; P8-AIX32-LABEL: test_splatD:1357; P8-AIX32:       # %bb.0: # %entry1358; P8-AIX32-NEXT:    lxvdsx v2, 0, r31359; P8-AIX32-NEXT:    blr1360;1361; P7-AIX32-LABEL: test_splatD:1362; P7-AIX32:       # %bb.0: # %entry1363; P7-AIX32-NEXT:    lxvdsx v2, 0, r31364; P7-AIX32-NEXT:    blr1365entry:1366  %0 = load <8 x i16>, ptr %ptr, align 161367  %1 = shufflevector <8 x i16> %0, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>1368  %2 = bitcast<8 x i16> %1 to <4 x i32>1369  ret <4 x i32> %21370}1371