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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr -verify-machineinstrs -mcpu=pwr8 -mattr=+vsx \3; RUN: -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s --check-prefix=CHECK-P84 5; RUN: llc -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr -verify-machineinstrs -mcpu=pwr9 -mattr=+vsx \6; RUN: -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s --check-prefix=CHECK-P97 8; RUN: llc -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr -verify-machineinstrs -mcpu=pwr8 -mattr=+vsx \9; RUN: -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s --check-prefix=CHECK-P8-BE10 11; RUN: llc -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr -verify-machineinstrs -mcpu=pwr9 -mattr=+vsx \12; RUN: -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s --check-prefix=CHECK-P9-BE13 14define <2 x i64> @load_swap00(ptr %vp1, ptr %vp2) {15; CHECK-P8-LABEL: load_swap00:16; CHECK-P8: # %bb.0:17; CHECK-P8-NEXT: lxvd2x v2, 0, r318; CHECK-P8-NEXT: blr19;20; CHECK-P9-LABEL: load_swap00:21; CHECK-P9: # %bb.0:22; CHECK-P9-NEXT: lxvd2x v2, 0, r323; CHECK-P9-NEXT: blr24;25; CHECK-P8-BE-LABEL: load_swap00:26; CHECK-P8-BE: # %bb.0:27; CHECK-P8-BE-NEXT: lxvd2x v2, 0, r328; CHECK-P8-BE-NEXT: xxswapd v2, v229; CHECK-P8-BE-NEXT: blr30;31; CHECK-P9-BE-LABEL: load_swap00:32; CHECK-P9-BE: # %bb.0:33; CHECK-P9-BE-NEXT: lxv v2, 0(r3)34; CHECK-P9-BE-NEXT: xxswapd v2, v235; CHECK-P9-BE-NEXT: blr36 %v1 = load <2 x i64>, ptr %vp137 %v2 = load <2 x i64>, ptr %vp238 %v3 = shufflevector <2 x i64> %v1, <2 x i64> %v2, <2 x i32> <i32 1, i32 0>39 ret <2 x i64> %v340}41 42define <2 x i64> @load_swap01(ptr %vp1, ptr %vp2) {43; CHECK-P8-LABEL: load_swap01:44; CHECK-P8: # %bb.0:45; CHECK-P8-NEXT: lxvd2x v2, 0, r446; CHECK-P8-NEXT: blr47;48; CHECK-P9-LABEL: load_swap01:49; CHECK-P9: # %bb.0:50; CHECK-P9-NEXT: lxvd2x v2, 0, r451; CHECK-P9-NEXT: blr52;53; CHECK-P8-BE-LABEL: load_swap01:54; CHECK-P8-BE: # %bb.0:55; CHECK-P8-BE-NEXT: lxvd2x v2, 0, r456; CHECK-P8-BE-NEXT: xxswapd v2, v257; CHECK-P8-BE-NEXT: blr58;59; CHECK-P9-BE-LABEL: load_swap01:60; CHECK-P9-BE: # %bb.0:61; CHECK-P9-BE-NEXT: lxv v2, 0(r4)62; CHECK-P9-BE-NEXT: xxswapd v2, v263; CHECK-P9-BE-NEXT: blr64 %v1 = load <2 x i64>, ptr %vp165 %v2 = load <2 x i64>, ptr %vp266 %v3 = shufflevector <2 x i64> %v1, <2 x i64> %v2, <2 x i32> <i32 3, i32 2>67 ret <2 x i64> %v368}69 70define <4 x i32> @load_swap10(ptr %vp1, ptr %vp2) {71; CHECK-P8-LABEL: load_swap10:72; CHECK-P8: # %bb.0:73; CHECK-P8-NEXT: lxvd2x vs0, 0, r374; CHECK-P8-NEXT: addis r3, r2, .LCPI2_0@toc@ha75; CHECK-P8-NEXT: addi r3, r3, .LCPI2_0@toc@l76; CHECK-P8-NEXT: xxswapd v2, vs077; CHECK-P8-NEXT: lxvd2x vs0, 0, r378; CHECK-P8-NEXT: xxswapd v3, vs079; CHECK-P8-NEXT: vperm v2, v2, v2, v380; CHECK-P8-NEXT: blr81;82; CHECK-P9-LABEL: load_swap10:83; CHECK-P9: # %bb.0:84; CHECK-P9-NEXT: lxvw4x v2, 0, r385; CHECK-P9-NEXT: blr86;87; CHECK-P8-BE-LABEL: load_swap10:88; CHECK-P8-BE: # %bb.0:89; CHECK-P8-BE-NEXT: lxvw4x v2, 0, r390; CHECK-P8-BE-NEXT: addis r3, r2, .LCPI2_0@toc@ha91; CHECK-P8-BE-NEXT: addi r3, r3, .LCPI2_0@toc@l92; CHECK-P8-BE-NEXT: lxvw4x v3, 0, r393; CHECK-P8-BE-NEXT: vperm v2, v2, v2, v394; CHECK-P8-BE-NEXT: blr95;96; CHECK-P9-BE-LABEL: load_swap10:97; CHECK-P9-BE: # %bb.0:98; CHECK-P9-BE-NEXT: lxv v2, 0(r3)99; CHECK-P9-BE-NEXT: addis r3, r2, .LCPI2_0@toc@ha100; CHECK-P9-BE-NEXT: addi r3, r3, .LCPI2_0@toc@l101; CHECK-P9-BE-NEXT: lxv vs0, 0(r3)102; CHECK-P9-BE-NEXT: xxperm v2, v2, vs0103; CHECK-P9-BE-NEXT: blr104 %v1 = load <4 x i32>, ptr %vp1105 %v2 = load <4 x i32>, ptr %vp2106 %v3 = shufflevector <4 x i32> %v1, <4 x i32> %v2, <4 x i32> <i32 3, i32 2, i32 1, i32 0>107 ret <4 x i32> %v3108}109 110define <4 x i32> @load_swap11(ptr %vp1, ptr %vp2) {111; CHECK-P8-LABEL: load_swap11:112; CHECK-P8: # %bb.0:113; CHECK-P8-NEXT: lxvd2x vs0, 0, r4114; CHECK-P8-NEXT: addis r3, r2, .LCPI3_0@toc@ha115; CHECK-P8-NEXT: addi r3, r3, .LCPI3_0@toc@l116; CHECK-P8-NEXT: xxswapd v2, vs0117; CHECK-P8-NEXT: lxvd2x vs0, 0, r3118; CHECK-P8-NEXT: xxswapd v3, vs0119; CHECK-P8-NEXT: vperm v2, v2, v2, v3120; CHECK-P8-NEXT: blr121;122; CHECK-P9-LABEL: load_swap11:123; CHECK-P9: # %bb.0:124; CHECK-P9-NEXT: lxvw4x v2, 0, r4125; CHECK-P9-NEXT: blr126;127; CHECK-P8-BE-LABEL: load_swap11:128; CHECK-P8-BE: # %bb.0:129; CHECK-P8-BE-NEXT: addis r3, r2, .LCPI3_0@toc@ha130; CHECK-P8-BE-NEXT: lxvw4x v2, 0, r4131; CHECK-P8-BE-NEXT: addi r3, r3, .LCPI3_0@toc@l132; CHECK-P8-BE-NEXT: lxvw4x v3, 0, r3133; CHECK-P8-BE-NEXT: vperm v2, v2, v2, v3134; CHECK-P8-BE-NEXT: blr135;136; CHECK-P9-BE-LABEL: load_swap11:137; CHECK-P9-BE: # %bb.0:138; CHECK-P9-BE-NEXT: addis r3, r2, .LCPI3_0@toc@ha139; CHECK-P9-BE-NEXT: lxv v2, 0(r4)140; CHECK-P9-BE-NEXT: addi r3, r3, .LCPI3_0@toc@l141; CHECK-P9-BE-NEXT: lxv vs0, 0(r3)142; CHECK-P9-BE-NEXT: xxperm v2, v2, vs0143; CHECK-P9-BE-NEXT: blr144 %v1 = load <4 x i32>, ptr %vp1145 %v2 = load <4 x i32>, ptr %vp2146 %v3 = shufflevector <4 x i32> %v1, <4 x i32> %v2, <4 x i32> <i32 7, i32 6, i32 5, i32 4>147 ret <4 x i32> %v3148}149 150define <8 x i16> @load_swap20(ptr %vp1, ptr %vp2){151; CHECK-P8-LABEL: load_swap20:152; CHECK-P8: # %bb.0:153; CHECK-P8-NEXT: lxvd2x vs0, 0, r3154; CHECK-P8-NEXT: addis r3, r2, .LCPI4_0@toc@ha155; CHECK-P8-NEXT: addi r3, r3, .LCPI4_0@toc@l156; CHECK-P8-NEXT: xxswapd v2, vs0157; CHECK-P8-NEXT: lxvd2x vs0, 0, r3158; CHECK-P8-NEXT: xxswapd v3, vs0159; CHECK-P8-NEXT: vperm v2, v2, v2, v3160; CHECK-P8-NEXT: blr161;162; CHECK-P9-LABEL: load_swap20:163; CHECK-P9: # %bb.0:164; CHECK-P9-NEXT: lxvh8x v2, 0, r3165; CHECK-P9-NEXT: blr166;167; CHECK-P8-BE-LABEL: load_swap20:168; CHECK-P8-BE: # %bb.0:169; CHECK-P8-BE-NEXT: lxvw4x v2, 0, r3170; CHECK-P8-BE-NEXT: addis r3, r2, .LCPI4_0@toc@ha171; CHECK-P8-BE-NEXT: addi r3, r3, .LCPI4_0@toc@l172; CHECK-P8-BE-NEXT: lxvw4x v3, 0, r3173; CHECK-P8-BE-NEXT: vperm v2, v2, v2, v3174; CHECK-P8-BE-NEXT: blr175;176; CHECK-P9-BE-LABEL: load_swap20:177; CHECK-P9-BE: # %bb.0:178; CHECK-P9-BE-NEXT: lxv v2, 0(r3)179; CHECK-P9-BE-NEXT: addis r3, r2, .LCPI4_0@toc@ha180; CHECK-P9-BE-NEXT: addi r3, r3, .LCPI4_0@toc@l181; CHECK-P9-BE-NEXT: lxv vs0, 0(r3)182; CHECK-P9-BE-NEXT: xxperm v2, v2, vs0183; CHECK-P9-BE-NEXT: blr184 %v1 = load <8 x i16>, ptr %vp1185 %v2 = load <8 x i16>, ptr %vp2186 %v3 = shufflevector <8 x i16> %v1, <8 x i16> %v2, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>187 ret <8 x i16> %v3188}189 190define <8 x i16> @load_swap21(ptr %vp1, ptr %vp2){191; CHECK-P8-LABEL: load_swap21:192; CHECK-P8: # %bb.0:193; CHECK-P8-NEXT: lxvd2x vs0, 0, r4194; CHECK-P8-NEXT: addis r3, r2, .LCPI5_0@toc@ha195; CHECK-P8-NEXT: addi r3, r3, .LCPI5_0@toc@l196; CHECK-P8-NEXT: xxswapd v2, vs0197; CHECK-P8-NEXT: lxvd2x vs0, 0, r3198; CHECK-P8-NEXT: xxswapd v3, vs0199; CHECK-P8-NEXT: vperm v2, v2, v2, v3200; CHECK-P8-NEXT: blr201;202; CHECK-P9-LABEL: load_swap21:203; CHECK-P9: # %bb.0:204; CHECK-P9-NEXT: lxvh8x v2, 0, r4205; CHECK-P9-NEXT: blr206;207; CHECK-P8-BE-LABEL: load_swap21:208; CHECK-P8-BE: # %bb.0:209; CHECK-P8-BE-NEXT: addis r3, r2, .LCPI5_0@toc@ha210; CHECK-P8-BE-NEXT: lxvw4x v2, 0, r4211; CHECK-P8-BE-NEXT: addi r3, r3, .LCPI5_0@toc@l212; CHECK-P8-BE-NEXT: lxvw4x v3, 0, r3213; CHECK-P8-BE-NEXT: vperm v2, v2, v2, v3214; CHECK-P8-BE-NEXT: blr215;216; CHECK-P9-BE-LABEL: load_swap21:217; CHECK-P9-BE: # %bb.0:218; CHECK-P9-BE-NEXT: addis r3, r2, .LCPI5_0@toc@ha219; CHECK-P9-BE-NEXT: lxv v2, 0(r4)220; CHECK-P9-BE-NEXT: addi r3, r3, .LCPI5_0@toc@l221; CHECK-P9-BE-NEXT: lxv vs0, 0(r3)222; CHECK-P9-BE-NEXT: xxperm v2, v2, vs0223; CHECK-P9-BE-NEXT: blr224 %v1 = load <8 x i16>, ptr %vp1225 %v2 = load <8 x i16>, ptr %vp2226 %v3 = shufflevector <8 x i16> %v1, <8 x i16> %v2, <8 x i32> <i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8>227 ret <8 x i16> %v3228}229 230define <16 x i8> @load_swap30(ptr %vp1, ptr %vp2){231; CHECK-P8-LABEL: load_swap30:232; CHECK-P8: # %bb.0:233; CHECK-P8-NEXT: lxvd2x vs0, 0, r3234; CHECK-P8-NEXT: addis r3, r2, .LCPI6_0@toc@ha235; CHECK-P8-NEXT: addi r3, r3, .LCPI6_0@toc@l236; CHECK-P8-NEXT: xxswapd v2, vs0237; CHECK-P8-NEXT: lxvd2x vs0, 0, r3238; CHECK-P8-NEXT: xxswapd v3, vs0239; CHECK-P8-NEXT: vperm v2, v2, v2, v3240; CHECK-P8-NEXT: blr241;242; CHECK-P9-LABEL: load_swap30:243; CHECK-P9: # %bb.0:244; CHECK-P9-NEXT: lxvb16x v2, 0, r3245; CHECK-P9-NEXT: blr246;247; CHECK-P8-BE-LABEL: load_swap30:248; CHECK-P8-BE: # %bb.0:249; CHECK-P8-BE-NEXT: lxvw4x v2, 0, r3250; CHECK-P8-BE-NEXT: addis r3, r2, .LCPI6_0@toc@ha251; CHECK-P8-BE-NEXT: addi r3, r3, .LCPI6_0@toc@l252; CHECK-P8-BE-NEXT: lxvw4x v3, 0, r3253; CHECK-P8-BE-NEXT: vperm v2, v2, v2, v3254; CHECK-P8-BE-NEXT: blr255;256; CHECK-P9-BE-LABEL: load_swap30:257; CHECK-P9-BE: # %bb.0:258; CHECK-P9-BE-NEXT: lxv vs0, 0(r3)259; CHECK-P9-BE-NEXT: xxbrq v2, vs0260; CHECK-P9-BE-NEXT: blr261 %v1 = load <16 x i8>, ptr %vp1262 %v2 = load <16 x i8>, ptr %vp2263 %v3 = shufflevector <16 x i8> %v1, <16 x i8> %v2, <16 x i32> <i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>264 ret <16 x i8> %v3265}266 267define <16 x i8> @load_swap31(ptr %vp1, ptr %vp2){268; CHECK-P8-LABEL: load_swap31:269; CHECK-P8: # %bb.0:270; CHECK-P8-NEXT: lxvd2x vs0, 0, r4271; CHECK-P8-NEXT: addis r3, r2, .LCPI7_0@toc@ha272; CHECK-P8-NEXT: addi r3, r3, .LCPI7_0@toc@l273; CHECK-P8-NEXT: xxswapd v2, vs0274; CHECK-P8-NEXT: lxvd2x vs0, 0, r3275; CHECK-P8-NEXT: xxswapd v3, vs0276; CHECK-P8-NEXT: vperm v2, v2, v2, v3277; CHECK-P8-NEXT: blr278;279; CHECK-P9-LABEL: load_swap31:280; CHECK-P9: # %bb.0:281; CHECK-P9-NEXT: lxvb16x v2, 0, r4282; CHECK-P9-NEXT: blr283;284; CHECK-P8-BE-LABEL: load_swap31:285; CHECK-P8-BE: # %bb.0:286; CHECK-P8-BE-NEXT: addis r3, r2, .LCPI7_0@toc@ha287; CHECK-P8-BE-NEXT: lxvw4x v2, 0, r4288; CHECK-P8-BE-NEXT: addi r3, r3, .LCPI7_0@toc@l289; CHECK-P8-BE-NEXT: lxvw4x v3, 0, r3290; CHECK-P8-BE-NEXT: vperm v2, v2, v2, v3291; CHECK-P8-BE-NEXT: blr292;293; CHECK-P9-BE-LABEL: load_swap31:294; CHECK-P9-BE: # %bb.0:295; CHECK-P9-BE-NEXT: lxv vs0, 0(r4)296; CHECK-P9-BE-NEXT: xxbrq v2, vs0297; CHECK-P9-BE-NEXT: blr298 %v1 = load <16 x i8>, ptr %vp1299 %v2 = load <16 x i8>, ptr %vp2300 %v3 = shufflevector <16 x i8> %v1, <16 x i8> %v2, <16 x i32> <i32 31, i32 30, i32 29, i32 28, i32 27, i32 26, i32 25, i32 24, i32 23, i32 22, i32 21, i32 20, i32 19, i32 18, i32 17, i32 16>301 ret <16 x i8> %v3302}303 304define <2 x double> @load_swap40(ptr %vp1, ptr %vp2) {305; CHECK-P8-LABEL: load_swap40:306; CHECK-P8: # %bb.0:307; CHECK-P8-NEXT: lxvd2x v2, 0, r4308; CHECK-P8-NEXT: blr309;310; CHECK-P9-LABEL: load_swap40:311; CHECK-P9: # %bb.0:312; CHECK-P9-NEXT: lxvd2x v2, 0, r4313; CHECK-P9-NEXT: blr314;315; CHECK-P8-BE-LABEL: load_swap40:316; CHECK-P8-BE: # %bb.0:317; CHECK-P8-BE-NEXT: lxvd2x vs0, 0, r4318; CHECK-P8-BE-NEXT: xxswapd v2, vs0319; CHECK-P8-BE-NEXT: blr320;321; CHECK-P9-BE-LABEL: load_swap40:322; CHECK-P9-BE: # %bb.0:323; CHECK-P9-BE-NEXT: lxv vs0, 0(r4)324; CHECK-P9-BE-NEXT: xxswapd v2, vs0325; CHECK-P9-BE-NEXT: blr326 %v1 = load <2 x double>, ptr %vp1327 %v2 = load <2 x double>, ptr %vp2328 %v3 = shufflevector <2 x double> %v1, <2 x double> %v2, <2 x i32> <i32 3, i32 2>329 ret <2 x double> %v3330}331 332define <4 x float> @load_swap50(ptr %vp1, ptr %vp2) {333; CHECK-P8-LABEL: load_swap50:334; CHECK-P8: # %bb.0:335; CHECK-P8-NEXT: lxvd2x vs0, 0, r3336; CHECK-P8-NEXT: addis r3, r2, .LCPI9_0@toc@ha337; CHECK-P8-NEXT: addi r3, r3, .LCPI9_0@toc@l338; CHECK-P8-NEXT: xxswapd v2, vs0339; CHECK-P8-NEXT: lxvd2x vs0, 0, r3340; CHECK-P8-NEXT: xxswapd v3, vs0341; CHECK-P8-NEXT: vperm v2, v2, v2, v3342; CHECK-P8-NEXT: blr343;344; CHECK-P9-LABEL: load_swap50:345; CHECK-P9: # %bb.0:346; CHECK-P9-NEXT: lxvw4x v2, 0, r3347; CHECK-P9-NEXT: blr348;349; CHECK-P8-BE-LABEL: load_swap50:350; CHECK-P8-BE: # %bb.0:351; CHECK-P8-BE-NEXT: lxvw4x v2, 0, r3352; CHECK-P8-BE-NEXT: addis r3, r2, .LCPI9_0@toc@ha353; CHECK-P8-BE-NEXT: addi r3, r3, .LCPI9_0@toc@l354; CHECK-P8-BE-NEXT: lxvw4x v3, 0, r3355; CHECK-P8-BE-NEXT: vperm v2, v2, v2, v3356; CHECK-P8-BE-NEXT: blr357;358; CHECK-P9-BE-LABEL: load_swap50:359; CHECK-P9-BE: # %bb.0:360; CHECK-P9-BE-NEXT: lxv v2, 0(r3)361; CHECK-P9-BE-NEXT: addis r3, r2, .LCPI9_0@toc@ha362; CHECK-P9-BE-NEXT: addi r3, r3, .LCPI9_0@toc@l363; CHECK-P9-BE-NEXT: lxv vs0, 0(r3)364; CHECK-P9-BE-NEXT: xxperm v2, v2, vs0365; CHECK-P9-BE-NEXT: blr366 %v1 = load <4 x float>, ptr %vp1367 %v2 = load <4 x float>, ptr %vp2368 %v3 = shufflevector <4 x float> %v1, <4 x float> %v2, <4 x i32> <i32 3, i32 2, i32 1, i32 0>369 ret <4 x float> %v3370}371 372define <4 x float> @load_swap51(ptr %vp1, ptr %vp2) {373; CHECK-P8-LABEL: load_swap51:374; CHECK-P8: # %bb.0:375; CHECK-P8-NEXT: lxvd2x vs0, 0, r4376; CHECK-P8-NEXT: addis r3, r2, .LCPI10_0@toc@ha377; CHECK-P8-NEXT: addi r3, r3, .LCPI10_0@toc@l378; CHECK-P8-NEXT: xxswapd v2, vs0379; CHECK-P8-NEXT: lxvd2x vs0, 0, r3380; CHECK-P8-NEXT: xxswapd v3, vs0381; CHECK-P8-NEXT: vperm v2, v2, v2, v3382; CHECK-P8-NEXT: blr383;384; CHECK-P9-LABEL: load_swap51:385; CHECK-P9: # %bb.0:386; CHECK-P9-NEXT: lxvw4x v2, 0, r4387; CHECK-P9-NEXT: blr388;389; CHECK-P8-BE-LABEL: load_swap51:390; CHECK-P8-BE: # %bb.0:391; CHECK-P8-BE-NEXT: addis r3, r2, .LCPI10_0@toc@ha392; CHECK-P8-BE-NEXT: lxvw4x v2, 0, r4393; CHECK-P8-BE-NEXT: addi r3, r3, .LCPI10_0@toc@l394; CHECK-P8-BE-NEXT: lxvw4x v3, 0, r3395; CHECK-P8-BE-NEXT: vperm v2, v2, v2, v3396; CHECK-P8-BE-NEXT: blr397;398; CHECK-P9-BE-LABEL: load_swap51:399; CHECK-P9-BE: # %bb.0:400; CHECK-P9-BE-NEXT: addis r3, r2, .LCPI10_0@toc@ha401; CHECK-P9-BE-NEXT: lxv v2, 0(r4)402; CHECK-P9-BE-NEXT: addi r3, r3, .LCPI10_0@toc@l403; CHECK-P9-BE-NEXT: lxv vs0, 0(r3)404; CHECK-P9-BE-NEXT: xxperm v2, v2, vs0405; CHECK-P9-BE-NEXT: blr406 %v1 = load <4 x float>, ptr %vp1407 %v2 = load <4 x float>, ptr %vp2408 %v3 = shufflevector <4 x float> %v1, <4 x float> %v2, <4 x i32> <i32 7, i32 6, i32 5, i32 4>409 ret <4 x float> %v3410}411 412define void @swap_store00(<2 x i64> %v1, <2 x i64> %v2, ptr %vp) {413; CHECK-P8-LABEL: swap_store00:414; CHECK-P8: # %bb.0:415; CHECK-P8-NEXT: stxvd2x v2, 0, r7416; CHECK-P8-NEXT: blr417;418; CHECK-P9-LABEL: swap_store00:419; CHECK-P9: # %bb.0:420; CHECK-P9-NEXT: stxvd2x v2, 0, r7421; CHECK-P9-NEXT: blr422;423; CHECK-P8-BE-LABEL: swap_store00:424; CHECK-P8-BE: # %bb.0:425; CHECK-P8-BE-NEXT: xxswapd vs0, v2426; CHECK-P8-BE-NEXT: stxvd2x vs0, 0, r7427; CHECK-P8-BE-NEXT: blr428;429; CHECK-P9-BE-LABEL: swap_store00:430; CHECK-P9-BE: # %bb.0:431; CHECK-P9-BE-NEXT: xxswapd vs0, v2432; CHECK-P9-BE-NEXT: stxv vs0, 0(r7)433; CHECK-P9-BE-NEXT: blr434 %v3 = shufflevector <2 x i64> %v1, <2 x i64> %v2, <2 x i32> <i32 1, i32 0>435 store <2 x i64> %v3, ptr %vp436 ret void437}438 439define void @swap_store01(<2 x i64> %v1, <2 x i64> %v2, ptr %vp) {440; CHECK-P8-LABEL: swap_store01:441; CHECK-P8: # %bb.0:442; CHECK-P8-NEXT: stxvd2x v3, 0, r7443; CHECK-P8-NEXT: blr444;445; CHECK-P9-LABEL: swap_store01:446; CHECK-P9: # %bb.0:447; CHECK-P9-NEXT: stxvd2x v3, 0, r7448; CHECK-P9-NEXT: blr449;450; CHECK-P8-BE-LABEL: swap_store01:451; CHECK-P8-BE: # %bb.0:452; CHECK-P8-BE-NEXT: xxswapd vs0, v3453; CHECK-P8-BE-NEXT: stxvd2x vs0, 0, r7454; CHECK-P8-BE-NEXT: blr455;456; CHECK-P9-BE-LABEL: swap_store01:457; CHECK-P9-BE: # %bb.0:458; CHECK-P9-BE-NEXT: xxswapd vs0, v3459; CHECK-P9-BE-NEXT: stxv vs0, 0(r7)460; CHECK-P9-BE-NEXT: blr461 %v3 = shufflevector <2 x i64> %v1, <2 x i64> %v2, <2 x i32> <i32 3, i32 2>462 store <2 x i64> %v3, ptr %vp463 ret void464}465 466define void @swap_store10(<4 x i32> %v1, <4 x i32> %v2, ptr %vp) {467; CHECK-P8-LABEL: swap_store10:468; CHECK-P8: # %bb.0:469; CHECK-P8-NEXT: addis r3, r2, .LCPI13_0@toc@ha470; CHECK-P8-NEXT: addi r3, r3, .LCPI13_0@toc@l471; CHECK-P8-NEXT: lxvd2x vs0, 0, r3472; CHECK-P8-NEXT: xxswapd v3, vs0473; CHECK-P8-NEXT: vperm v2, v2, v2, v3474; CHECK-P8-NEXT: xxswapd vs0, v2475; CHECK-P8-NEXT: stxvd2x vs0, 0, r7476; CHECK-P8-NEXT: blr477;478; CHECK-P9-LABEL: swap_store10:479; CHECK-P9: # %bb.0:480; CHECK-P9-NEXT: stxvw4x v2, 0, r7481; CHECK-P9-NEXT: blr482;483; CHECK-P8-BE-LABEL: swap_store10:484; CHECK-P8-BE: # %bb.0:485; CHECK-P8-BE-NEXT: addis r3, r2, .LCPI13_0@toc@ha486; CHECK-P8-BE-NEXT: addi r3, r3, .LCPI13_0@toc@l487; CHECK-P8-BE-NEXT: lxvw4x v3, 0, r3488; CHECK-P8-BE-NEXT: vperm v2, v2, v2, v3489; CHECK-P8-BE-NEXT: stxvw4x v2, 0, r7490; CHECK-P8-BE-NEXT: blr491;492; CHECK-P9-BE-LABEL: swap_store10:493; CHECK-P9-BE: # %bb.0:494; CHECK-P9-BE-NEXT: addis r3, r2, .LCPI13_0@toc@ha495; CHECK-P9-BE-NEXT: addi r3, r3, .LCPI13_0@toc@l496; CHECK-P9-BE-NEXT: lxv vs0, 0(r3)497; CHECK-P9-BE-NEXT: xxperm v2, v2, vs0498; CHECK-P9-BE-NEXT: stxv v2, 0(r7)499; CHECK-P9-BE-NEXT: blr500 %v3 = shufflevector <4 x i32> %v1, <4 x i32> %v2, <4 x i32> <i32 3, i32 2, i32 1, i32 0>501 store <4 x i32> %v3, ptr %vp502 ret void503}504 505define void @swap_store11(<4 x i32> %v1, <4 x i32> %v2, ptr %vp) {506; CHECK-P8-LABEL: swap_store11:507; CHECK-P8: # %bb.0:508; CHECK-P8-NEXT: addis r3, r2, .LCPI14_0@toc@ha509; CHECK-P8-NEXT: addi r3, r3, .LCPI14_0@toc@l510; CHECK-P8-NEXT: lxvd2x vs0, 0, r3511; CHECK-P8-NEXT: xxswapd v2, vs0512; CHECK-P8-NEXT: vperm v2, v3, v3, v2513; CHECK-P8-NEXT: xxswapd vs0, v2514; CHECK-P8-NEXT: stxvd2x vs0, 0, r7515; CHECK-P8-NEXT: blr516;517; CHECK-P9-LABEL: swap_store11:518; CHECK-P9: # %bb.0:519; CHECK-P9-NEXT: stxvw4x v3, 0, r7520; CHECK-P9-NEXT: blr521;522; CHECK-P8-BE-LABEL: swap_store11:523; CHECK-P8-BE: # %bb.0:524; CHECK-P8-BE-NEXT: addis r3, r2, .LCPI14_0@toc@ha525; CHECK-P8-BE-NEXT: addi r3, r3, .LCPI14_0@toc@l526; CHECK-P8-BE-NEXT: lxvw4x v2, 0, r3527; CHECK-P8-BE-NEXT: vperm v2, v3, v3, v2528; CHECK-P8-BE-NEXT: stxvw4x v2, 0, r7529; CHECK-P8-BE-NEXT: blr530;531; CHECK-P9-BE-LABEL: swap_store11:532; CHECK-P9-BE: # %bb.0:533; CHECK-P9-BE-NEXT: addis r3, r2, .LCPI14_0@toc@ha534; CHECK-P9-BE-NEXT: addi r3, r3, .LCPI14_0@toc@l535; CHECK-P9-BE-NEXT: lxv vs0, 0(r3)536; CHECK-P9-BE-NEXT: xxperm v3, v3, vs0537; CHECK-P9-BE-NEXT: stxv v3, 0(r7)538; CHECK-P9-BE-NEXT: blr539 %v3 = shufflevector <4 x i32> %v1, <4 x i32> %v2, <4 x i32> <i32 7, i32 6, i32 5, i32 4>540 store <4 x i32> %v3, ptr %vp541 ret void542}543 544define void @swap_store20(<8 x i16> %v1, <8 x i16> %v2, ptr %vp) {545; CHECK-P8-LABEL: swap_store20:546; CHECK-P8: # %bb.0:547; CHECK-P8-NEXT: addis r3, r2, .LCPI15_0@toc@ha548; CHECK-P8-NEXT: addi r3, r3, .LCPI15_0@toc@l549; CHECK-P8-NEXT: lxvd2x vs0, 0, r3550; CHECK-P8-NEXT: xxswapd v3, vs0551; CHECK-P8-NEXT: vperm v2, v2, v2, v3552; CHECK-P8-NEXT: xxswapd vs0, v2553; CHECK-P8-NEXT: stxvd2x vs0, 0, r7554; CHECK-P8-NEXT: blr555;556; CHECK-P9-LABEL: swap_store20:557; CHECK-P9: # %bb.0:558; CHECK-P9-NEXT: stxvh8x v2, 0, r7559; CHECK-P9-NEXT: blr560;561; CHECK-P8-BE-LABEL: swap_store20:562; CHECK-P8-BE: # %bb.0:563; CHECK-P8-BE-NEXT: addis r3, r2, .LCPI15_0@toc@ha564; CHECK-P8-BE-NEXT: addi r3, r3, .LCPI15_0@toc@l565; CHECK-P8-BE-NEXT: lxvw4x v3, 0, r3566; CHECK-P8-BE-NEXT: vperm v2, v2, v2, v3567; CHECK-P8-BE-NEXT: stxvw4x v2, 0, r7568; CHECK-P8-BE-NEXT: blr569;570; CHECK-P9-BE-LABEL: swap_store20:571; CHECK-P9-BE: # %bb.0:572; CHECK-P9-BE-NEXT: addis r3, r2, .LCPI15_0@toc@ha573; CHECK-P9-BE-NEXT: addi r3, r3, .LCPI15_0@toc@l574; CHECK-P9-BE-NEXT: lxv vs0, 0(r3)575; CHECK-P9-BE-NEXT: xxperm v2, v2, vs0576; CHECK-P9-BE-NEXT: stxv v2, 0(r7)577; CHECK-P9-BE-NEXT: blr578 %v3 = shufflevector <8 x i16> %v1, <8 x i16> %v2, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>579 store <8 x i16> %v3, ptr %vp580 ret void581}582 583define void @swap_store21(<8 x i16> %v1, <8 x i16> %v2, ptr %vp) {584; CHECK-P8-LABEL: swap_store21:585; CHECK-P8: # %bb.0:586; CHECK-P8-NEXT: addis r3, r2, .LCPI16_0@toc@ha587; CHECK-P8-NEXT: addi r3, r3, .LCPI16_0@toc@l588; CHECK-P8-NEXT: lxvd2x vs0, 0, r3589; CHECK-P8-NEXT: xxswapd v2, vs0590; CHECK-P8-NEXT: vperm v2, v3, v3, v2591; CHECK-P8-NEXT: xxswapd vs0, v2592; CHECK-P8-NEXT: stxvd2x vs0, 0, r7593; CHECK-P8-NEXT: blr594;595; CHECK-P9-LABEL: swap_store21:596; CHECK-P9: # %bb.0:597; CHECK-P9-NEXT: stxvh8x v3, 0, r7598; CHECK-P9-NEXT: blr599;600; CHECK-P8-BE-LABEL: swap_store21:601; CHECK-P8-BE: # %bb.0:602; CHECK-P8-BE-NEXT: addis r3, r2, .LCPI16_0@toc@ha603; CHECK-P8-BE-NEXT: addi r3, r3, .LCPI16_0@toc@l604; CHECK-P8-BE-NEXT: lxvw4x v2, 0, r3605; CHECK-P8-BE-NEXT: vperm v2, v3, v3, v2606; CHECK-P8-BE-NEXT: stxvw4x v2, 0, r7607; CHECK-P8-BE-NEXT: blr608;609; CHECK-P9-BE-LABEL: swap_store21:610; CHECK-P9-BE: # %bb.0:611; CHECK-P9-BE-NEXT: addis r3, r2, .LCPI16_0@toc@ha612; CHECK-P9-BE-NEXT: addi r3, r3, .LCPI16_0@toc@l613; CHECK-P9-BE-NEXT: lxv vs0, 0(r3)614; CHECK-P9-BE-NEXT: xxperm v3, v3, vs0615; CHECK-P9-BE-NEXT: stxv v3, 0(r7)616; CHECK-P9-BE-NEXT: blr617 %v3 = shufflevector <8 x i16> %v1, <8 x i16> %v2, <8 x i32> <i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8>618 store <8 x i16> %v3, ptr %vp619 ret void620}621 622define void @swap_store30(<16 x i8> %v1, <16 x i8> %v2, ptr %vp) {623; CHECK-P8-LABEL: swap_store30:624; CHECK-P8: # %bb.0:625; CHECK-P8-NEXT: addis r3, r2, .LCPI17_0@toc@ha626; CHECK-P8-NEXT: addi r3, r3, .LCPI17_0@toc@l627; CHECK-P8-NEXT: lxvd2x vs0, 0, r3628; CHECK-P8-NEXT: xxswapd v3, vs0629; CHECK-P8-NEXT: vperm v2, v2, v2, v3630; CHECK-P8-NEXT: xxswapd vs0, v2631; CHECK-P8-NEXT: stxvd2x vs0, 0, r7632; CHECK-P8-NEXT: blr633;634; CHECK-P9-LABEL: swap_store30:635; CHECK-P9: # %bb.0:636; CHECK-P9-NEXT: stxvb16x v2, 0, r7637; CHECK-P9-NEXT: blr638;639; CHECK-P8-BE-LABEL: swap_store30:640; CHECK-P8-BE: # %bb.0:641; CHECK-P8-BE-NEXT: addis r3, r2, .LCPI17_0@toc@ha642; CHECK-P8-BE-NEXT: addi r3, r3, .LCPI17_0@toc@l643; CHECK-P8-BE-NEXT: lxvw4x v3, 0, r3644; CHECK-P8-BE-NEXT: vperm v2, v2, v2, v3645; CHECK-P8-BE-NEXT: stxvw4x v2, 0, r7646; CHECK-P8-BE-NEXT: blr647;648; CHECK-P9-BE-LABEL: swap_store30:649; CHECK-P9-BE: # %bb.0:650; CHECK-P9-BE-NEXT: xxbrq vs0, v2651; CHECK-P9-BE-NEXT: stxv vs0, 0(r7)652; CHECK-P9-BE-NEXT: blr653 %v3 = shufflevector <16 x i8> %v1, <16 x i8> %v2, <16 x i32> <i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>654 store <16 x i8> %v3, ptr %vp655 ret void656}657 658define void @swap_store31(<16 x i8> %v1, <16 x i8> %v2, ptr %vp) {659; CHECK-P8-LABEL: swap_store31:660; CHECK-P8: # %bb.0:661; CHECK-P8-NEXT: addis r3, r2, .LCPI18_0@toc@ha662; CHECK-P8-NEXT: addi r3, r3, .LCPI18_0@toc@l663; CHECK-P8-NEXT: lxvd2x vs0, 0, r3664; CHECK-P8-NEXT: xxswapd v2, vs0665; CHECK-P8-NEXT: vperm v2, v3, v3, v2666; CHECK-P8-NEXT: xxswapd vs0, v2667; CHECK-P8-NEXT: stxvd2x vs0, 0, r7668; CHECK-P8-NEXT: blr669;670; CHECK-P9-LABEL: swap_store31:671; CHECK-P9: # %bb.0:672; CHECK-P9-NEXT: stxvb16x v3, 0, r7673; CHECK-P9-NEXT: blr674;675; CHECK-P8-BE-LABEL: swap_store31:676; CHECK-P8-BE: # %bb.0:677; CHECK-P8-BE-NEXT: addis r3, r2, .LCPI18_0@toc@ha678; CHECK-P8-BE-NEXT: addi r3, r3, .LCPI18_0@toc@l679; CHECK-P8-BE-NEXT: lxvw4x v2, 0, r3680; CHECK-P8-BE-NEXT: vperm v2, v3, v3, v2681; CHECK-P8-BE-NEXT: stxvw4x v2, 0, r7682; CHECK-P8-BE-NEXT: blr683;684; CHECK-P9-BE-LABEL: swap_store31:685; CHECK-P9-BE: # %bb.0:686; CHECK-P9-BE-NEXT: xxbrq vs0, v3687; CHECK-P9-BE-NEXT: stxv vs0, 0(r7)688; CHECK-P9-BE-NEXT: blr689 %v3 = shufflevector <16 x i8> %v1, <16 x i8> %v2, <16 x i32> <i32 31, i32 30, i32 29, i32 28, i32 27, i32 26, i32 25, i32 24, i32 23, i32 22, i32 21, i32 20, i32 19, i32 18, i32 17, i32 16>690 store <16 x i8> %v3, ptr %vp691 ret void692}693 694define void @swap_store40(<2 x double> %v1, <2 x double> %v2, ptr %vp) {695; CHECK-P8-LABEL: swap_store40:696; CHECK-P8: # %bb.0:697; CHECK-P8-NEXT: stxvd2x v2, 0, r7698; CHECK-P8-NEXT: blr699;700; CHECK-P9-LABEL: swap_store40:701; CHECK-P9: # %bb.0:702; CHECK-P9-NEXT: stxvd2x v2, 0, r7703; CHECK-P9-NEXT: blr704;705; CHECK-P8-BE-LABEL: swap_store40:706; CHECK-P8-BE: # %bb.0:707; CHECK-P8-BE-NEXT: xxswapd vs0, v2708; CHECK-P8-BE-NEXT: stxvd2x vs0, 0, r7709; CHECK-P8-BE-NEXT: blr710;711; CHECK-P9-BE-LABEL: swap_store40:712; CHECK-P9-BE: # %bb.0:713; CHECK-P9-BE-NEXT: xxswapd vs0, v2714; CHECK-P9-BE-NEXT: stxv vs0, 0(r7)715; CHECK-P9-BE-NEXT: blr716 %v3 = shufflevector <2 x double> %v1, <2 x double> %v2, <2 x i32> <i32 1, i32 0>717 store <2 x double> %v3, ptr %vp718 ret void719}720 721define void @swap_store41(<2 x double> %v1, <2 x double> %v2, ptr %vp) {722; CHECK-P8-LABEL: swap_store41:723; CHECK-P8: # %bb.0:724; CHECK-P8-NEXT: stxvd2x v3, 0, r7725; CHECK-P8-NEXT: blr726;727; CHECK-P9-LABEL: swap_store41:728; CHECK-P9: # %bb.0:729; CHECK-P9-NEXT: stxvd2x v3, 0, r7730; CHECK-P9-NEXT: blr731;732; CHECK-P8-BE-LABEL: swap_store41:733; CHECK-P8-BE: # %bb.0:734; CHECK-P8-BE-NEXT: xxswapd vs0, v3735; CHECK-P8-BE-NEXT: stxvd2x vs0, 0, r7736; CHECK-P8-BE-NEXT: blr737;738; CHECK-P9-BE-LABEL: swap_store41:739; CHECK-P9-BE: # %bb.0:740; CHECK-P9-BE-NEXT: xxswapd vs0, v3741; CHECK-P9-BE-NEXT: stxv vs0, 0(r7)742; CHECK-P9-BE-NEXT: blr743 %v3 = shufflevector <2 x double> %v1, <2 x double> %v2, <2 x i32> <i32 3, i32 2>744 store <2 x double> %v3, ptr %vp745 ret void746}747 748define void @swap_store50(<4 x float> %v1, <4 x float> %v2, ptr %vp) {749; CHECK-P8-LABEL: swap_store50:750; CHECK-P8: # %bb.0:751; CHECK-P8-NEXT: addis r3, r2, .LCPI21_0@toc@ha752; CHECK-P8-NEXT: addi r3, r3, .LCPI21_0@toc@l753; CHECK-P8-NEXT: lxvd2x vs0, 0, r3754; CHECK-P8-NEXT: xxswapd v3, vs0755; CHECK-P8-NEXT: vperm v2, v2, v2, v3756; CHECK-P8-NEXT: xxswapd vs0, v2757; CHECK-P8-NEXT: stxvd2x vs0, 0, r7758; CHECK-P8-NEXT: blr759;760; CHECK-P9-LABEL: swap_store50:761; CHECK-P9: # %bb.0:762; CHECK-P9-NEXT: stxvw4x v2, 0, r7763; CHECK-P9-NEXT: blr764;765; CHECK-P8-BE-LABEL: swap_store50:766; CHECK-P8-BE: # %bb.0:767; CHECK-P8-BE-NEXT: addis r3, r2, .LCPI21_0@toc@ha768; CHECK-P8-BE-NEXT: addi r3, r3, .LCPI21_0@toc@l769; CHECK-P8-BE-NEXT: lxvw4x v3, 0, r3770; CHECK-P8-BE-NEXT: vperm v2, v2, v2, v3771; CHECK-P8-BE-NEXT: stxvw4x v2, 0, r7772; CHECK-P8-BE-NEXT: blr773;774; CHECK-P9-BE-LABEL: swap_store50:775; CHECK-P9-BE: # %bb.0:776; CHECK-P9-BE-NEXT: addis r3, r2, .LCPI21_0@toc@ha777; CHECK-P9-BE-NEXT: addi r3, r3, .LCPI21_0@toc@l778; CHECK-P9-BE-NEXT: lxv vs0, 0(r3)779; CHECK-P9-BE-NEXT: xxperm v2, v2, vs0780; CHECK-P9-BE-NEXT: stxv v2, 0(r7)781; CHECK-P9-BE-NEXT: blr782 %v3 = shufflevector <4 x float> %v1, <4 x float> %v2, <4 x i32> <i32 3, i32 2, i32 1, i32 0>783 store <4 x float> %v3, ptr %vp784 ret void785}786 787define void @swap_store51(<4 x float> %v1, <4 x float> %v2, ptr %vp) {788; CHECK-P8-LABEL: swap_store51:789; CHECK-P8: # %bb.0:790; CHECK-P8-NEXT: addis r3, r2, .LCPI22_0@toc@ha791; CHECK-P8-NEXT: addi r3, r3, .LCPI22_0@toc@l792; CHECK-P8-NEXT: lxvd2x vs0, 0, r3793; CHECK-P8-NEXT: xxswapd v2, vs0794; CHECK-P8-NEXT: vperm v2, v3, v3, v2795; CHECK-P8-NEXT: xxswapd vs0, v2796; CHECK-P8-NEXT: stxvd2x vs0, 0, r7797; CHECK-P8-NEXT: blr798;799; CHECK-P9-LABEL: swap_store51:800; CHECK-P9: # %bb.0:801; CHECK-P9-NEXT: stxvw4x v3, 0, r7802; CHECK-P9-NEXT: blr803;804; CHECK-P8-BE-LABEL: swap_store51:805; CHECK-P8-BE: # %bb.0:806; CHECK-P8-BE-NEXT: addis r3, r2, .LCPI22_0@toc@ha807; CHECK-P8-BE-NEXT: addi r3, r3, .LCPI22_0@toc@l808; CHECK-P8-BE-NEXT: lxvw4x v2, 0, r3809; CHECK-P8-BE-NEXT: vperm v2, v3, v3, v2810; CHECK-P8-BE-NEXT: stxvw4x v2, 0, r7811; CHECK-P8-BE-NEXT: blr812;813; CHECK-P9-BE-LABEL: swap_store51:814; CHECK-P9-BE: # %bb.0:815; CHECK-P9-BE-NEXT: addis r3, r2, .LCPI22_0@toc@ha816; CHECK-P9-BE-NEXT: addi r3, r3, .LCPI22_0@toc@l817; CHECK-P9-BE-NEXT: lxv vs0, 0(r3)818; CHECK-P9-BE-NEXT: xxperm v3, v3, vs0819; CHECK-P9-BE-NEXT: stxv v3, 0(r7)820; CHECK-P9-BE-NEXT: blr821 %v3 = shufflevector <4 x float> %v1, <4 x float> %v2, <4 x i32> <i32 7, i32 6, i32 5, i32 4>822 store <4 x float> %v3, ptr %vp823 ret void824}825