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1; Test the loop alignment.2; RUN: llc -verify-machineinstrs -mcpu=a2 -mtriple powerpc64le-unknown-linux-gnu < %s | FileCheck %s -check-prefixes=CHECK,GENERIC3; RUN: llc -verify-machineinstrs -mcpu=pwr8 -mtriple powerpc64le-unknown-linux-gnu < %s | FileCheck %s -check-prefixes=CHECK,PWR4; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mtriple powerpc64le-unknown-linux-gnu < %s | FileCheck %s -check-prefixes=CHECK,PWR5; RUN: llc -verify-machineinstrs -mcpu=pwr8 -mtriple powerpc64-unknown-linux-gnu < %s | FileCheck %s -check-prefixes=CHECK,PWR6; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mtriple powerpc64-unknown-linux-gnu < %s | FileCheck %s -check-prefixes=CHECK,PWR7 8; Test the loop alignment and the option -disable-ppc-innermost-loop-align32.9; RUN: llc -verify-machineinstrs -mcpu=a2 -disable-ppc-innermost-loop-align32 -mtriple powerpc64le-unknown-linux-gnu < %s | FileCheck %s -check-prefixes=CHECK,GENERIC-DISABLE-PPC-INNERMOST-LOOP-ALIGN3210; RUN: llc -verify-machineinstrs -mcpu=pwr8 -disable-ppc-innermost-loop-align32 -mtriple powerpc64le-unknown-linux-gnu < %s | FileCheck %s -check-prefixes=CHECK,PWR-DISABLE-PPC-INNERMOST-LOOP-ALIGN3211; RUN: llc -verify-machineinstrs -mcpu=pwr9 -disable-ppc-innermost-loop-align32 -mtriple powerpc64le-unknown-linux-gnu < %s | FileCheck %s -check-prefixes=CHECK,PWR-DISABLE-PPC-INNERMOST-LOOP-ALIGN3212; RUN: llc -verify-machineinstrs -mcpu=pwr8 -disable-ppc-innermost-loop-align32 -mtriple powerpc64-unknown-linux-gnu < %s | FileCheck %s -check-prefixes=CHECK,PWR-DISABLE-PPC-INNERMOST-LOOP-ALIGN3213; RUN: llc -verify-machineinstrs -mcpu=pwr9 -disable-ppc-innermost-loop-align32 -mtriple powerpc64-unknown-linux-gnu < %s | FileCheck %s -check-prefixes=CHECK,PWR-DISABLE-PPC-INNERMOST-LOOP-ALIGN3214 15 16%struct.parm = type { ptr, i32, i32 }17 18; Test the loop alignment when the innermost hot loop has more than 8 instructions.19define void @big_loop(ptr %arg) {20entry:21 %localArg.sroa.0.0.copyload = load ptr, ptr %arg, align 822 %localArg.sroa.4.0..sroa_idx56 = getelementptr inbounds %struct.parm, ptr %arg, i64 0, i32 123 %localArg.sroa.4.0.copyload = load i32, ptr %localArg.sroa.4.0..sroa_idx56, align 824 %localArg.sroa.5.0..sroa_idx58 = getelementptr inbounds %struct.parm, ptr %arg, i64 0, i32 225 %localArg.sroa.5.0.copyload = load i32, ptr %localArg.sroa.5.0..sroa_idx58, align 426 %0 = sext i32 %localArg.sroa.5.0.copyload to i6427 br label %do.body28 29do.body: ; preds = %do.end, %entry30 %m.0 = phi i32 [ %localArg.sroa.4.0.copyload, %entry ], [ %dec24, %do.end ]31 br label %do.body332 33do.body3: ; preds = %do.body3, %do.body34 %indvars.iv = phi i64 [ %indvars.iv.next, %do.body3 ], [ %0, %do.body ]35 %1 = add nsw i64 %indvars.iv, 236 %arrayidx = getelementptr inbounds i32, ptr %localArg.sroa.0.0.copyload, i64 %137 %2 = add nsw i64 %indvars.iv, 338 %3 = trunc i64 %1 to i3239 %4 = add nsw i64 %indvars.iv, 440 %arrayidx10 = getelementptr inbounds i32, ptr %localArg.sroa.0.0.copyload, i64 %241 %5 = trunc i64 %2 to i3242 store i32 %5, ptr %arrayidx10, align 443 %arrayidx12 = getelementptr inbounds i32, ptr %localArg.sroa.0.0.copyload, i64 %444 %6 = trunc i64 %4 to i3245 store i32 %6, ptr %arrayidx12, align 446 store i32 %3, ptr %arrayidx, align 447 %arrayidx21 = getelementptr inbounds i32, ptr %localArg.sroa.0.0.copyload, i64 %indvars.iv48 %7 = trunc i64 %indvars.iv to i3249 %8 = add i32 %7, 150 store i32 %8, ptr %arrayidx21, align 451 %indvars.iv.next = add nsw i64 %indvars.iv, -152 %9 = icmp eq i64 %indvars.iv, 053 br i1 %9, label %do.end, label %do.body354 55do.end: ; preds = %do.body356 %dec24 = add nsw i32 %m.0, -157 %tobool25 = icmp eq i32 %m.0, 058 br i1 %tobool25, label %do.end26, label %do.body59 60do.end26: ; preds = %do.end61 %arrayidx28 = getelementptr inbounds i32, ptr %localArg.sroa.0.0.copyload, i64 %062 store i32 0, ptr %arrayidx28, align 463 ret void64 65 66; CHECK-LABEL: @big_loop67; CHECK: mtctr 68; GENERIC: .p2align 469; PWR: .p2align 570; GENERIC-DISABLE-PPC-INNERMOST-LOOP-ALIGN32: .p2align 471; PWR-DISABLE-PPC-INNERMOST-LOOP-ALIGN32: .p2align 4 72; CHECK: bdnz 73}74 75; Test the loop alignment when the innermost hot loop has 5-8 instructions.76define void @general_loop(ptr %s, i64 %m) {77entry:78 %tobool40 = icmp eq i64 %m, 079 br i1 %tobool40, label %while.end18, label %while.body3.lr.ph80 81while.cond.loopexit: ; preds = %while.body382 %tobool = icmp eq i64 %dec, 083 br i1 %tobool, label %while.end18, label %while.body3.lr.ph84 85while.body3.lr.ph: ; preds = %entry, %while.cond.loopexit86 %m.addr.041 = phi i64 [ %dec, %while.cond.loopexit ], [ %m, %entry ]87 %dec = add nsw i64 %m.addr.041, -188 %conv = trunc i64 %m.addr.041 to i3289 %conv11 = trunc i64 %dec to i3290 br label %while.body391 92while.body3: ; preds = %while.body3.lr.ph, %while.body393 %n.039 = phi i64 [ %m.addr.041, %while.body3.lr.ph ], [ %dec16, %while.body3 ]94 %inc = add nsw i64 %n.039, 195 %arrayidx = getelementptr inbounds i32, ptr %s, i64 %n.03996 %inc5 = add nsw i64 %n.039, 297 %arrayidx6 = getelementptr inbounds i32, ptr %s, i64 %inc98 %sub = sub nsw i64 %dec, %inc599 %conv7 = trunc i64 %sub to i32100 %arrayidx9 = getelementptr inbounds i32, ptr %s, i64 %inc5101 store i32 %conv7, ptr %arrayidx9, align 4102 store i32 %conv11, ptr %arrayidx6, align 4103 store i32 %conv, ptr %arrayidx, align 4104 %dec16 = add nsw i64 %n.039, -1105 %tobool2 = icmp eq i64 %dec16, 0106 br i1 %tobool2, label %while.cond.loopexit, label %while.body3107 108while.end18: ; preds = %while.cond.loopexit, %entry109 ret void110 111 112; CHECK-LABEL: @general_loop113; CHECK: mtctr 114; GENERIC: .p2align 4115; PWR: .p2align 5116; GENERIC-DISABLE-PPC-INNERMOST-LOOP-ALIGN32: .p2align 4117; PWR-DISABLE-PPC-INNERMOST-LOOP-ALIGN32: .p2align 5 118; CHECK: bdnz119}120 121; Test the small loop alignment when the innermost hot loop has less than 4 instructions.122define void @small_loop(i64 %m) {123entry:124 br label %do.body125 126do.body: ; preds = %do.end, %entry127 %m.addr.0 = phi i64 [ %m, %entry ], [ %1, %do.end ]128 br label %do.body1129 130do.body1: ; preds = %do.body1, %do.body131 %n.0 = phi i64 [ %m.addr.0, %do.body ], [ %0, %do.body1 ]132 %0 = tail call i64 asm "subi $0,$0,1", "=r,0"(i64 %n.0)133 %tobool = icmp eq i64 %0, 0134 br i1 %tobool, label %do.end, label %do.body1135 136do.end: ; preds = %do.body1137 %1 = tail call i64 asm "subi $1,$1,1", "=r,0"(i64 %m.addr.0)138 %tobool3 = icmp eq i64 %1, 0139 br i1 %tobool3, label %do.end4, label %do.body140 141do.end4: ; preds = %do.end142 ret void143 144 145; CHECK-LABEL: @small_loop146; CHECK: mr 147; GENERIC: .p2align 4148; PWR: .p2align 5149; GENERIC-DISABLE-PPC-INNERMOST-LOOP-ALIGN32: .p2align 4150; PWR-DISABLE-PPC-INNERMOST-LOOP-ALIGN32: .p2align 4 151; CHECK: bne152}153 154; Test the loop alignment when the innermost cold loop has more than 8 instructions.155define void @big_loop_cold_innerloop(ptr %arg) {156entry:157 %localArg.sroa.0.0.copyload = load ptr, ptr %arg, align 8158 %localArg.sroa.4.0..sroa_idx56 = getelementptr inbounds %struct.parm, ptr %arg, i64 0, i32 1159 %localArg.sroa.4.0.copyload = load i32, ptr %localArg.sroa.4.0..sroa_idx56, align 8160 %localArg.sroa.5.0..sroa_idx58 = getelementptr inbounds %struct.parm, ptr %arg, i64 0, i32 2161 %localArg.sroa.5.0.copyload = load i32, ptr %localArg.sroa.5.0..sroa_idx58, align 4162 %0 = sext i32 %localArg.sroa.5.0.copyload to i64163 br label %do.body164 165do.body: ; preds = %do.end, %entry166 %m.0 = phi i32 [ %localArg.sroa.4.0.copyload, %entry ], [ %dec24, %do.end ]167 br label %do.body3168 169do.body3: ; preds = %do.body3, %do.body170 %indvars.iv = phi i64 [ %indvars.iv.next, %do.body3 ], [ %0, %do.body ]171 %1 = add nsw i64 %indvars.iv, 2172 %arrayidx = getelementptr inbounds i32, ptr %localArg.sroa.0.0.copyload, i64 %1173 %2 = add nsw i64 %indvars.iv, 3174 %3 = trunc i64 %1 to i32175 %4 = add nsw i64 %indvars.iv, 4176 %arrayidx10 = getelementptr inbounds i32, ptr %localArg.sroa.0.0.copyload, i64 %2177 %5 = trunc i64 %2 to i32178 store i32 %5, ptr %arrayidx10, align 4179 %arrayidx12 = getelementptr inbounds i32, ptr %localArg.sroa.0.0.copyload, i64 %4180 %6 = trunc i64 %4 to i32181 store i32 %6, ptr %arrayidx12, align 4182 store i32 %3, ptr %arrayidx, align 4183 %arrayidx21 = getelementptr inbounds i32, ptr %localArg.sroa.0.0.copyload, i64 %indvars.iv184 %7 = trunc i64 %indvars.iv to i32185 %8 = add i32 %7, 1186 store i32 %8, ptr %arrayidx21, align 4187 %indvars.iv.next = add nsw i64 %indvars.iv, -1188 %9 = icmp eq i64 %indvars.iv, 0189 br i1 %9, label %do.end, label %do.body3190 191do.end: ; preds = %do.body3192 %dec24 = add nsw i32 %m.0, -1193 %tobool25 = icmp eq i32 %m.0, 0194 br i1 %tobool25, label %do.end26, label %do.body195 196do.end26: ; preds = %do.end197 %arrayidx28 = getelementptr inbounds i32, ptr %localArg.sroa.0.0.copyload, i64 %0198 store i32 0, ptr %arrayidx28, align 4199 ret void200 201 202; CHECK-LABEL: @big_loop_cold_innerloop203; CHECK: mtctr 204; PWR: .p2align 5205; CHECK-NOT: .p2align 5206; CHECK: bdnz 207}208