672 lines · plain
1; RUN: llc -verify-machineinstrs -mcpu=pwr10 < %s -mtriple=powerpc64le-unknown-linux-gnu | FileCheck -check-prefixes=CHECK-PWR9,CHECK-ALL %s 2; RUN: llc -verify-machineinstrs -mcpu=pwr9 < %s -mtriple=powerpc64le-unknown-linux-gnu | FileCheck -check-prefixes=CHECK-PWR9,CHECK-ALL %s 3; RUN: llc -verify-machineinstrs -mcpu=pwr8 < %s -mtriple=powerpc64le-unknown-linux-gnu | FileCheck -check-prefixes=CHECK-PWR8,CHECK-ALL %s 4; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64le-unknown-linux-gnu | FileCheck -check-prefixes=CHECK-PWR8,CHECK-ALL %s 5; RUN: llc -verify-machineinstrs -mcpu=pwr10 < %s -mtriple=powerpc-ibm-aix-xcoff | FileCheck -check-prefixes=CHECK-PWR10,CHECK-ALL %s 6; RUN: llc -verify-machineinstrs -mcpu=pwr9 < %s -mtriple=powerpc-ibm-aix-xcoff | FileCheck -check-prefixes=CHECK-PWR9,CHECK-ALL %s 7; RUN: llc -verify-machineinstrs -mcpu=pwr8 < %s -mtriple=powerpc-ibm-aix-xcoff | FileCheck -check-prefixes=CHECK-PWR8,CHECK-ALL %s 8; RUN: llc -verify-machineinstrs -mcpu=pwr7 < %s -mtriple=powerpc-ibm-aix-xcoff | FileCheck -check-prefixes=CHECK-PWR7,CHECK-ALL %s 9; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-ibm-aix-xcoff | FileCheck -check-prefixes=CHECK-PWR7,CHECK-ALL %s 10 11declare <2 x double> @__cbrtd2(<2 x double>)12declare <4 x float> @__cbrtf4(<4 x float>)13 14declare <2 x double> @__powd2(<2 x double>, <2 x double>)15declare <4 x float> @__powf4(<4 x float>, <4 x float>)16 17declare <2 x double> @__expd2(<2 x double>)18declare <4 x float> @__expf4(<4 x float>)19 20declare <2 x double> @__exp2d2(<2 x double>)21declare <4 x float> @__exp2f4(<4 x float>)22 23declare <2 x double> @__expm1d2(<2 x double>)24declare <4 x float> @__expm1f4(<4 x float>)25 26declare <2 x double> @__logd2(<2 x double>)27declare <4 x float> @__logf4(<4 x float>)28 29declare <2 x double> @__log1pd2(<2 x double>)30declare <4 x float> @__log1pf4(<4 x float>)31 32declare <2 x double> @__log10d2(<2 x double>)33declare <4 x float> @__log10f4(<4 x float>)34 35declare <2 x double> @__log2d2(<2 x double>)36declare <4 x float> @__log2f4(<4 x float>)37 38declare <2 x double> @__sind2(<2 x double>)39declare <4 x float> @__sinf4(<4 x float>)40 41declare <2 x double> @__cosd2(<2 x double>)42declare <4 x float> @__cosf4(<4 x float>)43 44declare <2 x double> @__tand2(<2 x double>)45declare <4 x float> @__tanf4(<4 x float>)46 47declare <2 x double> @__asind2(<2 x double>)48declare <4 x float> @__asinf4(<4 x float>)49 50declare <2 x double> @__acosd2(<2 x double>)51declare <4 x float> @__acosf4(<4 x float>)52 53declare <2 x double> @__atand2(<2 x double>)54declare <4 x float> @__atanf4(<4 x float>)55 56declare <2 x double> @__atan2d2(<2 x double>)57declare <4 x float> @__atan2f4(<4 x float>)58 59declare <2 x double> @__sinhd2(<2 x double>)60declare <4 x float> @__sinhf4(<4 x float>)61 62declare <2 x double> @__coshd2(<2 x double>)63declare <4 x float> @__coshf4(<4 x float>)64 65declare <2 x double> @__tanhd2(<2 x double>)66declare <4 x float> @__tanhf4(<4 x float>)67 68declare <2 x double> @__asinhd2(<2 x double>)69declare <4 x float> @__asinhf4(<4 x float>)70 71declare <2 x double> @__acoshd2(<2 x double>)72declare <4 x float> @__acoshf4(<4 x float>)73 74declare <2 x double> @__atanhd2(<2 x double>)75declare <4 x float> @__atanhf4(<4 x float>)76 77; following tests check generation of subtarget-specific calls78; cbrt79define <2 x double> @cbrt_f64_massv(<2 x double> %opnd) {80; CHECK-ALL-LABEL: @cbrt_f64_massv81; CHECK-PWR10: __cbrtd2_P1082; CHECK-PWR9: __cbrtd2_P983; CHECK-PWR8: __cbrtd2_P884; CHECK-PWR7: __cbrtd2_P785; CHECK-NOT: __cbrtd2_massv86; CHECK-ALL: blr87;88 %1 = call <2 x double> @__cbrtd2(<2 x double> %opnd)89 ret <2 x double> %1 90}91 92define <4 x float> @cbrt_f32_massv(<4 x float> %opnd) {93; CHECK-ALL-LABEL: @cbrt_f32_massv94; CHECK-PWR10: __cbrtf4_P1095; CHECK-PWR9: __cbrtf4_P996; CHECK-PWR8: __cbrtf4_P897; CHECK-PWR7: __cbrtf4_P798; CHECK-NOT: __cbrtf4_massv99; CHECK-ALL: blr100;101 %1 = call <4 x float> @__cbrtf4(<4 x float> %opnd)102 ret <4 x float> %1 103}104 105; pow106define <2 x double> @pow_f64_massv(<2 x double> %opnd1, <2 x double> %opnd2) {107; CHECK-ALL-LABEL: @pow_f64_massv108; CHECK-PWR10: __powd2_P10109; CHECK-PWR9: __powd2_P9110; CHECK-PWR8: __powd2_P8111; CHECK-PWR7: __powd2_P7112; CHECK-NOT: __powd2_massv113; CHECK-ALL: blr114;115 %1 = call <2 x double> @__powd2(<2 x double> %opnd1, <2 x double> %opnd2)116 ret <2 x double> %1 117}118 119define <4 x float> @pow_f32_massv(<4 x float> %opnd1, <4 x float> %opnd2) {120; CHECK-ALL-LABEL: @pow_f32_massv121; CHECK-PWR10: __powf4_P10122; CHECK-PWR9: __powf4_P9123; CHECK-PWR8: __powf4_P8124; CHECK-PWR7: __powf4_P7125; CHECK-NOT: __powf4_massv126; CHECK-ALL: blr127;128 %1 = call <4 x float> @__powf4(<4 x float> %opnd1, <4 x float> %opnd2)129 ret <4 x float> %1 130}131 132; exp133define <2 x double> @exp_f64_massv(<2 x double> %opnd) {134; CHECK-ALL-LABEL: @exp_f64_massv135; CHECK-PWR10: __expd2_P10136; CHECK-PWR9: __expd2_P9137; CHECK-PWR8: __expd2_P8138; CHECK-PWR7: __expd2_P7139; CHECK-NOT: __expd2_massv140; CHECK-ALL: blr141;142 %1 = call <2 x double> @__expd2(<2 x double> %opnd)143 ret <2 x double> %1 144}145 146define <4 x float> @exp_f32_massv(<4 x float> %opnd) {147; CHECK-ALL-LABEL: @exp_f32_massv148; CHECK-PWR10: __expf4_P10149; CHECK-PWR9: __expf4_P9150; CHECK-PWR8: __expf4_P8151; CHECK-PWR7: __expf4_P7152; CHECK-NOT: __expf4_massv153; CHECK-ALL: blr154;155 %1 = call <4 x float> @__expf4(<4 x float> %opnd)156 ret <4 x float> %1 157}158 159; exp2160define <2 x double> @exp2_f64_massv(<2 x double> %opnd) {161; CHECK-ALL-LABEL: @exp2_f64_massv162; CHECK-PWR10: __exp2d2_P10163; CHECK-PWR9: __exp2d2_P9164; CHECK-PWR8: __exp2d2_P8165; CHECK-PWR7: __exp2d2_P7166; CHECK-NOT: __exp2d2_massv167; CHECK-ALL: blr168;169 %1 = call <2 x double> @__exp2d2(<2 x double> %opnd)170 ret <2 x double> %1 171}172 173define <4 x float> @exp2_f32_massv(<4 x float> %opnd) {174; CHECK-ALL-LABEL: @exp2_f32_massv175; CHECK-PWR10: __exp2f4_P10176; CHECK-PWR9: __exp2f4_P9177; CHECK-PWR8: __exp2f4_P8178; CHECK-PWR7: __exp2f4_P7179; CHECK-NOT: __exp2f4_massv180; CHECK-ALL: blr181;182 %1 = call <4 x float> @__exp2f4(<4 x float> %opnd)183 ret <4 x float> %1 184}185 186; expm1187define <2 x double> @expm1_f64_massv(<2 x double> %opnd) {188; CHECK-ALL-LABEL: @expm1_f64_massv189; CHECK-PWR10: __expm1d2_P10190; CHECK-PWR9: __expm1d2_P9191; CHECK-PWR8: __expm1d2_P8192; CHECK-PWR7: __expm1d2_P7193; CHECK-NOT: __expm1d2_massv194; CHECK-ALL: blr195;196 %1 = call <2 x double> @__expm1d2(<2 x double> %opnd)197 ret <2 x double> %1 198}199 200define <4 x float> @expm1_f32_massv(<4 x float> %opnd) {201; CHECK-ALL-LABEL: @expm1_f32_massv202; CHECK-PWR10: __expm1f4_P10203; CHECK-PWR9: __expm1f4_P9204; CHECK-PWR8: __expm1f4_P8205; CHECK-PWR7: __expm1f4_P7206; CHECK-NOT: __expm1f4_massv207; CHECK-ALL: blr208;209 %1 = call <4 x float> @__expm1f4(<4 x float> %opnd)210 ret <4 x float> %1 211}212 213; log214define <2 x double> @log_f64_massv(<2 x double> %opnd) {215; CHECK-ALL-LABEL: @log_f64_massv216; CHECK-PWR10: __logd2_P10217; CHECK-PWR9: __logd2_P9218; CHECK-PWR8: __logd2_P8219; CHECK-PWR7: __logd2_P7220; CHECK-NOT: __logd2_massv221; CHECK-ALL: blr222;223 %1 = call <2 x double> @__logd2(<2 x double> %opnd)224 ret <2 x double> %1 225}226 227define <4 x float> @log_f32_massv(<4 x float> %opnd) {228; CHECK-ALL-LABEL: @log_f32_massv229; CHECK-PWR10: __logf4_P10230; CHECK-PWR9: __logf4_P9231; CHECK-PWR8: __logf4_P8232; CHECK-PWR7: __logf4_P7233; CHECK-NOT: __logf4_massv234; CHECK-ALL: blr235;236 %1 = call <4 x float> @__logf4(<4 x float> %opnd)237 ret <4 x float> %1 238}239 240; log1p241define <2 x double> @log1p_f64_massv(<2 x double> %opnd) {242; CHECK-ALL-LABEL: @log1p_f64_massv243; CHECK-PWR10: __log1pd2_P10244; CHECK-PWR9: __log1pd2_P9245; CHECK-PWR8: __log1pd2_P8246; CHECK-PWR7: __log1pd2_P7247; CHECK-NOT: __log1pd2_massv248; CHECK-ALL: blr249;250 %1 = call <2 x double> @__log1pd2(<2 x double> %opnd)251 ret <2 x double> %1 252}253 254define <4 x float> @log1p_f32_massv(<4 x float> %opnd) {255; CHECK-ALL-LABEL: @log1p_f32_massv256; CHECK-PWR10: __log1pf4_P10257; CHECK-PWR9: __log1pf4_P9258; CHECK-PWR8: __log1pf4_P8259; CHECK-PWR7: __log1pf4_P7260; CHECK-NOT: __log1pf4_massv261; CHECK-ALL: blr262;263 %1 = call <4 x float> @__log1pf4(<4 x float> %opnd)264 ret <4 x float> %1 265}266 267; log10268define <2 x double> @log10_f64_massv(<2 x double> %opnd) {269; CHECK-ALL-LABEL: @log10_f64_massv270; CHECK-PWR10: __log10d2_P10271; CHECK-PWR9: __log10d2_P9272; CHECK-PWR8: __log10d2_P8273; CHECK-PWR7: __log10d2_P7274; CHECK-NOT: __log10d2_massv275; CHECK-ALL: blr276;277 %1 = call <2 x double> @__log10d2(<2 x double> %opnd)278 ret <2 x double> %1 279}280 281define <4 x float> @log10_f32_massv(<4 x float> %opnd) {282; CHECK-ALL-LABEL: @log10_f32_massv283; CHECK-PWR10: __log10f4_P10284; CHECK-PWR9: __log10f4_P9285; CHECK-PWR8: __log10f4_P8286; CHECK-PWR7: __log10f4_P7287; CHECK-NOT: __log10f4_massv288; CHECK-ALL: blr289;290 %1 = call <4 x float> @__log10f4(<4 x float> %opnd)291 ret <4 x float> %1 292}293 294; log2295define <2 x double> @log2_f64_massv(<2 x double> %opnd) {296; CHECK-ALL-LABEL: @log2_f64_massv297; CHECK-PWR10: __log2d2_P10298; CHECK-PWR9: __log2d2_P9299; CHECK-PWR8: __log2d2_P8300; CHECK-PWR7: __log2d2_P7301; CHECK-NOT: __log2d2_massv302; CHECK-ALL: blr303;304 %1 = call <2 x double> @__log2d2(<2 x double> %opnd)305 ret <2 x double> %1 306}307 308define <4 x float> @log2_f32_massv(<4 x float> %opnd) {309; CHECK-ALL-LABEL: @log2_f32_massv310; CHECK-PWR10: __log2f4_P10311; CHECK-PWR9: __log2f4_P9312; CHECK-PWR8: __log2f4_P8313; CHECK-PWR7: __log2f4_P7314; CHECK-NOT: __log2f4_massv315; CHECK-ALL: blr316;317 %1 = call <4 x float> @__log2f4(<4 x float> %opnd)318 ret <4 x float> %1 319}320 321; sin322define <2 x double> @sin_f64_massv(<2 x double> %opnd) {323; CHECK-ALL-LABEL: @sin_f64_massv324; CHECK-PWR10: __sind2_P10325; CHECK-PWR9: __sind2_P9326; CHECK-PWR8: __sind2_P8327; CHECK-PWR7: __sind2_P7328; CHECK-NOT: __sind2_massv329; CHECK-ALL: blr330;331 %1 = call <2 x double> @__sind2(<2 x double> %opnd)332 ret <2 x double> %1 333}334 335define <4 x float> @sin_f32_massv(<4 x float> %opnd) {336; CHECK-ALL-LABEL: @sin_f32_massv337; CHECK-PWR10: __sinf4_P10338; CHECK-PWR9: __sinf4_P9339; CHECK-PWR8: __sinf4_P8340; CHECK-PWR7: __sinf4_P7341; CHECK-NOT: __sinf4_massv342; CHECK-ALL: blr343;344 %1 = call <4 x float> @__sinf4(<4 x float> %opnd)345 ret <4 x float> %1 346}347 348; cos349define <2 x double> @cos_f64_massv(<2 x double> %opnd) {350; CHECK-ALL-LABEL: @cos_f64_massv351; CHECK-PWR10: __cosd2_P10352; CHECK-PWR9: __cosd2_P9353; CHECK-PWR8: __cosd2_P8354; CHECK-PWR7: __cosd2_P7355; CHECK-NOT: __cosd2_massv356; CHECK-ALL: blr357;358 %1 = call <2 x double> @__cosd2(<2 x double> %opnd)359 ret <2 x double> %1 360}361 362define <4 x float> @cos_f32_massv(<4 x float> %opnd) {363; CHECK-ALL-LABEL: @cos_f32_massv364; CHECK-PWR10: __cosf4_P10365; CHECK-PWR9: __cosf4_P9366; CHECK-PWR8: __cosf4_P8367; CHECK-PWR7: __cosf4_P7368; CHECK-NOT: __cosf4_massv369; CHECK-ALL: blr370;371 %1 = call <4 x float> @__cosf4(<4 x float> %opnd)372 ret <4 x float> %1 373}374 375; tan376define <2 x double> @tan_f64_massv(<2 x double> %opnd) {377; CHECK-ALL-LABEL: @tan_f64_massv378; CHECK-PWR10: __tand2_P10379; CHECK-PWR9: __tand2_P9380; CHECK-PWR8: __tand2_P8381; CHECK-PWR7: __tand2_P7382; CHECK-NOT: __tand2_massv383; CHECK-ALL: blr384;385 %1 = call <2 x double> @__tand2(<2 x double> %opnd)386 ret <2 x double> %1 387}388 389define <4 x float> @tan_f32_massv(<4 x float> %opnd) {390; CHECK-ALL-LABEL: @tan_f32_massv391; CHECK-PWR10: __tanf4_P10392; CHECK-PWR9: __tanf4_P9393; CHECK-PWR8: __tanf4_P8394; CHECK-PWR7: __tanf4_P7395; CHECK-NOT: __tanf4_massv396; CHECK-ALL: blr397;398 %1 = call <4 x float> @__tanf4(<4 x float> %opnd)399 ret <4 x float> %1 400}401 402; asin403define <2 x double> @asin_f64_massv(<2 x double> %opnd) {404; CHECK-ALL-LABEL: @asin_f64_massv405; CHECK-PWR10: __asind2_P10406; CHECK-PWR9: __asind2_P9407; CHECK-PWR8: __asind2_P8408; CHECK-PWR7: __asind2_P7409; CHECK-NOT: __asind2_massv410; CHECK-ALL: blr411;412 %1 = call <2 x double> @__asind2(<2 x double> %opnd)413 ret <2 x double> %1 414}415 416define <4 x float> @asin_f32_massv(<4 x float> %opnd) {417; CHECK-ALL-LABEL: @asin_f32_massv418; CHECK-PWR10: __asinf4_P10419; CHECK-PWR9: __asinf4_P9420; CHECK-PWR8: __asinf4_P8421; CHECK-PWR7: __asinf4_P7422; CHECK-NOT: __asinf4_massv423; CHECK-ALL: blr424;425 %1 = call <4 x float> @__asinf4(<4 x float> %opnd)426 ret <4 x float> %1 427}428 429; acos430define <2 x double> @acos_f64_massv(<2 x double> %opnd) {431; CHECK-ALL-LABEL: @acos_f64_massv432; CHECK-PWR10: __acosd2_P10433; CHECK-PWR9: __acosd2_P9434; CHECK-PWR8: __acosd2_P8435; CHECK-PWR7: __acosd2_P7436; CHECK-NOT: __acosd2_massv437; CHECK-ALL: blr438;439 %1 = call <2 x double> @__acosd2(<2 x double> %opnd)440 ret <2 x double> %1 441}442 443define <4 x float> @acos_f32_massv(<4 x float> %opnd) {444; CHECK-ALL-LABEL: @acos_f32_massv445; CHECK-PWR10: __acosf4_P10446; CHECK-PWR9: __acosf4_P9447; CHECK-PWR8: __acosf4_P8448; CHECK-PWR7: __acosf4_P7449; CHECK-NOT: __acosf4_massv450; CHECK-ALL: blr451;452 %1 = call <4 x float> @__acosf4(<4 x float> %opnd)453 ret <4 x float> %1 454}455 456; atan457define <2 x double> @atan_f64_massv(<2 x double> %opnd) {458; CHECK-ALL-LABEL: @atan_f64_massv459; CHECK-PWR10: __atand2_P10460; CHECK-PWR9: __atand2_P9461; CHECK-PWR8: __atand2_P8462; CHECK-PWR7: __atand2_P7463; CHECK-NOT: __atand2_massv464; CHECK-ALL: blr465;466 %1 = call <2 x double> @__atand2(<2 x double> %opnd)467 ret <2 x double> %1 468}469 470define <4 x float> @atan_f32_massv(<4 x float> %opnd) {471; CHECK-ALL-LABEL: @atan_f32_massv472; CHECK-PWR10: __atanf4_P10473; CHECK-PWR9: __atanf4_P9474; CHECK-PWR8: __atanf4_P8475; CHECK-PWR7: __atanf4_P7476; CHECK-NOT: __atanf4_massv477; CHECK-ALL: blr478;479 %1 = call <4 x float> @__atanf4(<4 x float> %opnd)480 ret <4 x float> %1 481}482 483; atan2484define <2 x double> @atan2_f64_massv(<2 x double> %opnd) {485; CHECK-ALL-LABEL: @atan2_f64_massv486; CHECK-PWR10: __atan2d2_P10487; CHECK-PWR9: __atan2d2_P9488; CHECK-PWR8: __atan2d2_P8489; CHECK-PWR7: __atan2d2_P7490; CHECK-NOT: __atan2d2_massv491; CHECK-ALL: blr492;493 %1 = call <2 x double> @__atan2d2(<2 x double> %opnd)494 ret <2 x double> %1 495}496 497define <4 x float> @atan2_f32_massv(<4 x float> %opnd) {498; CHECK-ALL-LABEL: @atan2_f32_massv499; CHECK-PWR10: __atan2f4_P10500; CHECK-PWR9: __atan2f4_P9501; CHECK-PWR8: __atan2f4_P8502; CHECK-PWR7: __atan2f4_P7503; CHECK-NOT: __atan2f4_massv504; CHECK-ALL: blr505;506 %1 = call <4 x float> @__atan2f4(<4 x float> %opnd)507 ret <4 x float> %1 508}509 510; sinh511define <2 x double> @sinh_f64_massv(<2 x double> %opnd) {512; CHECK-ALL-LABEL: @sinh_f64_massv513; CHECK-PWR10: __sinhd2_P10514; CHECK-PWR9: __sinhd2_P9515; CHECK-PWR8: __sinhd2_P8516; CHECK-PWR7: __sinhd2_P7517; CHECK-NOT: __sinhd2_massv518; CHECK-ALL: blr519;520 %1 = call <2 x double> @__sinhd2(<2 x double> %opnd)521 ret <2 x double> %1 522}523 524define <4 x float> @sinh_f32_massv(<4 x float> %opnd) {525; CHECK-ALL-LABEL: @sinh_f32_massv526; CHECK-PWR10: __sinhf4_P10527; CHECK-PWR9: __sinhf4_P9528; CHECK-PWR8: __sinhf4_P8529; CHECK-PWR7: __sinhf4_P7530; CHECK-NOT: __sinhf4_massv531; CHECK-ALL: blr532;533 %1 = call <4 x float> @__sinhf4(<4 x float> %opnd)534 ret <4 x float> %1 535}536 537; cosh538define <2 x double> @cosh_f64_massv(<2 x double> %opnd) {539; CHECK-ALL-LABEL: @cosh_f64_massv540; CHECK-PWR10: __coshd2_P10541; CHECK-PWR9: __coshd2_P9542; CHECK-PWR8: __coshd2_P8543; CHECK-PWR7: __coshd2_P7544; CHECK-NOT: __coshd2_massv545; CHECK-ALL: blr546;547 %1 = call <2 x double> @__coshd2(<2 x double> %opnd)548 ret <2 x double> %1 549}550 551define <4 x float> @cosh_f32_massv(<4 x float> %opnd) {552; CHECK-ALL-LABEL: @cosh_f32_massv553; CHECK-PWR10: __coshf4_P10554; CHECK-PWR9: __coshf4_P9555; CHECK-PWR8: __coshf4_P8556; CHECK-PWR7: __coshf4_P7557; CHECK-NOT: __coshf4_massv558; CHECK-ALL: blr559;560 %1 = call <4 x float> @__coshf4(<4 x float> %opnd)561 ret <4 x float> %1 562}563 564; tanh565define <2 x double> @tanh_f64_massv(<2 x double> %opnd) {566; CHECK-ALL-LABEL: @tanh_f64_massv567; CHECK-PWR10: __tanhd2_P10568; CHECK-PWR9: __tanhd2_P9569; CHECK-PWR8: __tanhd2_P8570; CHECK-PWR7: __tanhd2_P7571; CHECK-NOT: __tanhd2_massv572; CHECK-ALL: blr573;574 %1 = call <2 x double> @__tanhd2(<2 x double> %opnd)575 ret <2 x double> %1 576}577 578define <4 x float> @tanh_f32_massv(<4 x float> %opnd) {579; CHECK-ALL-LABEL: @tanh_f32_massv580; CHECK-PWR10: __tanhf4_P10581; CHECK-PWR9: __tanhf4_P9582; CHECK-PWR8: __tanhf4_P8583; CHECK-PWR7: __tanhf4_P7584; CHECK-NOT: __tanhf4_massv585; CHECK-ALL: blr586;587 %1 = call <4 x float> @__tanhf4(<4 x float> %opnd)588 ret <4 x float> %1 589}590 591; asinh592define <2 x double> @asinh_f64_massv(<2 x double> %opnd) {593; CHECK-ALL-LABEL: @asinh_f64_massv594; CHECK-PWR10: __asinhd2_P10595; CHECK-PWR9: __asinhd2_P9596; CHECK-PWR8: __asinhd2_P8597; CHECK-PWR7: __asinhd2_P7598; CHECK-NOT: __asinhd2_massv599; CHECK-ALL: blr600;601 %1 = call <2 x double> @__asinhd2(<2 x double> %opnd)602 ret <2 x double> %1 603}604 605define <4 x float> @asinh_f32_massv(<4 x float> %opnd) {606; CHECK-ALL-LABEL: @asinh_f32_massv607; CHECK-PWR10: __asinhf4_P10608; CHECK-PWR9: __asinhf4_P9609; CHECK-PWR8: __asinhf4_P8610; CHECK-PWR7: __asinhf4_P7611; CHECK-NOT: __asinhf4_massv612; CHECK-ALL: blr613;614 %1 = call <4 x float> @__asinhf4(<4 x float> %opnd)615 ret <4 x float> %1 616}617 618; acosh619define <2 x double> @acosh_f64_massv(<2 x double> %opnd) {620; CHECK-ALL-LABEL: @acosh_f64_massv621; CHECK-PWR10: __acoshd2_P10622; CHECK-PWR9: __acoshd2_P9623; CHECK-PWR8: __acoshd2_P8624; CHECK-PWR7: __acoshd2_P7625; CHECK-NOT: __acoshd2_massv626; CHECK-ALL: blr627;628 %1 = call <2 x double> @__acoshd2(<2 x double> %opnd)629 ret <2 x double> %1 630}631 632define <4 x float> @acosh_f32_massv(<4 x float> %opnd) {633; CHECK-ALL-LABEL: @acosh_f32_massv634; CHECK-PWR10: __acoshf4_P10635; CHECK-PWR9: __acoshf4_P9636; CHECK-PWR8: __acoshf4_P8637; CHECK-PWR7: __acoshf4_P7638; CHECK-NOT: __acoshf4_massv639; CHECK-ALL: blr640;641 %1 = call <4 x float> @__acoshf4(<4 x float> %opnd)642 ret <4 x float> %1 643}644 645; atanh646define <2 x double> @atanh_f64_massv(<2 x double> %opnd) {647; CHECK-ALL-LABEL: @atanh_f64_massv648; CHECK-PWR10: __atanhd2_P10649; CHECK-PWR9: __atanhd2_P9650; CHECK-PWR8: __atanhd2_P8651; CHECK-PWR7: __atanhd2_P7652; CHECK-NOT: __atanhd2_massv653; CHECK-ALL: blr654;655 %1 = call <2 x double> @__atanhd2(<2 x double> %opnd)656 ret <2 x double> %1 657}658 659define <4 x float> @atanh_f32_massv(<4 x float> %opnd) {660; CHECK-ALL-LABEL: @atanh_f32_massv661; CHECK-PWR10: __atanhf4_P10662; CHECK-PWR9: __atanhf4_P9663; CHECK-PWR8: __atanhf4_P8664; CHECK-PWR7: __atanhf4_P7665; CHECK-NOT: __atanhf4_massv666; CHECK-ALL: blr667;668 %1 = call <4 x float> @__atanhf4(<4 x float> %opnd)669 ret <4 x float> %1 670}671 672