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1; RUN: llc -ppc-asm-full-reg-names -verify-machineinstrs < %s \2; RUN:   -mtriple=powerpc64le-unknown-linux-gnu | FileCheck %s -check-prefix=INST3; RUN: llc -ppc-asm-full-reg-names -verify-machineinstrs -ppc-lsr-no-insns-cost=true \4; RUN:   < %s -mtriple=powerpc64le-unknown-linux-gnu | FileCheck %s -check-prefix=REG5 6; void test(unsigned *a, unsigned *b, unsigned *c)7; {8;   for (unsigned long i = 0; i < 1024; i++)9;       c[i] = a[i] + b[i];10; }11;12; compile with -fno-unroll-loops13 14define void @lsr-insts-cost(ptr %0, ptr %1, ptr %2) {15; INST-LABEL: lsr-insts-cost16; INST:       .LBB0_4: # =>This Inner Loop Header: Depth=117; INST-NEXT:    lxvd2x vs34, r3, r618; INST-NEXT:    lxvd2x vs35, r4, r619; INST-NEXT:    vadduwm v2, v3, v220; INST-NEXT:    stxvd2x vs34, r5, r621; INST-NEXT:    addi r6, r6, 1622; INST-NEXT:    bdnz .LBB0_423;24; REG-LABEL: lsr-insts-cost25; REG:       .LBB0_4: # =>This Inner Loop Header: Depth=126; REG-NEXT:    lxvd2x vs34, 0, r327; REG-NEXT:    lxvd2x vs35, 0, r428; REG-NEXT:    addi r4, r4, 1629; REG-NEXT:    addi r3, r3, 1630; REG-NEXT:    vadduwm v2, v3, v231; REG-NEXT:    stxvd2x vs34, 0, r532; REG-NEXT:    addi r5, r5, 1633; REG-NEXT:    bdnz .LBB0_434  %4 = getelementptr i32, ptr %2, i64 102435  %5 = getelementptr i32, ptr %0, i64 102436  %6 = getelementptr i32, ptr %1, i64 102437  %7 = icmp ugt ptr %5, %238  %8 = icmp ugt ptr %4, %039  %9 = and i1 %7, %840  %10 = icmp ugt ptr %6, %241  %11 = icmp ugt ptr %4, %142  %12 = and i1 %10, %1143  %13 = or i1 %9, %1244  br i1 %13, label %28, label %1445 4614:                                               ; preds = %3, %1447  %15 = phi i64 [ %25, %14 ], [ 0, %3 ]48  %16 = getelementptr inbounds i32, ptr %0, i64 %1549  %17 = bitcast ptr %16 to ptr50  %18 = load <4 x i32>, ptr %17, align 451  %19 = getelementptr inbounds i32, ptr %1, i64 %1552  %20 = bitcast ptr %19 to ptr53  %21 = load <4 x i32>, ptr %20, align 454  %22 = add <4 x i32> %21, %1855  %23 = getelementptr inbounds i32, ptr %2, i64 %1556  %24 = bitcast ptr %23 to ptr57  store <4 x i32> %22, ptr %24, align 458  %25 = add i64 %15, 459  %26 = icmp eq i64 %25, 102460  br i1 %26, label %27, label %1461 6227:                                               ; preds = %14, %2863  ret void64 6528:                                               ; preds = %3, %2866  %29 = phi i64 [ %36, %28 ], [ 0, %3 ]67  %30 = getelementptr inbounds i32, ptr %0, i64 %2968  %31 = load i32, ptr %30, align 469  %32 = getelementptr inbounds i32, ptr %1, i64 %2970  %33 = load i32, ptr %32, align 471  %34 = add i32 %33, %3172  %35 = getelementptr inbounds i32, ptr %2, i64 %2973  store i32 %34, ptr %35, align 474  %36 = add nuw nsw i64 %29, 175  %37 = icmp eq i64 %36, 102476  br i1 %37, label %27, label %2877}78