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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52 3; RUN: llc -verify-machineinstrs -mcpu=pwr10 -mtriple=powerpc64le-unknown-unknown \4; RUN:   -ppc-asm-full-reg-names --ppc-vsr-nums-as-vr < %s | FileCheck %s --check-prefix=POWERPC64-LE-105 6; RUN: llc -verify-machineinstrs -mcpu=pwr10 -mtriple=powerpc64-unknown-unknown \7; RUN:   -ppc-asm-full-reg-names --ppc-vsr-nums-as-vr < %s | FileCheck %s --check-prefix=POWERPC64-BE-108 9; Test LXVKQ instruction generation for special vector constants matching 128 bit patterns:10; 0x8000_0000_0000_0000_0000_0000_0000_0000 (MSB set pattern)11; 0x0000_0000_0000_0000_0000_0000_0000_0001 (LSB set pattern)12 13; =============================================================================14; v2i64 tests - MSB set pattern (0x8000_0000_0000_0000_0000_0000_0000_0000)15; =============================================================================16 17; Big-Endian: 0x8000_0000_0000_0000_0000_0000_0000_0000 represents <-9223372036854775808, 0>18define dso_local noundef <2 x i64> @test_v2i64_msb_set_bigendian() local_unnamed_addr {19; POWERPC64-LE-10-LABEL: test_v2i64_msb_set_bigendian:20; POWERPC64-LE-10:       # %bb.0: # %entry21; POWERPC64-LE-10-NEXT:    plxv v2, .LCPI0_0@PCREL(0), 122; POWERPC64-LE-10-NEXT:    blr23;24; POWERPC64-BE-10-LABEL: test_v2i64_msb_set_bigendian:25; POWERPC64-BE-10:       # %bb.0: # %entry26; POWERPC64-BE-10-NEXT:    lxvkq v2, 1627; POWERPC64-BE-10-NEXT:    blr28entry:29  ret <2 x i64> <i64 -9223372036854775808, i64 0>30}31 32; Little-Endian: 0x8000_0000_0000_0000_0000_0000_0000_0000 represents <0, -9223372036854775808>33define dso_local noundef <2 x i64> @test_v2i64_msb_set_littleendian() local_unnamed_addr {34; POWERPC64-LE-10-LABEL: test_v2i64_msb_set_littleendian:35; POWERPC64-LE-10:       # %bb.0: # %entry36; POWERPC64-LE-10-NEXT:    lxvkq v2, 1637; POWERPC64-LE-10-NEXT:    blr38;39; POWERPC64-BE-10-LABEL: test_v2i64_msb_set_littleendian:40; POWERPC64-BE-10:       # %bb.0: # %entry41; POWERPC64-BE-10-NEXT:    addis r3, r2, .LCPI1_0@toc@ha42; POWERPC64-BE-10-NEXT:    addi r3, r3, .LCPI1_0@toc@l43; POWERPC64-BE-10-NEXT:    lxv v2, 0(r3)44; POWERPC64-BE-10-NEXT:    blr45entry:46  ret <2 x i64> <i64 0, i64 -9223372036854775808>47}48 49; =============================================================================50; v4i32 tests - MSB set pattern (0x8000_0000_0000_0000_0000_0000_0000_0000)51; =============================================================================52 53; Big-Endian: 0x8000_0000_0000_0000_0000_0000_0000_0000 represents <-2147483648, 0, 0, 0>54define dso_local noundef <4 x i32> @test_v4i32_msb_set_bigendian() local_unnamed_addr {55; POWERPC64-LE-10-LABEL: test_v4i32_msb_set_bigendian:56; POWERPC64-LE-10:       # %bb.0: # %entry57; POWERPC64-LE-10-NEXT:    plxv v2, .LCPI2_0@PCREL(0), 158; POWERPC64-LE-10-NEXT:    blr59;60; POWERPC64-BE-10-LABEL: test_v4i32_msb_set_bigendian:61; POWERPC64-BE-10:       # %bb.0: # %entry62; POWERPC64-BE-10-NEXT:    lxvkq v2, 1663; POWERPC64-BE-10-NEXT:    blr64entry:65  ret <4 x i32> <i32 -2147483648, i32 0, i32 0, i32 0>66}67 68; Little-Endian: 0x8000_0000_0000_0000_0000_0000_0000_0000 represents <0, 0, 0, -2147483648>69define dso_local noundef <4 x i32> @test_v4i32_msb_set_littleendian() local_unnamed_addr {70; POWERPC64-LE-10-LABEL: test_v4i32_msb_set_littleendian:71; POWERPC64-LE-10:       # %bb.0: # %entry72; POWERPC64-LE-10-NEXT:    lxvkq v2, 1673; POWERPC64-LE-10-NEXT:    blr74;75; POWERPC64-BE-10-LABEL: test_v4i32_msb_set_littleendian:76; POWERPC64-BE-10:       # %bb.0: # %entry77; POWERPC64-BE-10-NEXT:    addis r3, r2, .LCPI3_0@toc@ha78; POWERPC64-BE-10-NEXT:    addi r3, r3, .LCPI3_0@toc@l79; POWERPC64-BE-10-NEXT:    lxv v2, 0(r3)80; POWERPC64-BE-10-NEXT:    blr81entry:82  ret <4 x i32> <i32 0, i32 0, i32 0, i32 -2147483648>83}84 85; =============================================================================86; v8i16 tests - MSB set pattern (0x8000_0000_0000_0000_0000_0000_0000_0000)87; =============================================================================88 89; Big-Endian: 0x8000_0000_0000_0000_0000_0000_0000_0000 represents <-32768, 0, 0, 0, 0, 0, 0, 0>90define dso_local noundef <8 x i16> @test_v8i16_msb_set_bigendian() local_unnamed_addr {91; POWERPC64-LE-10-LABEL: test_v8i16_msb_set_bigendian:92; POWERPC64-LE-10:       # %bb.0: # %entry93; POWERPC64-LE-10-NEXT:    plxv v2, .LCPI4_0@PCREL(0), 194; POWERPC64-LE-10-NEXT:    blr95;96; POWERPC64-BE-10-LABEL: test_v8i16_msb_set_bigendian:97; POWERPC64-BE-10:       # %bb.0: # %entry98; POWERPC64-BE-10-NEXT:    lxvkq v2, 1699; POWERPC64-BE-10-NEXT:    blr100entry:101  ret <8 x i16> <i16 -32768, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0>102}103 104; Little-Endian: 0x8000_0000_0000_0000_0000_0000_0000_0000 represents <0, 0, 0, 0, 0, 0, 0, -32768>105define dso_local noundef <8 x i16> @test_v8i16_msb_set_littleendian() local_unnamed_addr {106; POWERPC64-LE-10-LABEL: test_v8i16_msb_set_littleendian:107; POWERPC64-LE-10:       # %bb.0: # %entry108; POWERPC64-LE-10-NEXT:    lxvkq v2, 16109; POWERPC64-LE-10-NEXT:    blr110;111; POWERPC64-BE-10-LABEL: test_v8i16_msb_set_littleendian:112; POWERPC64-BE-10:       # %bb.0: # %entry113; POWERPC64-BE-10-NEXT:    addis r3, r2, .LCPI5_0@toc@ha114; POWERPC64-BE-10-NEXT:    addi r3, r3, .LCPI5_0@toc@l115; POWERPC64-BE-10-NEXT:    lxv v2, 0(r3)116; POWERPC64-BE-10-NEXT:    blr117entry:118  ret <8 x i16> <i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 -32768>119}120 121; =============================================================================122; v16i8 tests - MSB set pattern (0x8000_0000_0000_0000_0000_0000_0000_0000)123; =============================================================================124 125; Big-Endian: 0x8000_0000_0000_0000_0000_0000_0000_0000 represents <-128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0>126define dso_local noundef <16 x i8> @test_v16i8_msb_set_bigendian() local_unnamed_addr {127; POWERPC64-LE-10-LABEL: test_v16i8_msb_set_bigendian:128; POWERPC64-LE-10:       # %bb.0: # %entry129; POWERPC64-LE-10-NEXT:    plxv v2, .LCPI6_0@PCREL(0), 1130; POWERPC64-LE-10-NEXT:    blr131;132; POWERPC64-BE-10-LABEL: test_v16i8_msb_set_bigendian:133; POWERPC64-BE-10:       # %bb.0: # %entry134; POWERPC64-BE-10-NEXT:    lxvkq v2, 16135; POWERPC64-BE-10-NEXT:    blr136entry:137  ret <16 x i8> <i8 -128, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>138}139 140; Little-Endian: 0x8000_0000_0000_0000_0000_0000_0000_0000 represents <0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -128>141define dso_local noundef <16 x i8> @test_v16i8_msb_set_littleendian() local_unnamed_addr {142; POWERPC64-LE-10-LABEL: test_v16i8_msb_set_littleendian:143; POWERPC64-LE-10:       # %bb.0: # %entry144; POWERPC64-LE-10-NEXT:    lxvkq v2, 16145; POWERPC64-LE-10-NEXT:    blr146;147; POWERPC64-BE-10-LABEL: test_v16i8_msb_set_littleendian:148; POWERPC64-BE-10:       # %bb.0: # %entry149; POWERPC64-BE-10-NEXT:    addis r3, r2, .LCPI7_0@toc@ha150; POWERPC64-BE-10-NEXT:    addi r3, r3, .LCPI7_0@toc@l151; POWERPC64-BE-10-NEXT:    lxv v2, 0(r3)152; POWERPC64-BE-10-NEXT:    blr153entry:154  ret <16 x i8> <i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 -128>155}156 157; =============================================================================158; v2i64 tests - LSB set pattern (0x0000_0000_0000_0000_0000_0000_0000_0001)159; =============================================================================160 161; Big-Endian: 0x0000_0000_0000_0000_0000_0000_0000_0001 represents <0, 1>162define dso_local noundef <2 x i64> @test_v2i64_lsb_set_bigendian() local_unnamed_addr {163; POWERPC64-LE-10-LABEL: test_v2i64_lsb_set_bigendian:164; POWERPC64-LE-10:       # %bb.0: # %entry165; POWERPC64-LE-10-NEXT:    plxv v2, .LCPI8_0@PCREL(0), 1166; POWERPC64-LE-10-NEXT:    blr167;168; POWERPC64-BE-10-LABEL: test_v2i64_lsb_set_bigendian:169; POWERPC64-BE-10:       # %bb.0: # %entry170; POWERPC64-BE-10-NEXT:    xxspltib v2, 255171; POWERPC64-BE-10-NEXT:    vsrq v2, v2, v2172; POWERPC64-BE-10-NEXT:    blr173entry:174  ret <2 x i64> <i64 0, i64 1>175}176 177; Little-Endian: 0x0000_0000_0000_0000_0000_0000_0000_0001 represents <1, 0>178define dso_local noundef <2 x i64> @test_v2i64_lsb_set_littleendian() local_unnamed_addr {179; POWERPC64-LE-10-LABEL: test_v2i64_lsb_set_littleendian:180; POWERPC64-LE-10:       # %bb.0: # %entry181; POWERPC64-LE-10-NEXT:    xxspltib v2, 255182; POWERPC64-LE-10-NEXT:    vsrq v2, v2, v2183; POWERPC64-LE-10-NEXT:    blr184;185; POWERPC64-BE-10-LABEL: test_v2i64_lsb_set_littleendian:186; POWERPC64-BE-10:       # %bb.0: # %entry187; POWERPC64-BE-10-NEXT:    addis r3, r2, .LCPI9_0@toc@ha188; POWERPC64-BE-10-NEXT:    addi r3, r3, .LCPI9_0@toc@l189; POWERPC64-BE-10-NEXT:    lxv v2, 0(r3)190; POWERPC64-BE-10-NEXT:    blr191entry:192  ret <2 x i64> <i64 1, i64 0>193}194 195; =============================================================================196; v4i32 tests - LSB set pattern (0x0000_0000_0000_0000_0000_0000_0000_0001)197; =============================================================================198 199; Big-Endian: 0x0000_0000_0000_0000_0000_0000_0000_0001 represents <0, 0, 0, 1>200define dso_local noundef <4 x i32> @test_v4i32_lsb_set_bigendian() local_unnamed_addr {201; POWERPC64-LE-10-LABEL: test_v4i32_lsb_set_bigendian:202; POWERPC64-LE-10:       # %bb.0: # %entry203; POWERPC64-LE-10-NEXT:    plxv v2, .LCPI10_0@PCREL(0), 1204; POWERPC64-LE-10-NEXT:    blr205;206; POWERPC64-BE-10-LABEL: test_v4i32_lsb_set_bigendian:207; POWERPC64-BE-10:       # %bb.0: # %entry208; POWERPC64-BE-10-NEXT:    xxspltib v2, 255209; POWERPC64-BE-10-NEXT:    vsrq v2, v2, v2210; POWERPC64-BE-10-NEXT:    blr211entry:212  ret <4 x i32> <i32 0, i32 0, i32 0, i32 1>213}214 215; Little-Endian: 0x0000_0000_0000_0000_0000_0000_0000_0001 represents <1, 0, 0, 0>216define dso_local noundef <4 x i32> @test_v4i32_lsb_set_littleendian() local_unnamed_addr {217; POWERPC64-LE-10-LABEL: test_v4i32_lsb_set_littleendian:218; POWERPC64-LE-10:       # %bb.0: # %entry219; POWERPC64-LE-10-NEXT:    xxspltib v2, 255220; POWERPC64-LE-10-NEXT:    vsrq v2, v2, v2221; POWERPC64-LE-10-NEXT:    blr222;223; POWERPC64-BE-10-LABEL: test_v4i32_lsb_set_littleendian:224; POWERPC64-BE-10:       # %bb.0: # %entry225; POWERPC64-BE-10-NEXT:    addis r3, r2, .LCPI11_0@toc@ha226; POWERPC64-BE-10-NEXT:    addi r3, r3, .LCPI11_0@toc@l227; POWERPC64-BE-10-NEXT:    lxv v2, 0(r3)228; POWERPC64-BE-10-NEXT:    blr229entry:230  ret <4 x i32> <i32 1, i32 0, i32 0, i32 0>231}232 233; =============================================================================234; v8i16 tests - LSB set pattern (0x0000_0000_0000_0000_0000_0000_0000_0001)235; =============================================================================236 237; Big-Endian: 0x0000_0000_0000_0000_0000_0000_0000_0001 represents <0, 0, 0, 0, 0, 0, 0, 1>238define dso_local noundef <8 x i16> @test_v8i16_lsb_set_bigendian() local_unnamed_addr {239; POWERPC64-LE-10-LABEL: test_v8i16_lsb_set_bigendian:240; POWERPC64-LE-10:       # %bb.0: # %entry241; POWERPC64-LE-10-NEXT:    plxv v2, .LCPI12_0@PCREL(0), 1242; POWERPC64-LE-10-NEXT:    blr243;244; POWERPC64-BE-10-LABEL: test_v8i16_lsb_set_bigendian:245; POWERPC64-BE-10:       # %bb.0: # %entry246; POWERPC64-BE-10-NEXT:    xxspltib v2, 255247; POWERPC64-BE-10-NEXT:    vsrq v2, v2, v2248; POWERPC64-BE-10-NEXT:    blr249entry:250  ret <8 x i16> <i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 1>251}252 253; Little-Endian: 0x0000_0000_0000_0000_0000_0000_0000_0001 represents <1, 0, 0, 0, 0, 0, 0, 0>254define dso_local noundef <8 x i16> @test_v8i16_lsb_set_littleendian() local_unnamed_addr {255; POWERPC64-LE-10-LABEL: test_v8i16_lsb_set_littleendian:256; POWERPC64-LE-10:       # %bb.0: # %entry257; POWERPC64-LE-10-NEXT:    xxspltib v2, 255258; POWERPC64-LE-10-NEXT:    vsrq v2, v2, v2259; POWERPC64-LE-10-NEXT:    blr260;261; POWERPC64-BE-10-LABEL: test_v8i16_lsb_set_littleendian:262; POWERPC64-BE-10:       # %bb.0: # %entry263; POWERPC64-BE-10-NEXT:    addis r3, r2, .LCPI13_0@toc@ha264; POWERPC64-BE-10-NEXT:    addi r3, r3, .LCPI13_0@toc@l265; POWERPC64-BE-10-NEXT:    lxv v2, 0(r3)266; POWERPC64-BE-10-NEXT:    blr267entry:268  ret <8 x i16> <i16 1, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0>269}270 271; =============================================================================272; v16i8 tests - LSB set pattern (0x0000_0000_0000_0000_0000_0000_0000_0001)273; =============================================================================274 275; Big-Endian: 0x0000_0000_0000_0000_0000_0000_0000_0001 represents <0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1>276define dso_local noundef <16 x i8> @test_v16i8_lsb_set_bigendian() local_unnamed_addr {277; POWERPC64-LE-10-LABEL: test_v16i8_lsb_set_bigendian:278; POWERPC64-LE-10:       # %bb.0: # %entry279; POWERPC64-LE-10-NEXT:    plxv v2, .LCPI14_0@PCREL(0), 1280; POWERPC64-LE-10-NEXT:    blr281;282; POWERPC64-BE-10-LABEL: test_v16i8_lsb_set_bigendian:283; POWERPC64-BE-10:       # %bb.0: # %entry284; POWERPC64-BE-10-NEXT:    xxspltib v2, 255285; POWERPC64-BE-10-NEXT:    vsrq v2, v2, v2286; POWERPC64-BE-10-NEXT:    blr287entry:288  ret <16 x i8> <i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 1>289}290 291; Little-Endian: 0x0000_0000_0000_0000_0000_0000_0000_0001 represents <1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0>292define dso_local noundef <16 x i8> @test_v16i8_lsb_set_littleendian() local_unnamed_addr {293; POWERPC64-LE-10-LABEL: test_v16i8_lsb_set_littleendian:294; POWERPC64-LE-10:       # %bb.0: # %entry295; POWERPC64-LE-10-NEXT:    xxspltib v2, 255296; POWERPC64-LE-10-NEXT:    vsrq v2, v2, v2297; POWERPC64-LE-10-NEXT:    blr298;299; POWERPC64-BE-10-LABEL: test_v16i8_lsb_set_littleendian:300; POWERPC64-BE-10:       # %bb.0: # %entry301; POWERPC64-BE-10-NEXT:    addis r3, r2, .LCPI15_0@toc@ha302; POWERPC64-BE-10-NEXT:    addi r3, r3, .LCPI15_0@toc@l303; POWERPC64-BE-10-NEXT:    lxv v2, 0(r3)304; POWERPC64-BE-10-NEXT:    blr305entry:306  ret <16 x i8> <i8 1, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>307}