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1# REQUIRES: asserts2# RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr10 -x=mir < %s \3# RUN: -debug-only=machine-scheduler -start-before=postmisched 2>&1 \4# RUN: -mattr=+fuse-zeromove,+fuse-cmp,+fuse-wideimm,+fuse-back2back \5# RUN: | FileCheck %s6 7# CHECK: add_mulld:%bb.08# CHECK: Macro fuse: SU(0) - SU(1) / MULLD - ADD89---10name: add_mulld11tracksRegLiveness: true12body: |13 bb.0.entry:14 liveins: $x3, $x4, $x515 renamable $x4 = MULLD $x3, $x416 renamable $x3 = ADD8 killed renamable $x4, $x517 BLR8 implicit $lr8, implicit $rm, implicit $x318...19 20# CHECK: add_and:%bb.021# CHECK: Macro fuse: SU(0) - SU(1) / ADD8 - AND822---23name: add_and24tracksRegLiveness: true25body: |26 bb.0.entry:27 liveins: $x3, $x4, $x528 renamable $x4 = ADD8 $x3, $x429 renamable $x3 = AND8 killed renamable $x4, $x530 BLR8 implicit $lr8, implicit $rm, implicit $x331...32 33# CHECK: xor_subf:%bb.034# CHECK: Macro fuse: SU(0) - SU(1) / XOR8 - SUBF835---36name: xor_subf37tracksRegLiveness: true38body: |39 bb.0.entry:40 liveins: $x3, $x4, $x541 renamable $x4 = XOR8 $x3, $x442 renamable $x3 = SUBF8 killed renamable $x4, $x543 BLR8 implicit $lr8, implicit $rm, implicit $x344...45 46# CHECK: or_nand:%bb.047# CHECK: Macro fuse: SU(0) - SU(1) / OR8 - NAND848---49name: or_nand50tracksRegLiveness: true51body: |52 bb.0.entry:53 liveins: $x3, $x4, $x554 renamable $x4 = OR8 $x3, $x455 renamable $x3 = NAND8 killed renamable $x4, $x556 BLR8 implicit $lr8, implicit $rm, implicit $x357...58 59# CHECK: vand_vand:%bb.060# CHECK: Macro fuse: SU(0) - SU(1) / VAND - VAND61---62name: vand_vand63tracksRegLiveness: true64body: |65 bb.0.entry:66 liveins: $v2, $v3, $v467 renamable $v2 = VAND $v3, $v268 renamable $v2 = VAND killed renamable $v2, $v469 BLR8 implicit $lr8, implicit $rm70...71 72# CHECK: vadd_vadd:%bb.073# CHECK: Macro fuse: SU(0) - SU(1) / VADDUDM - VADDUDM74---75name: vadd_vadd76tracksRegLiveness: true77body: |78 bb.0.entry:79 liveins: $v2, $v3, $v480 renamable $v2 = VADDUDM $v3, $v281 renamable $v2 = VADDUDM killed renamable $v2, $v482 BLR8 implicit $lr8, implicit $rm83...84 85# CHECK: sldi_add:%bb.086# CHECK: Macro fuse: SU(0) - SU(1) / RLDICR - ADD887---88name: sldi_add89tracksRegLiveness: true90body: |91 bb.0.entry:92 liveins: $x3, $x4, $x593 renamable $x4 = RLDICR $x3, 3, 6094 renamable $x3 = ADD8 killed renamable $x4, $x595 BLR8 implicit $lr8, implicit $rm, implicit $x396...97 98# CHECK: rldicl_xor:%bb.099# CHECK: Macro fuse: SU(0) - SU(1) / RLDICL - XOR8100---101name: rldicl_xor102tracksRegLiveness: true103body: |104 bb.0.entry:105 liveins: $x3, $x4, $x5106 renamable $x4 = RLDICL $x3, 1, 0107 renamable $x3 = XOR8 killed renamable $x4, $x5108 BLR8 implicit $lr8, implicit $rm, implicit $x3109...110 111# CHECK: rldicr_xor:%bb.0112# CHECK: Macro fuse: SU(0) - SU(1) / RLDICR - XOR8113---114name: rldicr_xor115tracksRegLiveness: true116body: |117 bb.0.entry:118 liveins: $x3, $x4, $x5119 renamable $x4 = RLDICR $x3, 1, 63120 renamable $x3 = XOR8 killed renamable $x4, $x5121 BLR8 implicit $lr8, implicit $rm, implicit $x3122...123 124# CHECK: ori_oris:%bb.0125# CHECK: Macro fuse: SU(0) - SU(1) / ORI8 - ORIS8126---127name: ori_oris128tracksRegLiveness: true129body: |130 bb.0.entry:131 liveins: $x3, $x4132 renamable $x4 = ORI8 $x3, 63133 renamable $x3 = ORIS8 killed renamable $x4, 20134 BLR8 implicit $lr8, implicit $rm, implicit $x3135...136 137# CHECK: load_cmp:%bb.0138# CHECK: Macro fuse: SU(0) - SU(1) / LD - CMPDI139---140name: load_cmp141tracksRegLiveness: true142body: |143 bb.0.entry:144 liveins: $x3, $x4, $x5145 renamable $x3 = LD 0, killed renamable $x3146 renamable $cr0 = CMPDI killed renamable $x3, 0147 renamable $x3 = ISEL8 killed renamable $x5, killed renamable $x4, renamable $cr0lt, implicit killed $cr0148 BLR8 implicit $lr8, implicit $rm, implicit $x3149 150# CHECK: back2back_1:%bb.0151# CHECK: Macro fuse: SU(0) - SU(1) / VADDUBM - VSUBUBM152---153name: back2back_1154tracksRegLiveness: true155body: |156 bb.0.entry:157 liveins: $v2, $v3, $v4158 renamable $v2 = VADDUBM $v3, $v2159 renamable $v2 = VSUBUBM killed renamable $v2, $v4160 BLR8 implicit $lr8, implicit $rm161 162# CHECK: back2back_2:%bb.0163# CHECK: Macro fuse: SU(0) - SU(1) / XSABSDP - XSNEGDP164---165name: back2back_2166tracksRegLiveness: true167body: |168 bb.0.entry:169 liveins: $f1, $f2170 renamable $f2 = XSABSDP $f1, implicit $rm171 renamable $f1 = XSNEGDP killed renamable $f2, implicit $rm172 BLR8 implicit $lr8, implicit $rm, implicit $f1173 174# CHECK: back2back_3:%bb.0175# CHECK: Macro fuse: SU(0) - SU(1) / VMAXFP - XVMINSP176---177name: back2back_3178tracksRegLiveness: true179body: |180 bb.0.entry:181 liveins: $v2, $v3, $v4182 renamable $v3 = VMAXFP $v2, $v3183 renamable $v2 = XVMINSP killed renamable $v3, $v4, implicit $rm184 BLR8 implicit $lr8, implicit $rm, implicit $v2185