195 lines · plain
1; RUN: llc -relocation-model=static -verify-machineinstrs -O0 -mcpu=pwr7 -code-model=medium -filetype=obj -fast-isel=false %s -o - | \2; RUN: llvm-readobj -r - | FileCheck -check-prefix=MEDIUM %s3; RUN: llc -relocation-model=static -verify-machineinstrs -O0 -mcpu=pwr7 -code-model=large -filetype=obj -fast-isel=false %s -o - | \4; RUN: llvm-readobj -r - | FileCheck -check-prefix=LARGE %s5 6; Run jump table test separately since jump tables aren't generated at -O0.7; RUN: llc -relocation-model=static -verify-machineinstrs -mcpu=pwr7 -code-model=medium -filetype=obj -fast-isel=false %s -o - | \8; RUN: llvm-readobj -r - | FileCheck -check-prefix=MEDIUM-JT %s9; RUN: llc -relocation-model=static -verify-machineinstrs -mcpu=pwr7 -code-model=large -filetype=obj -fast-isel=false %s -o - | \10; RUN: llvm-readobj -r - | FileCheck -check-prefix=LARGE-JT %s11 12; FIXME: When asm-parse is available, could make this an assembly test.13 14target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"15target triple = "powerpc64-unknown-linux-gnu"16 17@ei = external global i3218 19define dso_local signext i32 @test_external() nounwind {20entry:21 %0 = load i32, ptr @ei, align 422 %inc = add nsw i32 %0, 123 store i32 %inc, ptr @ei, align 424 ret i32 %025}26 27; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for28; accessing external variable ei.29;30; MEDIUM: Relocations [31; MEDIUM: Section {{.*}} .rela.text {32; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA .toc 0x033; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS .toc 0x034;35; LARGE: Relocations [36; LARGE: Section {{.*}} .rela.text {37; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM1:[^ ]+]]38; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM1]]39 40@test_fn_static.si = internal global i32 0, align 441 42define dso_local signext i32 @test_fn_static() nounwind {43entry:44 %0 = load i32, ptr @test_fn_static.si, align 445 %inc = add nsw i32 %0, 146 store i32 %inc, ptr @test_fn_static.si, align 447 ret i32 %048}49 50; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO for51; accessing function-scoped variable si.52;53; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA .bss 0x054; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO .bss 0x055;56; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for57; accessing function-scoped variable si.58;59; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM2:[^ ]+]]60; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM2]]61 62@gi = dso_local global i32 5, align 463 64define dso_local signext i32 @test_file_static() nounwind {65entry:66 %0 = load i32, ptr @gi, align 467 %inc = add nsw i32 %0, 168 store i32 %inc, ptr @gi, align 469 ret i32 %070}71 72; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO for73; accessing file-scope variable gi.74;75; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA gi 0x076; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO gi 0x077;78; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for79; accessing file-scope variable gi.80;81; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM3:[^ ]+]]82; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM3]]83 84define dso_local double @test_double_const() nounwind {85entry:86 ret double 0x3F4FD4920B498CF087}88 89; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO for90; accessing a constant.91;92; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA .rodata.cst893; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO .rodata.cst894;95; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for96; accessing a constant.97;98; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM4:[^ ]+]]99; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM4]]100 101@ti = common dso_local global i32 0, align 4102 103define dso_local signext i32 @test_tentative() nounwind {104entry:105 %0 = load i32, ptr @ti, align 4106 %inc = add nsw i32 %0, 1107 store i32 %inc, ptr @ti, align 4108 ret i32 %0109}110 111; Verify generation of relocations foraccessing variable ti.112;113; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA ti 0x0114; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO ti 0x0115;116; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM6:[^ ]+]]117; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM6]]118 119define ptr @test_fnaddr() nounwind {120entry:121 %func = alloca ptr, align 8122 store ptr @foo, ptr %func, align 8123 %0 = load ptr, ptr %func, align 8124 ret ptr %0125}126 127declare signext i32 @foo(i32 signext)128 129; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for130; accessing function address foo.131;132; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA .toc 0x8133; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS .toc 0x8134;135; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM7:[^ ]+]]136; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM7]]137 138 139define dso_local signext i32 @test_jump_table(i32 signext %i) nounwind {140entry:141 %i.addr = alloca i32, align 4142 store i32 %i, ptr %i.addr, align 4143 %0 = load i32, ptr %i.addr, align 4144 switch i32 %0, label %sw.default [145 i32 3, label %sw.bb146 i32 4, label %sw.bb1147 i32 5, label %sw.bb2148 i32 6, label %sw.bb3149 ]150 151sw.default: ; preds = %entry152 br label %sw.epilog153 154sw.bb: ; preds = %entry155 %1 = load i32, ptr %i.addr, align 4156 %mul = mul nsw i32 %1, 7157 store i32 %mul, ptr %i.addr, align 4158 br label %sw.bb1159 160sw.bb1: ; preds = %entry, %sw.bb161 %2 = load i32, ptr %i.addr, align 4162 %dec = add nsw i32 %2, -1163 store i32 %dec, ptr %i.addr, align 4164 br label %sw.bb2165 166sw.bb2: ; preds = %entry, %sw.bb1167 %3 = load i32, ptr %i.addr, align 4168 %add = add nsw i32 %3, 3169 store i32 %add, ptr %i.addr, align 4170 br label %sw.bb3171 172sw.bb3: ; preds = %entry, %sw.bb2173 %4 = load i32, ptr %i.addr, align 4174 %shl = shl i32 %4, 1175 store i32 %shl, ptr %i.addr, align 4176 br label %sw.epilog177 178sw.epilog: ; preds = %sw.bb3, %sw.default179 %5 = load i32, ptr %i.addr, align 4180 ret i32 %5181}182 183; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for184; accessing a jump table address.185;186; MEDIUM-JT: Relocations [187; MEDIUM-JT: Section ({{.*}}) .rela.text {188; MEDIUM-JT-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM:[^ ]+]]189; MEDIUM-JT-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM]]190;191; LARGE-JT: Relocations [192; LARGE-JT: Section ({{.*}}) .rela.text {193; LARGE-JT-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM:[^ ]+]]194; LARGE-JT-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM]]195