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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \3; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names \4; RUN: -ppc-vsr-nums-as-vr < %s | FileCheck %s5; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \6; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names \7; RUN: -ppc-vsr-nums-as-vr < %s | FileCheck %s --check-prefix=CHECK-BE8; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \9; RUN: -mcpu=future -ppc-asm-full-reg-names \10; RUN: -ppc-vsr-nums-as-vr < %s | FileCheck %s --check-prefix=CHECK-LE-WACC11; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \12; RUN: -mcpu=future -ppc-asm-full-reg-names \13; RUN: -ppc-vsr-nums-as-vr < %s | FileCheck %s --check-prefix=CHECK-BE-WACC14 15define void @testMultiply(ptr nocapture noundef readonly %a, ptr nocapture noundef readonly %b, ptr nocapture noundef writeonly %c) local_unnamed_addr #0 {16; CHECK-LABEL: testMultiply:17; CHECK: # %bb.0: # %entry18; CHECK-NEXT: mflr r019; CHECK-NEXT: std r30, -16(r1)20; CHECK-NEXT: mr r30, r121; CHECK-NEXT: std r0, 16(r1)22; CHECK-NEXT: clrldi r0, r1, 5923; CHECK-NEXT: subfic r0, r0, -12824; CHECK-NEXT: stdux r1, r1, r025; CHECK-NEXT: stxv v30, -64(r30) # 16-byte Folded Spill26; CHECK-NEXT: stxv v31, -48(r30) # 16-byte Folded Spill27; CHECK-NEXT: lxv v31, 0(r3)28; CHECK-NEXT: lxv v30, 0(r4)29; CHECK-NEXT: addi r3, r1, 3230; CHECK-NEXT: vmr v2, v3131; CHECK-NEXT: vmr v3, v3032; CHECK-NEXT: std r29, -24(r30) # 8-byte Folded Spill33; CHECK-NEXT: mr r29, r534; CHECK-NEXT: bl _Z15buildVectorPairPu13__vector_pairDv16_hS0_@notoc35; CHECK-NEXT: xxsetaccz acc136; CHECK-NEXT: xvf32gerpp acc1, v31, v3037; CHECK-NEXT: lxv vs0, 48(r1)38; CHECK-NEXT: lxv vs1, 32(r1)39; CHECK-NEXT: xvf32gerpp acc1, vs1, vs040; CHECK-NEXT: lxv v31, -48(r30) # 16-byte Folded Reload41; CHECK-NEXT: lxv v30, -64(r30) # 16-byte Folded Reload42; CHECK-NEXT: xxmfacc acc143; CHECK-NEXT: xxlor vs0, vs4, vs444; CHECK-NEXT: xxlor vs1, vs5, vs545; CHECK-NEXT: xxlor vs2, vs6, vs646; CHECK-NEXT: xxlor vs3, vs7, vs747; CHECK-NEXT: stxv vs3, 0(r29)48; CHECK-NEXT: pstxv vs2, 8(r29), 049; CHECK-NEXT: stxv vs1, 16(r29)50; CHECK-NEXT: pstxv vs0, 24(r29), 051; CHECK-NEXT: ld r29, -24(r30) # 8-byte Folded Reload52; CHECK-NEXT: mr r1, r3053; CHECK-NEXT: ld r0, 16(r1)54; CHECK-NEXT: ld r30, -16(r1)55; CHECK-NEXT: mtlr r056; CHECK-NEXT: blr57;58; CHECK-BE-LABEL: testMultiply:59; CHECK-BE: # %bb.0: # %entry60; CHECK-BE-NEXT: mflr r061; CHECK-BE-NEXT: std r30, -16(r1)62; CHECK-BE-NEXT: mr r30, r163; CHECK-BE-NEXT: std r0, 16(r1)64; CHECK-BE-NEXT: clrldi r0, r1, 5965; CHECK-BE-NEXT: subfic r0, r0, -22466; CHECK-BE-NEXT: stdux r1, r1, r067; CHECK-BE-NEXT: stxv v30, -64(r30) # 16-byte Folded Spill68; CHECK-BE-NEXT: stxv v31, -48(r30) # 16-byte Folded Spill69; CHECK-BE-NEXT: lxv v31, 0(r3)70; CHECK-BE-NEXT: lxv v30, 0(r4)71; CHECK-BE-NEXT: addi r3, r1, 12872; CHECK-BE-NEXT: vmr v2, v3173; CHECK-BE-NEXT: vmr v3, v3074; CHECK-BE-NEXT: std r29, -24(r30) # 8-byte Folded Spill75; CHECK-BE-NEXT: mr r29, r576; CHECK-BE-NEXT: bl _Z15buildVectorPairPu13__vector_pairDv16_hS0_77; CHECK-BE-NEXT: nop78; CHECK-BE-NEXT: xxsetaccz acc179; CHECK-BE-NEXT: xvf32gerpp acc1, v31, v3080; CHECK-BE-NEXT: lxv vs0, 128(r1)81; CHECK-BE-NEXT: lxv vs1, 144(r1)82; CHECK-BE-NEXT: xvf32gerpp acc1, vs0, vs183; CHECK-BE-NEXT: lxv v31, -48(r30) # 16-byte Folded Reload84; CHECK-BE-NEXT: lxv v30, -64(r30) # 16-byte Folded Reload85; CHECK-BE-NEXT: xxmfacc acc186; CHECK-BE-NEXT: xxlor vs3, vs4, vs487; CHECK-BE-NEXT: xxlor vs2, vs5, vs588; CHECK-BE-NEXT: xxlor vs1, vs6, vs689; CHECK-BE-NEXT: xxlor vs0, vs7, vs790; CHECK-BE-NEXT: stxv vs0, 0(r29)91; CHECK-BE-NEXT: pstxv vs1, 8(r29), 092; CHECK-BE-NEXT: stxv vs2, 16(r29)93; CHECK-BE-NEXT: pstxv vs3, 24(r29), 094; CHECK-BE-NEXT: ld r29, -24(r30) # 8-byte Folded Reload95; CHECK-BE-NEXT: mr r1, r3096; CHECK-BE-NEXT: ld r0, 16(r1)97; CHECK-BE-NEXT: ld r30, -16(r1)98; CHECK-BE-NEXT: mtlr r099; CHECK-BE-NEXT: blr100;101; CHECK-LE-WACC-LABEL: testMultiply:102; CHECK-LE-WACC: # %bb.0: # %entry103; CHECK-LE-WACC-NEXT: mflr r0104; CHECK-LE-WACC-NEXT: std r30, -16(r1)105; CHECK-LE-WACC-NEXT: std r0, 16(r1)106; CHECK-LE-WACC-NEXT: clrldi r0, r1, 59107; CHECK-LE-WACC-NEXT: subfic r0, r0, -128108; CHECK-LE-WACC-NEXT: mr r30, r1109; CHECK-LE-WACC-NEXT: stdux r1, r1, r0110; CHECK-LE-WACC-NEXT: stxv v30, -64(r30) # 16-byte Folded Spill111; CHECK-LE-WACC-NEXT: stxv v31, -48(r30) # 16-byte Folded Spill112; CHECK-LE-WACC-NEXT: lxv v31, 0(r3)113; CHECK-LE-WACC-NEXT: lxv v30, 0(r4)114; CHECK-LE-WACC-NEXT: addi r3, r1, 32115; CHECK-LE-WACC-NEXT: std r29, -24(r30) # 8-byte Folded Spill116; CHECK-LE-WACC-NEXT: vmr v2, v31117; CHECK-LE-WACC-NEXT: vmr v3, v30118; CHECK-LE-WACC-NEXT: mr r29, r5119; CHECK-LE-WACC-NEXT: bl _Z15buildVectorPairPu13__vector_pairDv16_hS0_@notoc120; CHECK-LE-WACC-NEXT: dmxxsetaccz wacc0121; CHECK-LE-WACC-NEXT: xvf32gerpp wacc0, v31, v30122; CHECK-LE-WACC-NEXT: lxv vs0, 48(r1)123; CHECK-LE-WACC-NEXT: lxv vs1, 32(r1)124; CHECK-LE-WACC-NEXT: xvf32gerpp wacc0, vs1, vs0125; CHECK-LE-WACC-NEXT: dmxxextfdmr512 vsp36, vsp34, wacc0, 0126; CHECK-LE-WACC-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0127; CHECK-LE-WACC-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0128; CHECK-LE-WACC-NEXT: stxv v5, 0(r29)129; CHECK-LE-WACC-NEXT: pstxv v4, 8(r29), 0130; CHECK-LE-WACC-NEXT: stxv v3, 16(r29)131; CHECK-LE-WACC-NEXT: pstxv v2, 24(r29), 0132; CHECK-LE-WACC-NEXT: lxv v31, -48(r30) # 16-byte Folded Reload133; CHECK-LE-WACC-NEXT: lxv v30, -64(r30) # 16-byte Folded Reload134; CHECK-LE-WACC-NEXT: ld r29, -24(r30) # 8-byte Folded Reload135; CHECK-LE-WACC-NEXT: mr r1, r30136; CHECK-LE-WACC-NEXT: ld r0, 16(r1)137; CHECK-LE-WACC-NEXT: ld r30, -16(r1)138; CHECK-LE-WACC-NEXT: mtlr r0139; CHECK-LE-WACC-NEXT: blr140;141; CHECK-BE-WACC-LABEL: testMultiply:142; CHECK-BE-WACC: # %bb.0: # %entry143; CHECK-BE-WACC-NEXT: mflr r0144; CHECK-BE-WACC-NEXT: std r30, -16(r1)145; CHECK-BE-WACC-NEXT: std r0, 16(r1)146; CHECK-BE-WACC-NEXT: clrldi r0, r1, 59147; CHECK-BE-WACC-NEXT: subfic r0, r0, -224148; CHECK-BE-WACC-NEXT: mr r30, r1149; CHECK-BE-WACC-NEXT: stdux r1, r1, r0150; CHECK-BE-WACC-NEXT: stxv v30, -64(r30) # 16-byte Folded Spill151; CHECK-BE-WACC-NEXT: stxv v31, -48(r30) # 16-byte Folded Spill152; CHECK-BE-WACC-NEXT: lxv v31, 0(r3)153; CHECK-BE-WACC-NEXT: lxv v30, 0(r4)154; CHECK-BE-WACC-NEXT: addi r3, r1, 128155; CHECK-BE-WACC-NEXT: std r29, -24(r30) # 8-byte Folded Spill156; CHECK-BE-WACC-NEXT: vmr v2, v31157; CHECK-BE-WACC-NEXT: vmr v3, v30158; CHECK-BE-WACC-NEXT: mr r29, r5159; CHECK-BE-WACC-NEXT: bl _Z15buildVectorPairPu13__vector_pairDv16_hS0_160; CHECK-BE-WACC-NEXT: nop161; CHECK-BE-WACC-NEXT: dmxxsetaccz wacc0162; CHECK-BE-WACC-NEXT: xvf32gerpp wacc0, v31, v30163; CHECK-BE-WACC-NEXT: lxv vs0, 128(r1)164; CHECK-BE-WACC-NEXT: lxv vs1, 144(r1)165; CHECK-BE-WACC-NEXT: xvf32gerpp wacc0, vs0, vs1166; CHECK-BE-WACC-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0167; CHECK-BE-WACC-NEXT: vmr v1, v2168; CHECK-BE-WACC-NEXT: vmr v7, v4169; CHECK-BE-WACC-NEXT: vmr v0, v3170; CHECK-BE-WACC-NEXT: vmr v6, v5171; CHECK-BE-WACC-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0172; CHECK-BE-WACC-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0173; CHECK-BE-WACC-NEXT: stxv v2, 0(r29)174; CHECK-BE-WACC-NEXT: pstxv v3, 8(r29), 0175; CHECK-BE-WACC-NEXT: stxv v4, 16(r29)176; CHECK-BE-WACC-NEXT: pstxv v5, 24(r29), 0177; CHECK-BE-WACC-NEXT: lxv v31, -48(r30) # 16-byte Folded Reload178; CHECK-BE-WACC-NEXT: lxv v30, -64(r30) # 16-byte Folded Reload179; CHECK-BE-WACC-NEXT: ld r29, -24(r30) # 8-byte Folded Reload180; CHECK-BE-WACC-NEXT: mr r1, r30181; CHECK-BE-WACC-NEXT: ld r0, 16(r1)182; CHECK-BE-WACC-NEXT: ld r30, -16(r1)183; CHECK-BE-WACC-NEXT: mtlr r0184; CHECK-BE-WACC-NEXT: blr185entry:186 %vP = alloca <256 x i1>, align 32187 call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %vP)188 %0 = tail call <512 x i1> @llvm.ppc.mma.xxsetaccz()189 %1 = load <16 x i8>, ptr %a, align 16190 %2 = load <16 x i8>, ptr %b, align 16191 call void @_Z15buildVectorPairPu13__vector_pairDv16_hS0_(ptr noundef nonnull %vP, <16 x i8> noundef %1, <16 x i8> noundef %2)192 %3 = call <512 x i1> @llvm.ppc.mma.xvf32gerpp(<512 x i1> %0, <16 x i8> %1, <16 x i8> %2)193 %4 = load <256 x i1>, ptr %vP, align 32194 %5 = call { <16 x i8>, <16 x i8> } @llvm.ppc.vsx.disassemble.pair(<256 x i1> %4)195 %6 = extractvalue { <16 x i8>, <16 x i8> } %5, 0196 %7 = extractvalue { <16 x i8>, <16 x i8> } %5, 1197 %8 = call <512 x i1> @llvm.ppc.mma.xvf32gerpp(<512 x i1> %3, <16 x i8> %6, <16 x i8> %7)198 %9 = call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.ppc.mma.disassemble.acc(<512 x i1> %8)199 %10 = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } %9, 0200 %11 = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } %9, 1201 %12 = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } %9, 2202 %13 = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } %9, 3203 %14 = call <512 x i1> @llvm.ppc.mma.assemble.acc(<16 x i8> %13, <16 x i8> %12, <16 x i8> %11, <16 x i8> %10)204 %15 = call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.ppc.mma.disassemble.acc(<512 x i1> %14)205 %16 = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } %15, 0206 %17 = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } %15, 1207 %18 = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } %15, 2208 %19 = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } %15, 3209 store <16 x i8> %16, ptr %c, align 16210 %add.ptr = getelementptr inbounds float, ptr %c, i64 2211 store <16 x i8> %17, ptr %add.ptr, align 16212 %add.ptr11 = getelementptr inbounds float, ptr %c, i64 4213 store <16 x i8> %18, ptr %add.ptr11, align 16214 %add.ptr13 = getelementptr inbounds float, ptr %c, i64 6215 store <16 x i8> %19, ptr %add.ptr13, align 16216 call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %vP)217 ret void218}219 220declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture)221declare <512 x i1> @llvm.ppc.mma.xxsetaccz()222declare void @_Z15buildVectorPairPu13__vector_pairDv16_hS0_(ptr noundef, <16 x i8> noundef, <16 x i8> noundef) local_unnamed_addr223declare <512 x i1> @llvm.ppc.mma.xvf32gerpp(<512 x i1>, <16 x i8>, <16 x i8>)224declare { <16 x i8>, <16 x i8> } @llvm.ppc.vsx.disassemble.pair(<256 x i1>)225declare { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.ppc.mma.disassemble.acc(<512 x i1>)226declare <512 x i1> @llvm.ppc.mma.assemble.acc(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)227declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture)228 229attributes #0 = { nounwind }230