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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \3; RUN: -mcpu=future -ppc-asm-full-reg-names \4; RUN: -ppc-vsr-nums-as-vr < %s | FileCheck %s5; RUN: llc -verify-machineinstrs -mtriple=powerpc64-ibm-aix \6; RUN: -mcpu=future -ppc-asm-full-reg-names \7; RUN: -ppc-vsr-nums-as-vr < %s | FileCheck %s --check-prefix=CHECK-BE8 9declare <1024 x i1> @llvm.ppc.mma.dmsha2hash(<1024 x i1>, <1024 x i1>, i32)10 11define dso_local void @test_dmsha2hash(ptr %vop, ptr %vinp, ptr %resp) {12; CHECK-LABEL: test_dmsha2hash:13; CHECK: # %bb.0: # %entry14; CHECK-NEXT: lxvp vsp34, 0(r3)15; CHECK-NEXT: lxvp vsp36, 32(r3)16; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 117; CHECK-NEXT: lxvp vsp34, 64(r3)18; CHECK-NEXT: lxvp vsp36, 96(r3)19; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 020; CHECK-NEXT: lxvp vsp34, 0(r4)21; CHECK-NEXT: lxvp vsp36, 32(r4)22; CHECK-NEXT: dmxxinstdmr512 wacc_hi1, vsp36, vsp34, 123; CHECK-NEXT: lxvp vsp34, 64(r4)24; CHECK-NEXT: lxvp vsp36, 96(r4)25; CHECK-NEXT: dmxxinstdmr512 wacc1, vsp36, vsp34, 026; CHECK-NEXT: dmsha256hash dmr0, dmr127; CHECK-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 028; CHECK-NEXT: stxvp vsp34, 96(r5)29; CHECK-NEXT: stxvp vsp36, 64(r5)30; CHECK-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc_hi0, 131; CHECK-NEXT: stxvp vsp34, 32(r5)32; CHECK-NEXT: stxvp vsp36, 0(r5)33; CHECK-NEXT: blr34;35; CHECK-BE-LABEL: test_dmsha2hash:36; CHECK-BE: # %bb.0: # %entry37; CHECK-BE-NEXT: lxvp vsp34, 96(r3)38; CHECK-BE-NEXT: lxvp vsp36, 64(r3)39; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 140; CHECK-BE-NEXT: lxvp vsp34, 32(r3)41; CHECK-BE-NEXT: lxvp vsp36, 0(r3)42; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 043; CHECK-BE-NEXT: lxvp vsp34, 96(r4)44; CHECK-BE-NEXT: lxvp vsp36, 64(r4)45; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi1, vsp36, vsp34, 146; CHECK-BE-NEXT: lxvp vsp34, 32(r4)47; CHECK-BE-NEXT: lxvp vsp36, 0(r4)48; CHECK-BE-NEXT: dmxxinstdmr512 wacc1, vsp36, vsp34, 049; CHECK-BE-NEXT: dmsha256hash dmr0, dmr150; CHECK-BE-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc_hi0, 151; CHECK-BE-NEXT: stxvp vsp36, 96(r5)52; CHECK-BE-NEXT: stxvp vsp34, 64(r5)53; CHECK-BE-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 054; CHECK-BE-NEXT: stxvp vsp36, 32(r5)55; CHECK-BE-NEXT: stxvp vsp34, 0(r5)56; CHECK-BE-NEXT: blr57entry:58 %0 = load <1024 x i1>, ptr %vop, align 6459 %1 = load <1024 x i1>, ptr %vinp, align 6460 %3 = tail call <1024 x i1> @llvm.ppc.mma.dmsha2hash(<1024 x i1> %0, <1024 x i1> %1, i32 0)61 store <1024 x i1> %3, ptr %resp, align 6462 ret void63}64 65declare <2048 x i1> @llvm.ppc.mma.dmsha3hash(<2048 x i1>, i32)66 67define dso_local void @test_dmsha3hash(ptr %vopp, ptr %resp) {68; CHECK-LABEL: test_dmsha3hash:69; CHECK: # %bb.0: # %entry70; CHECK-NEXT: lxvp vsp34, 0(r3)71; CHECK-NEXT: lxvp vsp36, 32(r3)72; CHECK-NEXT: dmxxinstdmr512 wacc_hi1, vsp36, vsp34, 173; CHECK-NEXT: lxvp vsp34, 64(r3)74; CHECK-NEXT: lxvp vsp36, 96(r3)75; CHECK-NEXT: dmxxinstdmr512 wacc1, vsp36, vsp34, 076; CHECK-NEXT: lxvp vsp34, 128(r3)77; CHECK-NEXT: lxvp vsp36, 160(r3)78; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 179; CHECK-NEXT: lxvp vsp34, 192(r3)80; CHECK-NEXT: lxvp vsp36, 224(r3)81; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 082; CHECK-NEXT: dmsha3hash dmrp0, 583; CHECK-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 084; CHECK-NEXT: stxvp vsp34, 224(r4)85; CHECK-NEXT: stxvp vsp36, 192(r4)86; CHECK-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc_hi0, 187; CHECK-NEXT: stxvp vsp34, 160(r4)88; CHECK-NEXT: stxvp vsp36, 128(r4)89; CHECK-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc1, 090; CHECK-NEXT: stxvp vsp34, 96(r4)91; CHECK-NEXT: stxvp vsp36, 64(r4)92; CHECK-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc_hi1, 193; CHECK-NEXT: stxvp vsp34, 32(r4)94; CHECK-NEXT: stxvp vsp36, 0(r4)95; CHECK-NEXT: blr96;97; CHECK-BE-LABEL: test_dmsha3hash:98; CHECK-BE: # %bb.0: # %entry99; CHECK-BE-NEXT: lxvp vsp34, 224(r3)100; CHECK-BE-NEXT: lxvp vsp36, 192(r3)101; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi1, vsp36, vsp34, 1102; CHECK-BE-NEXT: lxvp vsp34, 160(r3)103; CHECK-BE-NEXT: lxvp vsp36, 128(r3)104; CHECK-BE-NEXT: dmxxinstdmr512 wacc1, vsp36, vsp34, 0105; CHECK-BE-NEXT: lxvp vsp34, 96(r3)106; CHECK-BE-NEXT: lxvp vsp36, 64(r3)107; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1108; CHECK-BE-NEXT: lxvp vsp34, 32(r3)109; CHECK-BE-NEXT: lxvp vsp36, 0(r3)110; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0111; CHECK-BE-NEXT: dmsha3hash dmrp0, 5112; CHECK-BE-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc_hi1, 1113; CHECK-BE-NEXT: stxvp vsp36, 224(r4)114; CHECK-BE-NEXT: stxvp vsp34, 192(r4)115; CHECK-BE-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc1, 0116; CHECK-BE-NEXT: stxvp vsp36, 160(r4)117; CHECK-BE-NEXT: stxvp vsp34, 128(r4)118; CHECK-BE-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc_hi0, 1119; CHECK-BE-NEXT: stxvp vsp36, 96(r4)120; CHECK-BE-NEXT: stxvp vsp34, 64(r4)121; CHECK-BE-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0122; CHECK-BE-NEXT: stxvp vsp36, 32(r4)123; CHECK-BE-NEXT: stxvp vsp34, 0(r4)124; CHECK-BE-NEXT: blr125entry:126 %0 = load <2048 x i1>, ptr %vopp, align 64127 %2 = tail call <2048 x i1> @llvm.ppc.mma.dmsha3hash(<2048 x i1> %0, i32 5)128 store <2048 x i1> %2, ptr %resp, align 64129 ret void130}131 132declare <1024 x i1> @llvm.ppc.mma.dmxxshapad(<1024 x i1>, <16 x i8>, i32, i32, i32)133 134define dso_local void @test_dmxxshapad(ptr %vopp, ptr %vcp, ptr %resp) {135; CHECK-LABEL: test_dmxxshapad:136; CHECK: # %bb.0: # %entry137; CHECK-NEXT: lxvp vsp34, 0(r3)138; CHECK-NEXT: lxvp vsp36, 32(r3)139; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1140; CHECK-NEXT: lxvp vsp34, 64(r3)141; CHECK-NEXT: lxvp vsp36, 96(r3)142; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0143; CHECK-NEXT: lxv vs0, 0(r4)144; CHECK-NEXT: dmxxshapad dmr0, vs0, 2, 1, 3145; CHECK-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0146; CHECK-NEXT: stxvp vsp34, 96(r5)147; CHECK-NEXT: stxvp vsp36, 64(r5)148; CHECK-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc_hi0, 1149; CHECK-NEXT: stxvp vsp34, 32(r5)150; CHECK-NEXT: stxvp vsp36, 0(r5)151; CHECK-NEXT: blr152;153; CHECK-BE-LABEL: test_dmxxshapad:154; CHECK-BE: # %bb.0: # %entry155; CHECK-BE-NEXT: lxvp vsp34, 96(r3)156; CHECK-BE-NEXT: lxvp vsp36, 64(r3)157; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1158; CHECK-BE-NEXT: lxvp vsp34, 32(r3)159; CHECK-BE-NEXT: lxvp vsp36, 0(r3)160; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0161; CHECK-BE-NEXT: lxv vs0, 0(r4)162; CHECK-BE-NEXT: dmxxshapad dmr0, vs0, 2, 1, 3163; CHECK-BE-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc_hi0, 1164; CHECK-BE-NEXT: stxvp vsp36, 96(r5)165; CHECK-BE-NEXT: stxvp vsp34, 64(r5)166; CHECK-BE-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0167; CHECK-BE-NEXT: stxvp vsp36, 32(r5)168; CHECK-BE-NEXT: stxvp vsp34, 0(r5)169; CHECK-BE-NEXT: blr170entry:171 %0 = load <1024 x i1>, ptr %vopp, align 64172 %1 = load <16 x i8>, ptr %vcp, align 64173 %2 = tail call <1024 x i1> @llvm.ppc.mma.dmxxshapad(<1024 x i1> %0, <16 x i8> %1, i32 2, i32 1, i32 3)174 store <1024 x i1> %2, ptr %resp, align 64175 ret void176}177