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1; RUN: llc -verify-machineinstrs -mcpu=pwr8 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s -mtriple=ppc64-- | FileCheck %s -check-prefixes=PWR8-CHECK,CHECK2; RUN: llc -verify-machineinstrs -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s -mtriple=ppc64le-- | FileCheck %s -check-prefixes=PWR9-CHECK,CHECK3 4define i32 @test1(i32 %a) {5 %tmp.1 = mul nsw i32 %a, 16 ; <i32> [#uses=1]6 ret i32 %tmp.17}8; CHECK-LABEL: test1:9; CHECK-NOT: mul10; CHECK: slwi r[[REG1:[0-9]+]], r3, 411 12define i32 @test2(i32 %a) {13 %tmp.1 = mul nsw i32 %a, 17 ; <i32> [#uses=1]14 ret i32 %tmp.115}16; CHECK-LABEL: test2:17; CHECK-NOT: mul18; CHECK: slwi r[[REG1:[0-9]+]], r3, 419; CHECK-NEXT: add r[[REG2:[0-9]+]], r3, r[[REG1]]20 21define i32 @test3(i32 %a) {22 %tmp.1 = mul nsw i32 %a, 15 ; <i32> [#uses=1]23 ret i32 %tmp.124}25; CHECK-LABEL: test3:26; CHECK-NOT: mul27; CHECK: slwi r[[REG1:[0-9]+]], r3, 428; CHECK-NEXT: sub r[[REG2:[0-9]+]], r[[REG1]], r329 30; negtive constant31 32define i32 @test4(i32 %a) {33 %tmp.1 = mul nsw i32 %a, -16 ; <i32> [#uses=1]34 ret i32 %tmp.135}36; CHECK-LABEL: test4:37; CHECK-NOT: mul38; CHECK: slwi r[[REG1:[0-9]+]], r3, 439; CHECK-NEXT: neg r[[REG2:[0-9]+]], r[[REG1]]40 41define i32 @test5(i32 %a) {42 %tmp.1 = mul nsw i32 %a, -17 ; <i32> [#uses=1]43 ret i32 %tmp.144}45; CHECK-LABEL: test5:46; PWR9-CHECK: mulli r[[REG1:[0-9]+]], r3, -1747; PWR8-CHECK-NOT: mul48; PWR8-CHECK: slwi r[[REG1:[0-9]+]], r3, 449; PWR8-CHECK-NEXT: add r[[REG2:[0-9]+]], r3, r[[REG1]]50; PWR8-CHECK-NEXT: neg r{{[0-9]+}}, r[[REG2]]51 52define i32 @test6(i32 %a) {53 %tmp.1 = mul nsw i32 %a, -15 ; <i32> [#uses=1]54 ret i32 %tmp.155}56; CHECK-LABEL: test6:57; CHECK-NOT: mul58; CHECK: slwi r[[REG1:[0-9]+]], r3, 459; CHECK-NEXT: sub r[[REG2:[0-9]+]], r3, r[[REG1]]60; CHECK-NOT: neg61 62; boundary case63 64define i32 @test7(i32 %a) {65 %tmp.1 = mul nsw i32 %a, -2147483648 ; <i32> [#uses=1]66 ret i32 %tmp.167}68; CHECK-LABEL: test7:69; CHECK-NOT: mul70; CHECK: slwi r[[REG1:[0-9]+]], r3, 3171 72define i32 @test8(i32 %a) {73 %tmp.1 = mul nsw i32 %a, 2147483647 ; <i32> [#uses=1]74 ret i32 %tmp.175}76; CHECK-LABEL: test8:77; CHECK-NOT: mul78; CHECK: slwi r[[REG1:[0-9]+]], r3, 3179; CHECK-NEXT: sub r[[REG2:[0-9]+]], r[[REG1]], r380