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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s3; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mtriple=powerpc64-ibm-aix-xcoff -vec-extabi < %s | FileCheck %s4 5define i64 @test1(i64 %x) {6; CHECK-LABEL: test1:7; CHECK: # %bb.0:8; CHECK-NEXT: mulli 3, 3, 6259; CHECK-NEXT: sldi 3, 3, 3610; CHECK-NEXT: blr11 %y = mul i64 %x, 4294967296000012 ret i64 %y13}14 15define i64 @test2(i64 %x) {16; CHECK-LABEL: test2:17; CHECK: # %bb.0:18; CHECK-NEXT: mulli 3, 3, -62519; CHECK-NEXT: sldi 3, 3, 3620; CHECK-NEXT: blr21 %y = mul i64 %x, -4294967296000022 ret i64 %y23}24 25define i64 @test3(i64 %x) {26; CHECK-LABEL: test3:27; CHECK: # %bb.0:28; CHECK-NEXT: mulli 3, 3, 29729; CHECK-NEXT: sldi 3, 3, 1430; CHECK-NEXT: blr31 %y = mul i64 %x, 486604832 ret i64 %y33}34 35define i64 @test4(i64 %x) {36; CHECK-LABEL: test4:37; CHECK: # %bb.0:38; CHECK-NEXT: mulli 3, 3, -29739; CHECK-NEXT: sldi 3, 3, 1440; CHECK-NEXT: blr41 %y = mul i64 %x, -486604842 ret i64 %y43}44 45define i64 @test5(i64 %x) {46; CHECK-LABEL: test5:47; CHECK: # %bb.0:48; CHECK-NEXT: sldi 4, 3, 1249; CHECK-NEXT: sldi 3, 3, 3250; CHECK-NEXT: add 3, 3, 451; CHECK-NEXT: blr52 %y = mul i64 %x, 429497139253 ret i64 %y54}55 56define i64 @test6(i64 %x) {57; CHECK-LABEL: test6:58; CHECK: # %bb.0:59; CHECK-NEXT: sldi 4, 3, 1260; CHECK-NEXT: sldi 3, 3, 3261; CHECK-NEXT: add 3, 3, 462; CHECK-NEXT: neg 3, 363; CHECK-NEXT: blr64 %y = mul i64 %x, -429497139265 ret i64 %y66}67 68define i64 @test7(i64 %x) {69; CHECK-LABEL: test7:70; CHECK: # %bb.0:71; CHECK-NEXT: sldi 4, 3, 3472; CHECK-NEXT: sldi 3, 3, 1373; CHECK-NEXT: sub 3, 4, 374; CHECK-NEXT: blr75 %y = mul i64 %x, 1717986099276 ret i64 %y77}78 79define i64 @test8(i64 %x) {80; CHECK-LABEL: test8:81; CHECK: # %bb.0:82; CHECK-NEXT: sldi 4, 3, 1383; CHECK-NEXT: sldi 3, 3, 3484; CHECK-NEXT: sub 3, 4, 385; CHECK-NEXT: blr86 %y = mul i64 %x, -1717986099287 ret i64 %y88}89 90define i64 @test9(i64 %x) {91; CHECK-LABEL: test9:92; CHECK: # %bb.0:93; CHECK-NEXT: sldi 4, 3, 1294; CHECK-NEXT: sldi 5, 3, 3295; CHECK-NEXT: add 4, 5, 496; CHECK-NEXT: mulli 3, 3, 819397; CHECK-NEXT: sldi 3, 3, 1998; CHECK-NEXT: sub 3, 4, 399; CHECK-NEXT: blr100 %y = mul i64 %x, 4294971392101 %z = mul i64 %x, 4295491584102 %res = sub i64 %y, %z103 ret i64 %res104}105 106define i64 @test10(i64 %x) {107; CHECK-LABEL: test10:108; CHECK: # %bb.0:109; CHECK-NEXT: sldi 4, 3, 34110; CHECK-NEXT: sldi 3, 3, 30111; CHECK-NEXT: sub 3, 4, 3112; CHECK-NEXT: blr113 %y = mul i64 %x, 17179860992114 %z = mul i64 %x, 1073733632115 %res = sub i64 %y, %z116 ret i64 %res117}118 119define i32 @test11(i32 %x) {120; CHECK-LABEL: test11:121; CHECK: # %bb.0:122; CHECK-NEXT: mulli 3, 3, 21845123; CHECK-NEXT: slwi 3, 3, 5124; CHECK-NEXT: blr125 %y = mul nsw i32 %x, 699040126 ret i32 %y127}128