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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -ppc-asm-full-reg-names -verify-machineinstrs \3; RUN: -mtriple=powerpc64le-linux-gnu < %s | FileCheck \4; RUN: -check-prefix=CHECK-LE %s5 6declare i64 @llvm.abs.i64(i64, i1 immarg)7declare <2 x i64> @llvm.abs.v2i64(<2 x i64>, i1)8declare <4 x i32> @llvm.abs.v4i32(<4 x i32>, i1)9declare <8 x i16> @llvm.abs.v8i16(<8 x i16>, i1)10declare <16 x i8> @llvm.abs.v16i8(<16 x i8>, i1)11 12define i64@neg_abs(i64 %x) {13; CHECK-LE-LABEL: neg_abs:14; CHECK-LE: # %bb.0:15; CHECK-LE-NEXT: sradi r4, r3, 6316; CHECK-LE-NEXT: xor r3, r3, r417; CHECK-LE-NEXT: sub r3, r4, r318; CHECK-LE-NEXT: blr19 %abs = tail call i64 @llvm.abs.i64(i64 %x, i1 true)20 %neg = sub nsw i64 0, %abs21 ret i64 %neg22}23 24define <2 x i64> @neg_abs_v2i64(<2 x i64> %0) {25; CHECK-LE-LABEL: neg_abs_v2i64:26; CHECK-LE: # %bb.0:27; CHECK-LE-NEXT: xxlxor vs35, vs35, vs3528; CHECK-LE-NEXT: vsubudm v3, v3, v229; CHECK-LE-NEXT: vminsd v2, v2, v330; CHECK-LE-NEXT: blr31 %abs = call <2 x i64> @llvm.abs.v2i64(<2 x i64> %0, i1 true)32 %neg.abs = sub <2 x i64> zeroinitializer, %abs33 ret <2 x i64> %neg.abs34}35 36define <4 x i32> @neg_abs_v4i32(<4 x i32> %0) {37; CHECK-LE-LABEL: neg_abs_v4i32:38; CHECK-LE: # %bb.0:39; CHECK-LE-NEXT: xxlxor vs35, vs35, vs3540; CHECK-LE-NEXT: vsubuwm v3, v3, v241; CHECK-LE-NEXT: vminsw v2, v2, v342; CHECK-LE-NEXT: blr43 %abs = call <4 x i32> @llvm.abs.v4i32(<4 x i32> %0, i1 true)44 %neg.abs = sub <4 x i32> zeroinitializer, %abs45 ret <4 x i32> %neg.abs46}47 48define <8 x i16> @neg_abs_v8i16(<8 x i16> %0) {49; CHECK-LE-LABEL: neg_abs_v8i16:50; CHECK-LE: # %bb.0:51; CHECK-LE-NEXT: xxlxor vs35, vs35, vs3552; CHECK-LE-NEXT: vsubuhm v3, v3, v253; CHECK-LE-NEXT: vminsh v2, v2, v354; CHECK-LE-NEXT: blr55 %abs = call <8 x i16> @llvm.abs.v8i16(<8 x i16> %0, i1 true)56 %neg.abs = sub <8 x i16> zeroinitializer, %abs57 ret <8 x i16> %neg.abs58}59 60define <16 x i8> @neg_abs_v16i8(<16 x i8> %0) {61; CHECK-LE-LABEL: neg_abs_v16i8:62; CHECK-LE: # %bb.0:63; CHECK-LE-NEXT: xxlxor vs35, vs35, vs3564; CHECK-LE-NEXT: vsububm v3, v3, v265; CHECK-LE-NEXT: vminsb v2, v2, v366; CHECK-LE-NEXT: blr67 %abs = call <16 x i8> @llvm.abs.v16i8(<16 x i8> %0, i1 true)68 %neg.abs = sub <16 x i8> zeroinitializer, %abs69 ret <16 x i8> %neg.abs70}71