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1; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \2; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \3; RUN: FileCheck %s4; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \5; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \6; RUN: FileCheck %s7; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-linux-gnu \8; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \9; RUN: FileCheck %s --check-prefix=CHECK3210 11; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \12; RUN: -mcpu=pwr11 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \13; RUN: FileCheck %s14; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \15; RUN: -mcpu=pwr11 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \16; RUN: FileCheck %s17; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-linux-gnu \18; RUN: -mcpu=pwr11 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \19; RUN: FileCheck %s --check-prefix=CHECK3220 21; These test cases aim to test constant materialization using the pli instruction on Power10 and Power11.22 23define signext i32 @t_16BitsMinRequiring34Bits() {24; CHECK-LABEL: t_16BitsMinRequiring34Bits:25; CHECK: pli r3, 3276826; CHECK-NEXT: blr27; CHECK32-LABEL: t_16BitsMinRequiring34Bits:28; CHECK32: pli r3, 3276829; CHECK32-NEXT: blr30 31entry:32 ret i32 3276833}34 35define signext i32 @t_16Bits() {36; CHECK-LABEL: t_16Bits:37; CHECK: pli r3, 6200438; CHECK-NEXT: blr39; CHECK32-LABEL: t_16Bits:40; CHECK32: pli r3, 6200441; CHECK32-NEXT: blr42 43entry:44 ret i32 6200445}46 47define signext i32 @t_lt32gt16BitsNonShiftable() {48; CHECK-LABEL: t_lt32gt16BitsNonShiftable:49; CHECK: pli r3, 119304650; CHECK-NEXT: blr51; CHECK32-LABEL: t_lt32gt16BitsNonShiftable:52; CHECK32: pli r3, 119304653; CHECK32-NEXT: blr54 55entry:56 ret i32 119304657}58 59define signext i32 @t_32Bits() {60; CHECK-LABEL: t_32Bits:61; CHECK: pli r3, -23145101662; CHECK-NEXT: blr63; CHECK32-LABEL: t_32Bits:64; CHECK32: pli r3, -23145101665; CHECK32-NEXT: blr66 67entry:68 ret i32 -23145101669}70 71define i64 @t_34BitsLargestPositive() {72; CHECK-LABEL: t_34BitsLargestPositive:73; CHECK: pli r3, 858993459174; CHECK-NEXT: blr75; CHECK32-LABEL: t_34BitsLargestPositive:76; CHECK32: li r3, 177; CHECK32-NEXT: li r4, -178; CHECK32-NEXT: blr79 80entry:81 ret i64 858993459182}83 84define i64 @t_neg34Bits() {85; CHECK-LABEL: t_neg34Bits:86; CHECK: pli r3, -828451469687; CHECK-NEXT: blr88; CHECK32-LABEL: t_neg34Bits:89; CHECK32: li r3, -290; CHECK32-NEXT: pli r4, 30541989691; CHECK32-NEXT: blr92 93entry:94 ret i64 -828451469695}96 97define signext i32 @t_16BitsMinRequiring34BitsMinusOne() {98; CHECK-LABEL: t_16BitsMinRequiring34BitsMinusOne:99; CHECK: li r3, 32767100; CHECK-NEXT: blr101; CHECK32-LABEL: t_16BitsMinRequiring34BitsMinusOne:102; CHECK32: li r3, 32767103; CHECK32-NEXT: blr104 105entry:106 ret i32 32767107}108 109define signext i32 @t_lt16Bits() {110; CHECK-LABEL: t_lt16Bits:111; CHECK: li r3, 291112; CHECK-NEXT: blr113; CHECK32-LABEL: t_lt16Bits:114; CHECK32: li r3, 291115; CHECK32-NEXT: blr116 117entry:118 ret i32 291119}120 121define signext i32 @t_neglt16Bits() {122; CHECK-LABEL: t_neglt16Bits:123; CHECK: li r3, -3805124; CHECK-NEXT: blr125; CHECK32-LABEL: t_neglt16Bits:126; CHECK32: li r3, -3805127; CHECK32-NEXT: blr128 129entry:130 ret i32 -3805131}132 133define signext i32 @t_neg16Bits() {134; CHECK-LABEL: t_neg16Bits:135; CHECK: li r3, -32204136; CHECK-NEXT: blr137; CHECK32-LABEL: t_neg16Bits:138; CHECK32: li r3, -32204139; CHECK32-NEXT: blr140 141entry:142 ret i32 -32204143}144 145define signext i32 @t_lt32gt16BitsShiftable() {146; CHECK-LABEL: t_lt32gt16BitsShiftable:147; CHECK: lis r3, 18148; CHECK-NEXT: blr149; CHECK32-LABEL: t_lt32gt16BitsShiftable:150; CHECK32: lis r3, 18151; CHECK32-NEXT: blr152 153entry:154 ret i32 1179648155}156 157define signext i32 @t_32gt16BitsShiftable() {158; CHECK-LABEL: t_32gt16BitsShiftable:159; CHECK: lis r3, -3532160; CHECK-NEXT: blr161; CHECK32-LABEL: t_32gt16BitsShiftable:162; CHECK32: lis r3, -3532163; CHECK32-NEXT: blr164 165entry:166 ret i32 -231473152167}168 169define signext i32 @t_32BitsZero() {170; CHECK-LABEL: t_32BitsZero:171; CHECK: li r3, 0172; CHECK-NEXT: blr173; CHECK32-LABEL: t_32BitsZero:174; CHECK32: li r3, 0175; CHECK32-NEXT: blr176 177entry:178 ret i32 0179}180 181define signext i32 @t_32BitsAllOnes() {182; CHECK-LABEL: t_32BitsAllOnes:183; CHECK: li r3, -1184; CHECK-NEXT: blr185; CHECK32-LABEL: t_32BitsAllOnes:186; CHECK32: li r3, -1187; CHECK32-NEXT: blr188 189entry:190 ret i32 -1191}192 193define i64 @t_34BitsLargestPositivePlus() {194; CHECK-LABEL: t_34BitsLargestPositivePlus:195; CHECK: li r3, 1196; CHECK-NEXT: rldic r3, r3, 33, 30197; CHECK-NEXT: blr198; CHECK32-LABEL: t_34BitsLargestPositivePlus:199; CHECK32: li r3, 2200; CHECK32-NEXT: li r4, 0201; CHECK32-NEXT: blr202 203entry:204 ret i64 8589934592205}206 207define i64 @t_34Bits() {208; CHECK-LABEL: t_34Bits:209; CHECK: pli r3, 1648790223210; CHECK-NEXT: rldic r3, r3, 3, 30211; CHECK-NEXT: blr212; CHECK32-LABEL: t_34Bits:213; CHECK32: li r3, 3214; CHECK32-NEXT: pli r4, 305419896215; CHECK32-NEXT: blr216 217entry:218 ret i64 13190321784219}220 221define i64 @t_35Bits() {222; CHECK-LABEL: t_35Bits:223; CHECK: pli r3, 4266035919224; CHECK-NEXT: rldic r3, r3, 3, 29225; CHECK-NEXT: blr226; CHECK32-LABEL: t_35Bits:227; CHECK32: li r3, 7228; CHECK32-NEXT: pli r4, -231451016229; CHECK32-NEXT: blr230 231entry:232 ret i64 34128287352233}234 235; (Value >> Shift) can be expressed in 34 bits236define i64 @t_Shift() {237; CHECK-LABEL: t_Shift:238; CHECK: pli r3, 8522759166239; CHECK-NEXT: rotldi r3, r3, 48240; CHECK-NEXT: blr241 242entry:243 ; 0xFBFE00000001FBFE244 ret i64 18157950747604548606245}246 247; Leading Zeros + Following Ones + Trailing Zeros > 30248define i64 @t_LZFOTZ() {249; CHECK-LABEL: t_LZFOTZ:250; CHECK: pli r3, -349233251; CHECK-NEXT: rldic r3, r3, 4, 12252; CHECK-NEXT: blr253 254entry:255 ; 0x000FFFFFFFAABCF0256 ret i64 4503599621782768257}258 259; Leading Zeros + Trailing Ones > 30260define i64 @t_LZTO() {261; CHECK-LABEL: t_LZTO:262; CHECK: pli r3, -2684406441263; CHECK-NEXT: rldicl r3, r3, 11, 19264; CHECK-NEXT: blr265entry:266 ; 0x00001AFFF9AABFFF267 ret i64 29686707699711268}269 270; Leading Zeros + Trailing Ones + Following Zeros > 30271define i64 @t_LZTOFO() {272; CHECK-LABEL: t_LZTOFO:273; CHECK: pli r3, -5720033968274; CHECK-NEXT: rldicl r3, r3, 11, 12275; CHECK-NEXT: blr276entry:277 ; 0x000FF55879AA87FF278 ret i64 4491884997806079279}280 281; Requires full expansion282define i64 @t_Full64Bits1() {283; CHECK-LABEL: t_Full64Bits1:284; CHECK: pli r4, 2146500607285; CHECK-NEXT: pli r3, 4043305214286; CHECK-NEXT: rldimi r3, r4, 32, 0287; CHECK-NEXT: blr288entry:289 ; 0x7FF0FFFFF0FFF0FE290 ret i64 9219149911952453886291}292 293; Requires full expansion294define i64 @t_Ful64Bits2() {295; CHECK-LABEL: t_Ful64Bits2:296; CHECK: pli r4, 4042326015297; CHECK-NEXT: pli r3, 4043305214298; CHECK-NEXT: rldimi r3, r4, 32, 0299; CHECK-NEXT: blr300entry:301 ; 0xF0F0FFFFF0FFF0FE302 ret i64 17361658038238310654303}304 305; A splat of 32 bits: 32 Bits Low == 32 Bits High306define i64 @t_Splat32Bits() {307; CHECK-LABEL: t_Splat32Bits:308; CHECK: pli r3, 262916796309; CHECK-NEXT: rldimi r3, r3, 32, 0310; CHECK-NEXT: blr311entry:312 ; 0x0FABCABC0FABCABC313 ret i64 1129219040652020412314}315 316; Producing `pli` when the constant fits within 34-bits and the constant317; is being produced in other transformations (such as complex bit permutations).318define i64 @t_34Bits_Complex(i64 %a, i64 %b) {319; CHECK-LABEL: t_34Bits_Complex:320; CHECK: # %bb.0: # %entry321; CHECK-NEXT: rotldi r4, r4, 30322; CHECK-NEXT: rldimi r3, r4, 34, 31323; CHECK-NEXT: pli r4, -268435457324; CHECK-NEXT: and r3, r3, r4325; CHECK-NEXT: blr326;327; CHECK32-LABEL: t_34Bits_Complex:328; CHECK32: # %bb.0: # %entry329; CHECK32-NEXT: rlwinm r4, r6, 0, 4, 2330; CHECK32-NEXT: rlwimi r3, r5, 0, 31, 29331; CHECK32-NEXT: blr332entry:333 %and = and i64 %a, 8589934592334 %and1 = and i64 %b, -8858370049335 %or = or i64 %and1, %and336 ret i64 %or337}338 339; The load immediates resulting from phi-nodes are needed to test whether340; li/lis is preferred to pli by the instruction selector.341define dso_local void @t_phiNode() {342; CHECK-LABEL: t_phiNode:343; CHECK: lis r6, 18344; CHECK-NEXT: li r5, 291345; CHECK-NEXT: li r4, 0346; CHECK-NEXT: cmpwi r3, 1347; CHECK-NEXT: li r3, -1348; CHECK: pli r6, 2147483647349; CHECK-NEXT: pli r5, 1193046350; CHECK-NEXT: pli r4, 32768351; CHECK-NEXT: pli r3, -231451016352; CHECK32-LABEL: t_phiNode:353; CHECK32: lis r6, 18354; CHECK32-NEXT: li r5, 291355; CHECK32-NEXT: li r4, 0356; CHECK32-NEXT: cmpwi r3, 1357; CHECK32-NEXT: li r3, -1358; CHECK32: pli r6, 2147483647359; CHECK32-NEXT: pli r5, 1193046360; CHECK32-NEXT: pli r4, 32768361; CHECK32-NEXT: pli r3, -231451016362 363entry:364 br label %while.body365 366while.body: ; preds = %if.else.i, %entry367 br label %while.body.i368 369while.body.i: ; preds = %sw.epilog.i, %while.body370 %a.1.i = phi i32 [ %a.2.i, %sw.epilog.i ], [ -1, %while.body ]371 %b.1.i = phi i32 [ %b.2.i, %sw.epilog.i ], [ 0, %while.body ]372 %c.1.i = phi i32 [ %c.2.i, %sw.epilog.i ], [ 291, %while.body ]373 %d.1.i = phi i32 [ %d.2.i, %sw.epilog.i ], [ 1179648, %while.body ]374 %0 = load i8, ptr null, align 1375 %cmp1.i = icmp eq i8 %0, 1376 br i1 %cmp1.i, label %if.then.i, label %if.else.i377 378if.then.i: ; preds = %while.body.i379 switch i8 undef, label %sw.default.i [380 i8 3, label %sw.epilog.i381 i8 2, label %sw.bb1.i382 ]383 384sw.bb1.i: ; preds = %if.then.i385 br label %sw.epilog.i386 387sw.default.i: ; preds = %if.then.i388 unreachable389 390sw.epilog.i: ; preds = %sw.bb2.i, %sw.bb1.i, %if.then.i391 %a.2.i = phi i32 [ -231451016, %sw.bb1.i ], [ %a.1.i, %if.then.i ]392 %b.2.i = phi i32 [ 32768, %sw.bb1.i ], [ %b.1.i, %if.then.i ]393 %c.2.i = phi i32 [ 1193046, %sw.bb1.i ], [ %c.1.i, %if.then.i ]394 %d.2.i = phi i32 [ 2147483647, %sw.bb1.i ], [ %d.1.i, %if.then.i ]395 br label %while.body.i396 397if.else.i: ; preds = %while.body.i398 call void @func2(i32 signext %a.1.i, i32 signext %b.1.i, i32 signext %c.1.i, i32 signext %d.1.i)399 br label %while.body400}401 402declare void @func2(i32, i32, i32, i32)403