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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \3; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \4; RUN: FileCheck %s5; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \6; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \7; RUN: FileCheck %s --check-prefix=CHECK-BE8 9; This test case tests spilling the CR LT bit on Power10. On Power10, this is10; achieved by setb %reg, %CRREG (lt bit) -> stw %reg, $FI instead of:11; mfocrf %reg, %CRREG -> rlwinm %reg1, %reg, $SH, 0, 0 -> stw %reg1, $FI.12 13; Without fine-grained control over clobbering individual CR bits,14; it is difficult to produce a concise test case that will ensure a specific15; bit of any CR field is spilled. We need to test the spilling of a CR bit16; other than the LT bit. Hence this test case is rather complex.17 18%0 = type { %1 }19%1 = type { ptr, ptr, ptr, i32 }20 21@call_1 = external dso_local unnamed_addr global i32, align 422declare ptr @call_2() local_unnamed_addr23declare i32 @call_3() local_unnamed_addr24declare void @call_4() local_unnamed_addr25 26define dso_local void @P10_Spill_CR_LT() local_unnamed_addr {27; CHECK-LABEL: P10_Spill_CR_LT:28; CHECK: # %bb.0: # %bb29; CHECK-NEXT: mfcr r1230; CHECK-NEXT: mflr r031; CHECK-NEXT: std r0, 16(r1)32; CHECK-NEXT: stw r12, 8(r1)33; CHECK-NEXT: stdu r1, -48(r1)34; CHECK-NEXT: .cfi_def_cfa_offset 4835; CHECK-NEXT: .cfi_offset lr, 1636; CHECK-NEXT: .cfi_offset r30, -1637; CHECK-NEXT: .cfi_offset cr2, 838; CHECK-NEXT: .cfi_offset cr3, 839; CHECK-NEXT: .cfi_offset cr4, 840; CHECK-NEXT: std r30, 32(r1) # 8-byte Folded Spill41; CHECK-NEXT: bl call_2@notoc42; CHECK-NEXT: bc 12, 4*cr5+lt, .LBB0_1343; CHECK-NEXT: # %bb.1: # %bb44; CHECK-NEXT: bc 4, 4*cr5+lt, .LBB0_1445; CHECK-NEXT: # %bb.2: # %bb446; CHECK-NEXT: cmpdi cr3, r3, 047; CHECK-NEXT: lwz r3, 0(r3)48; CHECK-NEXT: # implicit-def: $r3049; CHECK-NEXT: crnot 4*cr3+lt, 4*cr3+eq50; CHECK-NEXT: cmpwi cr4, r3, 051; CHECK-NEXT: .p2align 452; CHECK-NEXT: .LBB0_3: # %bb1253; CHECK-NEXT: #54; CHECK-NEXT: bl call_3@notoc55; CHECK-NEXT: cmpwi r3, 156; CHECK-NEXT: crnand 4*cr5+lt, eq, 4*cr4+gt57; CHECK-NEXT: bc 4, 4*cr5+lt, .LBB0_858; CHECK-NEXT: # %bb.4: # %bb2359; CHECK-NEXT: #60; CHECK-NEXT: plwz r3, call_1@PCREL(0), 161; CHECK-NEXT: cmplwi r3, 062; CHECK-NEXT: bne- cr0, .LBB0_963; CHECK-NEXT: # %bb.5: # %bb3064; CHECK-NEXT: #65; CHECK-NEXT: bc 12, 4*cr3+eq, .LBB0_1166; CHECK-NEXT: # %bb.6: # %bb3267; CHECK-NEXT: #68; CHECK-NEXT: rlwinm r30, r30, 0, 24, 2269; CHECK-NEXT: andi. r3, r30, 270; CHECK-NEXT: mcrf cr2, cr071; CHECK-NEXT: bl call_4@notoc72; CHECK-NEXT: beq+ cr2, .LBB0_373; CHECK-NEXT: # %bb.7: # %bb3774; CHECK-NEXT: .LBB0_8: # %bb2275; CHECK-NEXT: .LBB0_9: # %bb2776; CHECK-NEXT: bc 4, 4*cr3+lt, .LBB0_1277; CHECK-NEXT: # %bb.10: # %bb2878; CHECK-NEXT: .LBB0_11: # %bb3579; CHECK-NEXT: .LBB0_12: # %bb2980; CHECK-NEXT: .LBB0_13: # %bb381; CHECK-NEXT: .LBB0_14: # %bb282;83; CHECK-BE-LABEL: P10_Spill_CR_LT:84; CHECK-BE: # %bb.0: # %bb85; CHECK-BE-NEXT: mfcr r1286; CHECK-BE-NEXT: mflr r087; CHECK-BE-NEXT: std r0, 16(r1)88; CHECK-BE-NEXT: stw r12, 8(r1)89; CHECK-BE-NEXT: stdu r1, -144(r1)90; CHECK-BE-NEXT: .cfi_def_cfa_offset 14491; CHECK-BE-NEXT: .cfi_offset lr, 1692; CHECK-BE-NEXT: .cfi_offset r29, -2493; CHECK-BE-NEXT: .cfi_offset r30, -1694; CHECK-BE-NEXT: .cfi_offset cr2, 895; CHECK-BE-NEXT: .cfi_offset cr2, 896; CHECK-BE-NEXT: .cfi_offset cr2, 897; CHECK-BE-NEXT: std r29, 120(r1) # 8-byte Folded Spill98; CHECK-BE-NEXT: std r30, 128(r1) # 8-byte Folded Spill99; CHECK-BE-NEXT: bl call_2100; CHECK-BE-NEXT: nop101; CHECK-BE-NEXT: bc 12, 4*cr5+lt, .LBB0_13102; CHECK-BE-NEXT: # %bb.1: # %bb103; CHECK-BE-NEXT: bc 4, 4*cr5+lt, .LBB0_14104; CHECK-BE-NEXT: # %bb.2: # %bb4105; CHECK-BE-NEXT: cmpdi cr3, r3, 0106; CHECK-BE-NEXT: lwz r3, 0(r3)107; CHECK-BE-NEXT: addis r30, r2, call_1@toc@ha108; CHECK-BE-NEXT: # implicit-def: $r29109; CHECK-BE-NEXT: crnot 4*cr3+lt, 4*cr3+eq110; CHECK-BE-NEXT: cmpwi cr4, r3, 0111; CHECK-BE-NEXT: .p2align 4112; CHECK-BE-NEXT: .LBB0_3: # %bb12113; CHECK-BE-NEXT: #114; CHECK-BE-NEXT: bl call_3115; CHECK-BE-NEXT: nop116; CHECK-BE-NEXT: cmpwi r3, 1117; CHECK-BE-NEXT: crnand 4*cr5+lt, eq, 4*cr4+gt118; CHECK-BE-NEXT: bc 4, 4*cr5+lt, .LBB0_8119; CHECK-BE-NEXT: # %bb.4: # %bb23120; CHECK-BE-NEXT: #121; CHECK-BE-NEXT: lwz r3, call_1@toc@l(r30)122; CHECK-BE-NEXT: cmplwi r3, 0123; CHECK-BE-NEXT: bne- cr0, .LBB0_9124; CHECK-BE-NEXT: # %bb.5: # %bb30125; CHECK-BE-NEXT: #126; CHECK-BE-NEXT: bc 12, 4*cr3+eq, .LBB0_11127; CHECK-BE-NEXT: # %bb.6: # %bb32128; CHECK-BE-NEXT: #129; CHECK-BE-NEXT: rlwinm r29, r29, 0, 24, 22130; CHECK-BE-NEXT: andi. r3, r29, 2131; CHECK-BE-NEXT: mcrf cr2, cr0132; CHECK-BE-NEXT: bl call_4133; CHECK-BE-NEXT: nop134; CHECK-BE-NEXT: beq+ cr2, .LBB0_3135; CHECK-BE-NEXT: # %bb.7: # %bb37136; CHECK-BE-NEXT: .LBB0_8: # %bb22137; CHECK-BE-NEXT: .LBB0_9: # %bb27138; CHECK-BE-NEXT: bc 4, 4*cr3+lt, .LBB0_12139; CHECK-BE-NEXT: # %bb.10: # %bb28140; CHECK-BE-NEXT: .LBB0_11: # %bb35141; CHECK-BE-NEXT: .LBB0_12: # %bb29142; CHECK-BE-NEXT: .LBB0_13: # %bb3143; CHECK-BE-NEXT: .LBB0_14: # %bb2144bb:145 %tmp = tail call ptr @call_2()146 %tmp1 = icmp ne ptr %tmp, null147 switch i32 undef, label %bb4 [148 i32 3, label %bb2149 i32 2, label %bb3150 ]151 152bb2: ; preds = %bb153 unreachable154 155bb3: ; preds = %bb156 unreachable157 158bb4: ; preds = %bb159 %tmp5 = load i64, ptr undef, align 8160 %tmp6 = trunc i64 %tmp5 to i32161 %tmp7 = add i32 0, %tmp6162 %tmp8 = icmp sgt i32 %tmp7, 0163 %tmp9 = icmp eq i8 0, 0164 %tmp10 = zext i1 %tmp9 to i32165 %tmp11 = icmp eq ptr %tmp, null166 br label %bb12167 168bb12: ; preds = %bb38, %bb4169 %tmp13 = phi i32 [ %tmp10, %bb4 ], [ undef, %bb38 ]170 %tmp14 = phi i32 [ undef, %bb4 ], [ %tmp17, %bb38 ]171 %tmp15 = icmp ne i32 %tmp13, 0172 %tmp16 = and i32 %tmp14, -257173 %tmp17 = select i1 %tmp15, i32 %tmp16, i32 undef174 br label %bb18175 176bb18: ; preds = %bb12177 %tmp19 = call zeroext i32 @call_3()178 %tmp20 = icmp eq i32 %tmp19, 1179 %tmp21 = and i1 %tmp8, %tmp20180 br i1 %tmp21, label %bb22, label %bb23181 182bb22: ; preds = %bb18183 unreachable184 185bb23: ; preds = %bb18186 br label %bb24187 188bb24: ; preds = %bb23189 %tmp25 = load i32, ptr @call_1, align 4190 %tmp26 = icmp eq i32 %tmp25, 0191 br i1 %tmp26, label %bb30, label %bb27192 193bb27: ; preds = %bb24194 br i1 %tmp1, label %bb28, label %bb29195 196bb28: ; preds = %bb27197 unreachable198 199bb29: ; preds = %bb27200 unreachable201 202bb30: ; preds = %bb24203 br label %bb31204 205bb31: ; preds = %bb30206 br i1 %tmp11, label %bb35, label %bb32207 208bb32: ; preds = %bb31209 %tmp33 = and i32 %tmp17, 2210 %tmp34 = icmp eq i32 %tmp33, 0211 call void @call_4()212 br label %bb36213 214bb35: ; preds = %bb31215 unreachable216 217bb36: ; preds = %bb32218 br i1 %tmp34, label %bb38, label %bb37219 220bb37: ; preds = %bb36221 unreachable222 223bb38: ; preds = %bb36224 br label %bb12225}226 227